Mitesh R. Meswani

17 papers A* 4B 1Journal 1Unranked 11
YearRankTypeTitle / Venue / Authors
2017 A* conf
Design and Analysis of an APU for Exascale Computing.
HPCA
Thiruvengadam Vijayaraghavan, Yasuko Eckert, Gabriel H. Loh, Michael J. Schulte, Mike Ignatowski, Bradford M. Beckmann, William C. Brantley, Joseph L. Greathouse, Wei Huang, Arun Karunanithi, Onur Kayiran, Mitesh R. Meswani, Indrani Paul, Matthew Poremba, Steven Raasch, Steven K. Reinhardt, Greg Sadowski, Vilas Sridharan
2017 — conf
HBM-Resident Prefetching for Heterogeneous Memory System.
ARCS
Mahzabeen Islam, Krishna M. Kavi, Mitesh R. Meswani, Soumik Banerjee, Nuwan Jayasena
2017 A* conf
MemPod: A Clustered Architecture for Efficient and Scalable Migration in Flat Address Space Multi-level Memories.
HPCA
Andreas Prodromou, Mitesh R. Meswani, Nuwan Jayasena, Gabriel H. Loh, Dean M. Tullsen
2017 A* conf
SILC-FM: Subblocked InterLeaved Cache-Like Flat Memory Organization.
HPCA
Jee Ho Ryoo, Mitesh R. Meswani, Andreas Prodromou, Lizy K. John
2016 B conf
POSTER: SILC-FM: Subblocked InterLeaved Cache-Like Flat Memory Organization.
PACT
Jee Ho Ryoo, Mitesh R. Meswani, Reena Panda, Lizy K. John
2016 — conf
Prefetching as a Potentially Effective Technique for Hybrid Memory Optimization.
MEMSYS
Mahzabeen Islam, Soumik Banerjee, Mitesh R. Meswani, Krishna M. Kavi
2016 — conf
Reliability and Performance Trade-off Study of Heterogeneous Memories.
MEMSYS
Manish Gupta, David Roberts, Mitesh R. Meswani, Vilas Sridharan, Dean M. Tullsen, Rajesh K. Gupta
2015 A* conf
Heterogeneous memory architectures: A HW/SW approach for mixing die-stacked and off-package memories.
HPCA
Mitesh R. Meswani, Sergey Blagodurov, David Roberts, John Slice, Mike Ignatowski, Gabriel H. Loh
2015 — conf
Towards Workload-Aware Page Cache Replacement Policies for Hybrid Memories.
MEMSYS
Ahsen J. Uppal, Mitesh R. Meswani
2014 — conf
Efficient breadth-first search on a heterogeneous processor.
IEEE BigData
Mayank Daga, Mark Nutter, Mitesh R. Meswani
2014 — conf
Toward efficient programmer-managed two-level memory hierarchies in exascale computers.
Co-HPC@SC
Mitesh R. Meswani, Gabriel H. Loh, Sergey Blagodurov, David Roberts, John Slice, Mike Ignatowski
2013 — conf
A new perspective on processing-in-memory architecture design.
MSPC@PLDI
Dong Ping Zhang, Nuwan Jayasena, Alexander Lyashevsky, Joseph L. Greathouse, Mitesh R. Meswani, Mark Nutter, Mike Ignatowski
2013 J jnl
Modeling and predicting performance of high performance computing applications on hardware accelerators.
Int. J. High Perform. Comput. Appl.
Mitesh R. Meswani, Laura Carrington, Didem Unat, Allan Snavely, Scott B. Baden, Stephen Poole
2012 — conf
Modeling and Predicting Performance of High Performance Computing Applications on Hardware Accelerators.
IPDPS Workshops
Mitesh R. Meswani, Laura Carrington, Didem Unat, Allan Snavely, Scott B. Baden, Stephen Poole
2011 — conf
Modeling and predicting application performance on hardware accelerators.
IISWC
Mitesh R. Meswani, Laura Carrington, Didem Unat, Allan Snavely, Scott B. Baden, Stephen Poole
2011 — conf
Reducing Energy Usage with Memory and Computation-Aware Dynamic Frequency Scaling.
Euro-Par (1)
Michael Laurenzano, Mitesh R. Meswani, Laura Carrington, Allan Snavely, Mustafa M. Tikir, Stephen Poole
2010 — conf
PIR: PMaC's Idiom Recognizer.
ICPP Workshops
Catherine Olschanowsky, Allan Snavely, Mitesh R. Meswani, Laura Carrington