Mitchell A. Thornton

146 papers A* 1A 7B 3C 12Misc 3Journal 35Unranked 80

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	Decentralized Q-Learning for Emitter Localization with Consensus Policy Selection. IEEECONF Christopher Peters, Mitchell A. Thornton, Eric C. Larson
2025	B	`conf`	Effects of Redundant LiDAR Sensors on Object Hiding Attacks in Autonomous Driving Systems. COMPSAC Matthew Lee, William Flinchbaugh, Eric C. Larson, Mitchell A. Thornton
2025	—	`conf`	MUSIC Spectra Using Cayley Graphs of Multiple-Valued Signals. ISMVL Aviraj Sinha, Darrell L. Young, Eric C. Larson, Mitchell A. Thornton
2025	—	`conf`	Modeling and Simulation of Multiple-Valued and Nonlinear Quantum Photonic Components. ISMVL Joshua Ange, Mason Tuller, Jessie M. Henderson, Elena R. Henderson, Bradley A. Moores, Duncan L. MacFarlane, Mitchell A. Thornton
2025	—	`conf`	Reducing Emitter Localization Error in Urban Environments with Geometry Adaptive UAS Arrays. SysCon Christopher Peters, Mitchell A. Thornton
2025	—	`conf`	Scaling Continuous Kernels with Sparse Fourier Domain Learning. AIPR Clayton A. Harper, Luke Wood, Peter Gerstoft, Mitchell A. Thornton, Eric C. Larson
2025	J	`jnl`	Secure Controller Area Network (CAN) Transceiver With Embedded Authentication Support. IEEE Trans. Circuits Syst. I Regul. Pap. Weizhong Chen, Xianshan Wen, Can Hong, Theodore W. Manikas, Mitchell A. Thornton, Ping Gui
2024	—	`conf`	A Photonic Physically Unclonable Function's Resilience to Multiple-Valued Machine Learning Attacks. ISMVL Jessie M. Henderson, Elena R. Henderson, Clayton A. Harper, Hiva Shahoei, William V. Oxford, Eric C. Larson, Duncan L. MacFarlane, Mitchell A. Thornton
2024	J	`jnl`	A Photonic Physically Unclonable Function's Resilience to Multiple-Valued Machine Learning Attacks. CoRR Jessie M. Henderson, Elena R. Henderson, Clayton A. Harper, Hiva Shahoei, William V. Oxford, Eric C. Larson, Duncan L. MacFarlane, Mitchell A. Thornton
2024	J	`jnl`	Automated Quantum Circuit Generation for Computing Inverse Hash Functions. CoRR Elena R. Henderson, Jessie M. Henderson, William V. Oxford, Mitchell A. Thornton
2024	—	`conf`	Controller Area Network (CAN) Bus Transceiver with Enhanced Rail Converter. MWSCAS Weizhong Chen, Can Hong, Xianshan Wen, Mitchell A. Thornton, Ping Gui
2024	J	`jnl`	Designing a Photonic Physically Unclonable Function Having Resilience to Machine Learning Attacks. CoRR Elena R. Henderson, Jessie M. Henderson, Hiva Shahoei, William V. Oxford, Eric C. Larson, Duncan L. MacFarlane, Mitchell A. Thornton
2024	Misc	`conf`	Learnable Statistical Moments Pooling for Automatic Modulation Classification. ICASSP Clayton A. Harper, Mitchell A. Thornton, Eric C. Larson
2023	J	`jnl`	Automatic Modulation Classification with Deep Neural Networks. CoRR Clayton A. Harper, Mitchell A. Thornton, Eric C. Larson
2023	J	`jnl`	CNN-Assisted Steganography - Integrating Machine Learning with Established Steganographic Techniques. CoRR Andrew Havard, Theodore W. Manikas, Eric C. Larson, Mitchell A. Thornton
2023	C	`conf`	Data Leakage in Isolated Virtualized Enterprise Computing Systems. ICISSP Zechariah Wolf, Eric Larson, Mitchell A. Thornton
2023	—	`conf`	Impacts of Synthetically Generated Data on Trackformer-based Multi-Object Tracking. AIPR Matthew Lee, Clayton A. Harper, William Flinchbaugh, Eric C. Larson, Mitchell A. Thornton
2023	—	`conf`	Multiple-Valued Logic Physically Unclonable Function in Photonic Integrated Circuits. ISMVL Duncan L. MacFarlane, Hiva Shahoei, Ifeanyi G. Achu, Evan Stewart, William V. Oxford, Mitchell A. Thornton
2023	—	`conf`	Using Time Series Clustering to Inform Multimodal CNN Architectures. AIPR Joshua Sylvester, Matthew Lee, Daniel Canon Ellis, Mitchell A. Thornton, Eric C. Larson
2022	—	`conf`	A Side Channel Attack Detection System Using Processor Core Events and a Support Vector Machine. MECO Rob Oshana, Mitchell A. Thornton, Mike Caraman
2022	J	`jnl`	Automated Quantum Memory Compilation with Improved Dynamic Range. CoRR Aviraj Sinha, Elena R. Henderson, Jessie M. Henderson, Mitchell A. Thornton
2022	C	`conf`	Controller Area Network (CAN) Bus Transceiver with Authentication Support. ISCAS Xianshan Wen, Ruobing Hua, Jianye Liu, Tao Fu, Liang Fang, Xiaoran Wang, Mitchell A. Thornton, Ping Gui
2022	—	`conf`	General Process Detection Through Physical Side Channel Characterization. SysCon Michael A. Taylor, Eric C. Larson, Mitchell A. Thornton
2022	—	`conf`	Quantum Multiple Valued Kernel Circuits. ISMVL Aviraj Sinha, Mitchell A. Thornton
2022	—	`conf`	SMU-DDI Cyber Autonomy Range. AIPR Darrell L. Young, Mark Bigham, Mark Bradbury, Eric Larson, Mitchell A. Thornton
2022	C	`conf`	Side Channel Identification using Granger Time Series Clustering with Applications to Control Systems. ICISSP Matthew Lee, Joshua Sylvester, Sunjoli Aggarwal, Aviraj Sinha, Michael A. Taylor, Nathan Srirama, Eric C. Larson, Mitchell A. Thornton
2021	—	`conf`	Industrial Control System Anomaly Detection Using Convolutional Neural Network Consensus. CCTA Aviraj Sinha, Michael A. Taylor, Nathan Srirama, Theodore W. Manikas, Eric C. Larson, Mitchell A. Thornton
2021	Misc	`conf`	Rapid Ransomware Detection through Side Channel Exploitation. CSR Michael A. Taylor, Eric C. Larson, Mitchell A. Thornton
2021	—	`conf`	Real-Time Edge Processing Detection of Malicious Attacks Using Machine Learning and Processor Core Events. SysCon Rob Oshana, Mitchell A. Thornton, Eric C. Larson, Xavier Roumegue
2021	—	`conf`	SNR-Boosted Automatic Modulation Classification. ACSCC Clayton A. Harper, Aviraj Sinha, Mitchell A. Thornton, Eric C. Larson
2020	J	`jnl`	A 2.56-Gb/s Serial Wireline Transceiver That Supports an Auxiliary Channel in 65-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. Xiaoran Wang, Tianwei Liu, Shita Guo, Mitchell A. Thornton, Ping Gui
2020	—	`conf`	A Quantum Photonic TRNG based on Quaternary Logic. ISMVL Kaitlin N. Smith, Duncan L. MacFarlane, Mitchell A. Thornton
2020	Misc	`conf`	Enhanced Automatic Modulation Classification using Deep Convolutional Latent Space Pooling. ACSSC Clayton A. Harper, Lauren Lyons, Mitchell A. Thornton, Eric C. Larson
2020	—	`conf`	Fast Minimization of Polynomial Decomposition using Fixed-Polarity Pascal Transforms. ISMVL Kaitlin N. Smith, Mitchell A. Thornton, D. Michael Miller
2020	J	`jnl`	Higher Dimension Quantum Entanglement Generators. ACM J. Emerg. Technol. Comput. Syst. Kaitlin N. Smith, Mitchell A. Thornton
2020	A	`conf`	Introduction to Quantum Computation Reliability. ITC Mitchell A. Thornton
2019	A*	`conf`	A quantum computational compiler and design tool for technology-specific targets. ISCA Kaitlin N. Smith, Mitchell A. Thornton
2019	—	`conf`	Entangled State Preparation for Non-Binary Quantum Computing. ICRC Kaitlin N. Smith, Mitchell A. Thornton
2019	—	`conf`	Entanglement in Higher-Radix Quantum Systems. ISMVL Kaitlin N. Smith, Mitchell A. Thornton
2019	—	`conf`	Fixed Polarity Pascal Transforms with Symbolic Computer Algebra Applications. PACRIM Kaitlin N. Smith, Mitchell A. Thornton
2019	J	`jnl`	Keyboard Snooping from Mobile Phone Arrays with Mixed Convolutional and Recurrent Neural Networks. Proc. ACM Interact. Mob. Wearable Ubiquitous Technol. Tyler Giallanza, Travis Siems, Elena Smith, Erik Gabrielsen, Ian Johnson, Mitchell A. Thornton, Eric C. Larson
2019	—	`conf`	Quantum Logic Synthesis with Formal Verification. MWSCAS Kaitlin N. Smith, Mitchell A. Thornton
2019	—	`conf`	Task Value Calculus: Multi-Objective Trade off Analysis Using Multiple-Valued Decision Diagrams. ISMVL Tyler Giallanza, Erik Gabrielsen, Michael A. Taylor, Eric C. Larson, Mitchell A. Thornton
2018	—	`conf`	A Radix-4 Chrestenson Gate for Optical Quantum Computation. ISMVL Kaitlin N. Smith, Tim LaFave, Duncan L. MacFarlane, Mitchell A. Thornton
2018	J	`jnl`	Higher-Radix Chrestenson Gates for Photonic Quantum Computation. FLAP Kaitlin N. Smith, Tim LaFave, Duncan L. MacFarlane, Mitchell A. Thornton
2018	—	`conf`	Multiple-Valued Random Digit Extraction. ISMVL Micah Thornton, Mitchell A. Thornton
2017	—	`conf`	Automated Markov-chain based analysis for large state spaces. SysCon Kaitlin N. Smith, Michael A. Taylor, Anna A. Carroll, Theodore W. Manikas, Mitchell A. Thornton
2017	—	`conf`	Quantum Photonic TRNG with Dual Extractor. QTOP@NetSys Mitchell A. Thornton, Duncan L. MacFarlane
2017	—	`conf`	Simulation of switching circuits using transfer functions. MWSCAS David Kebo Houngninou, Mitchell A. Thornton
2016	J	`jnl`	A Fixed-Point Squaring Algorithm Using an Implicit Arbitrary Radix Number System. IEEE J. Emerg. Sel. Topics Circuits Syst. Saurabh D. Gupta, Mitchell A. Thornton
2016	C	`conf`	Demographic Group Prediction Based on Smart Device User Recognition Gestures. ICMLA Adel R. Alharbi, Mitchell A. Thornton
2016	C	`conf`	Implementation of switching circuit models as transfer functions. ISCAS David Kebo Houngninou, Mitchell A. Thornton
2016	J	`jnl`	QMDDs: Efficient Quantum Function Representation and Manipulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Philipp Niemann, Robert Wille, D. Michael Miller, Mitchell A. Thornton, Rolf Drechsler
2016	—	`conf`	Reliability block diagram extensions for non-parametric probabilistic analysis. SysCon Philip C. Davis, Mitchell A. Thornton, Theodore W. Manikas
2015	C	`conf`	Demographic Group Classification of Smart Device Users. ICMLA Adel R. Alharbi, Mitchell A. Thornton
2015	—	`conf`	Edge Reduction for EVMDDs to Speed Up Analysis of Multi-state Systems. ISMVL Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, Mitchell A. Thornton, Theodore W. Manikas
2015	J	`jnl`	Modeling System Threat Probabilities Using Mixed-Radix Multiple-Valued Logic Decision Diagrams. J. Multiple Valued Log. Soft Comput. Theodore W. Manikas, Mitchell A. Thornton, David Y. Feinstein
2015	J	`jnl`	Quantum Multiple-Valued Decision Diagrams Containing Skipped Variables. J. Multiple Valued Log. Soft Comput. David Y. Feinstein, Mitchell A. Thornton
2015	J	`jnl`	Simulation and Implication Using a Transfer Function Model for Switching Logic. IEEE Trans. Computers Mitchell A. Thornton
2014	—	`conf`	Analysis Methods of Multi-state Systems Partially Having Dependent Components Using Multiple-Valued Decision Diagrams. ISMVL Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, Mitchell A. Thornton, Theodore W. Manikas
2014	J	`jnl`	Clock Distribution Area Reduction Using a Multiple-Valued Clocking Approach. J. Multiple Valued Log. Soft Comput. Rohit P. Menon, Mitchell A. Thornton
2014	—	`book`	Modeling Digital Switching Circuits with Linear Algebra Mitchell A. Thornton
2014	J	`jnl`	On Optimizations of Edge-Valued MDDs for Fast Analysis of Multi-State Systems. IEICE Trans. Inf. Syst. Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, Mitchell A. Thornton, Theodore W. Manikas
2014	C	`conf`	Setting the stage for CE2016: A revised body of knowledge. FIE Eric Durant, John Impagliazzo, Susan Conry, Robert B. Reese, Mitchell A. Thornton, Herman Lam, Victor P. Nelson
2014	—	`conf`	System Probability Distribution Modeling Using MDDs. ISMVL Mitchell A. Thornton, Theodore W. Manikas, Stephen A. Szygenda, Shinobu Nagayama
2013	—	`conf`	A Transfer Function Model for Ternary Switching Logic Circuits. ISMVL Mitchell A. Thornton
2013	C	`conf`	Computer engineering curriculum guidelines. FIE Eric Durant, John Impagliazzo, Susan Conry, Andrew D. McGettrick, Mitchell A. Thornton, Timothy Wilson
2013	C	`conf`	Embedded and real-time systems classes in traditional and distance education format. FIE Mitchell A. Thornton, Theodore W. Manikas, Phillip A. Laplante
2013	—	`conf`	Low power floating-point multiplication and squaring units with shared circuitry. MWSCAS Jason Moore, Mitchell A. Thornton, David W. Matula
2013	—	`conf`	Spectral Response of Ternary Logic Netlists. ISMVL Mitchell A. Thornton, Theodore W. Manikas
2013	—	`conf`	Ternary Logic Network Justification Using Transfer Matrices. ISMVL Mitchell A. Thornton, Jennifer Dworak
2012	A	`conf`	Computer engineering review task force report. SIGCSE John Impagliazzo, Susan Conry, Eric Durant, Andrew D. McGettrick, Mitchell A. Thornton, Timothy Wilson
2012	—	`conf`	Global Multiple-Valued Clock Approach for High- Performance Multi-phase Clock Integrated Circuits. ISMVL Rohit P. Menon, Mitchell A. Thornton
2012	—	`conf`	Modeling Medical System Threats with Conditional Probabilities Using Multiple-Valued Logic Decision Diagrams. ISMVL Theodore W. Manikas, David Y. Feinstein, Mitchell A. Thornton
2012	J	`jnl`	Professional Licensure for Software Engineers: An Update. Comput. Sci. Eng. Mitchell A. Thornton
2012	J	`jnl`	Reversible Logic Synthesis Based on Decision Diagram Variable Ordering. J. Multiple Valued Log. Soft Comput. David Y. Feinstein, Mitchell A. Thornton
2012	—	`conf`	Uncle - An RTL Approach to Asynchronous Design. ASYNC Robert B. Reese, Scott C. Smith, Mitchell A. Thornton
2012	—	`conf`	Using the Asynchronous Paradigm for Reversible Sequential Circuit Implementation. ISMVL David Y. Feinstein, Mitchell A. Thornton
2011	—	`ch.`	Keyboard Dynamics. Encyclopedia of Cryptography and Security (2nd Ed.) Mitchell A. Thornton
2011	—	`conf`	On the Skipped Variables of Quantum Multiple-Valued Decision Diagrams. ISMVL David Y. Feinstein, Mitchell A. Thornton
2011	—	`conf`	Using Multiple-Valued Logic Decision Diagrams to Model System Threat Probabilities. ISMVL Theodore W. Manikas, Mitchell A. Thornton, David Y. Feinstein
2010	—	`book`	Digital System Verification: A Combined Formal Methods and Simulation Framework Digital System Verification Lun Li, Mitchell A. Thornton
2010	—	`conf`	Quaternary Voltage-Mode Logic Cells and Fixed-Point Multiplication Circuits. ISMVL Satyendra R. Datla, Mitchell A. Thornton
2010	J	`jnl`	To PE or not to PE: the Sequel. Comput. Sci. Eng. Steven F. Barrett, Mitchell A. Thornton
2009	J	`jnl`	A Discrete Logarithm Number System for Integer Arithmetic Modulo 2 IEEE Trans. Computers Alex Fit-Florea, Lun Li, Mitchell A. Thornton, David W. Matula
2009	—	`conf`	A Low Power High Performance Radix-4 Approximate Squaring Circuit. ASAP Satyendra R. Datla, Mitchell A. Thornton, David W. Matula
2009	J	`jnl`	Minimization of Quantum Multiple-valued Decision Diagrams Using Data Structure Metrics. J. Multiple Valued Log. Soft Comput. David Y. Feinstein, Mitchell A. Thornton, D. Michael Miller
2009	—	`conf`	On the Guidance of Reversible Logic Synthesis by Dynamic Variable Reordering. ISMVL David Y. Feinstein, Mitchell A. Thornton
2009	—	`conf`	Quaternary Addition Circuits Based on SUSLOC Voltage-Mode Cells and Modeling with SystemVerilog©. ISMVL Satyendra R. Datla, Mitchell A. Thornton, Luther Hendrix, Dave Henderson
2008	—	`conf`	A low power radix-4 dual recoded integer squaring implementation for use in design of application specific arithmetic circuits. ACSCC Jason Moore, Mitchell A. Thornton, David W. Matula
2008	J	`jnl`	Components of disaster-tolerant computing: analysis of disaster recovery, IT application downtime and executive visibility. Int. J. Bus. Inf. Syst. Chad M. Lawler, Michael A. Harper, Stephen A. Szygenda, Mitchell A. Thornton
2008	—	`conf`	On the Data Structure Metrics of Quantum Multiple-Valued Decision Diagrams. ISMVL David Y. Feinstein, Mitchell A. Thornton, D. Michael Miller
2008	A	`conf`	Partially Redundant Logic Detection Using Symbolic Equivalence Checking in Reversible and Irreversible Logic Circuits. DATE David Y. Feinstein, Mitchell A. Thornton, D. Michael Miller
2008	—	`conf`	Quantum Logic Implementation of Unary Arithmetic Operations. ISMVL Mitchell A. Thornton, David W. Matula, Laura Spenner, D. Michael Miller
2007	—	`conf`	Advances in Quantum Computing Fault Tolerance and Testing. HASE David Y. Feinstein, V. S. S. Nair, Mitchell A. Thornton
2007	C	`conf`	Automatic High Level Assertion Generation and Synthesis for Embedded System Design. FDL Lun Li, Frank P. Coyle, Mitchell A. Thornton
2007	C	`conf`	Components and Analysis of Disaster Tolerant Computing. IPCCC Chad M. Lawler, Michael A. Harper, Mitchell A. Thornton
2007	—	`conf`	Evaluation of Toggle Coverage for MVL Circuits Specified in the SystemVerilog HDL. ISMVL Mahsan Amoui, Daniel Große, Mitchell A. Thornton, Rolf Drechsler
2007	—	`book`	Multiple Valued Logic: Concepts and Representations Multiple Valued Logic D. Michael Miller, Mitchell A. Thornton
2007	J	`jnl`	QMDD Minimization Using Sifting for Variable Reordering. J. Multiple Valued Log. Soft Comput. D. Michael Miller, David Y. Feinstein, Mitchell A. Thornton
2007	—	`conf`	Variable Reordering and Sifting for QMDD. ISMVL D. Michael Miller, David Y. Feinstein, Mitchell A. Thornton
2006	B	`conf`	A Decision Diagram Package for Reversible and Quantum Circuit Simulation. IEEE Congress on Evolutionary Computation D. Michael Miller, Mitchell A. Thornton, David Goodman
2006	—	`conf`	A Quantum CAD Accelerator Based on Grover's Algorithm for Finding the Minimum Fixed Polarity Reed-Muller Form. ISMVL Lun Li, Mitchell A. Thornton, Marek A. Perkowski
2006	—	`conf`	A digit serial algorithm for the integer power operation. ACM Great Lakes Symposium on VLSI Lun Li, Mitchell A. Thornton, David W. Matula
2006	—	`book`	Introduction to Logic Synthesis using Verilog HDL Robert B. Reese, Mitchell A. Thornton
2006	—	`conf`	Performance Evaluation of a Novel Direct Table Lookup Method and Architecture with Application to 16-bit Integer Functions. ASAP Lun Li, Alex Fit-Florea, Mitchell A. Thornton, David W. Matula
2006	—	`conf`	QMDD: A Decision Diagram Structure for Reversible and Quantum Circuits. ISMVL D. Michael Miller, Mitchell A. Thornton
2005	J	`jnl`	A Coarse-Grain Phased Logic CPU. IEEE Trans. Computers Robert B. Reese, Mitchell A. Thornton, Cherrice Traver
2005	—	`conf`	A Framework and Process for Curricular Integration and Innovation Using Project Based Interdisciplinary Teams. ITCC (1) Frank P. Coyle, Mitchell A. Thornton
2005	J	`jnl`	Early evaluation for performance enhancement in phased logic. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Robert B. Reese, Mitchell A. Thornton, Cherrice Traver, David Hemmendinger
2005	—	`conf`	Hardware Implementation of an Additive Bit-Serial Algorithm for the Discrete Logarithm Modulo 2 ISVLSI Lun Li, Alex Fit-Florea, Mitchell A. Thornton, David W. Matula
2005	—	`conf`	The Karhunen-Loève Transform of Discrete MVL Functions. ISMVL Mitchell A. Thornton
2004	—	`conf`	A Genetic Approach for Conjunction Scheduling in Symbolic Equivalence Checking. ISVLSI Lun Li, Mitchell A. Thornton, Stephen A. Szygenda
2004	J	`jnl`	Computation of Discrete Function Chrestenson Spectrum Using Cayley Color Graphs. J. Multiple Valued Log. Soft Comput. Mitchell A. Thornton, D. Michael Miller
2004	—	`conf`	Performance enhancement in phased logic circuits using automatic slack-matching buffer insertion. ACM Great Lakes Symposium on VLSI Kenneth Fazel, Lun Li, Mitchell A. Thornton, Robert B. Reese, Cherrice Traver
2004	—	`conf`	Test vector generation and classification using FSM traversals. ISCAS (5) Ralph Marczynski, Mitchell A. Thornton, Stephen A. Szygenda
2003	—	`conf`	A Coarse-Grain Phased Logic CPU. ASYNC Robert B. Reese, Mitchell A. Thornton, Cherrice Traver
2003	—	`conf`	A Fine-Grain Phased Logic CPU. ISVLSI Robert B. Reese, Mitchell A. Thornton, Cherrice Traver
2003	J	`jnl`	A signed binary addition circuit based on an alternative class of addition tables. Comput. Electr. Eng. Mitchell A. Thornton
2003	A	`conf`	PLFire: A Visualization Tool for Asynchronous Phased Logic Designs. DATE Kenneth Fazel, Mitchell A. Thornton, Robert B. Reese
2003	J	`jnl`	Performance Evaluation of a Parallel Decoupled Data Driven Multiprocessor. Parallel Process. Lett. Mitchell A. Thornton
2003	—	`conf`	Spectral Transforms of Mixed-radix MVL Functions. ISMVL Mitchell A. Thornton
2002	—	`conf`	Chrestenson Spectrum Computation Using Cayley Color Graphs. ISMVL Mitchell A. Thornton, D. Michael Miller, Whitney J. Townsend
2002	—	`conf`	Computing walsh, arithmetic, and reed-muller spectral decision diagrams using graph transformations. ACM Great Lakes Symposium on VLSI Whitney J. Townsend, Mitchell A. Thornton, Rolf Drechsler, D. Michael Miller
2002	—	`conf`	Efficient Adder Circuits Based on a Conservative Reversible Logic Gate. ISVLSI Jerry W. Bruce, Mitchell A. Thornton, L. Shivakumaraiah, P. S. Kokate, X. Li
2002	A	`conf`	Generalized Early Evaluation in Self-Timed Circuits. DATE Mitchell A. Thornton, Kenneth Fazel, Robert B. Reese, Cherrice Traver
2002	J	`jnl`	Logic Circuit Equivalence Checking Using Haar Spectral Coefficients and Partial BDDs. VLSI Design Mitchell A. Thornton, Rolf Drechsler, Wolfgang Günther
2002	—	`conf`	Low Power Optimization Techniques for BDD Mapped Finite State Machines. IWLS Mikael Kerttu, Per Lindgren, Rolf Drechsler, Mitchell A. Thornton
2002	—	`conf`	Multi-Output Timed Shannon Circuits. ISVLSI Mitchell A. Thornton, Rolf Drechsler, D. Michael Miller
2002	—	`conf`	On-line Error Detection in a Carry-free Adder. IWLS Whitney J. Townsend, Mitchell A. Thornton, Parag K. Lala
2002	—	`conf`	Switching activity estimation of finite state machines for low power synthesis. ISCAS (4) Mikael Kerttu, Per Lindgren, Mitchell A. Thornton, Rolf Drechsler
2001	C	`conf`	Arithmetic Logic Circuits Using Self-Timed Bit Level Dataflow and Early Evaluation. ICCD Robert B. Reese, Mitchell A. Thornton, Cherrice Traver
2001	—	`conf`	Low power optimization technique for BDD mapped circuits. ASP-DAC Per Lindgren, Mikael Kerttu, Mitchell A. Thornton, Rolf Drechsler
2001	A	`conf`	Spectral decision diagrams using graph transformations. DATE Mitchell A. Thornton, Rolf Drechsler
2000	—	`conf`	A Method for Approximate Equivalence Checking. ISMVL Mitchell A. Thornton, Rolf Drechsler, Wolfgang Günther
2000	J	`jnl`	Boolean function representation and spectral characterization using AND/OR graphs. Integr. A. Zuzek, Rolf Drechsler, Mitchell A. Thornton
2000	B	`conf`	Cache Resident Data Locality Analysis. MASCOTS Q. G. Samdani, Mitchell A. Thornton
2000	—	`conf`	Computation of Spectral Information from Logic Netlists. ISMVL Rolf Drechsler, Mitchell A. Thornton
2000	—	`conf`	MDD-Based Synthesis of Multi-Valued Logic Networks. ISMVL Rolf Drechsler, Mitchell A. Thornton, David Wessels
1999	J	`jnl`	Behavioral synthesis of combinational logic using spectral-based heuristics. ACM Trans. Design Autom. Electr. Syst. Mitchell A. Thornton, V. S. S. Nair
1999	A	`conf`	Variable Reordering for Shared Binary Decision Diagrams Using Output Probabilities. DATE Mitchell A. Thornton, J. P. Williams, Rolf Drechsler, Nicole Drechsler
1998	—	`conf`	Integration of CAD tools and structured design principles in an undergraduate computer engineering curriculum. WCAE@ISCA David L. Andrews, Mitchell A. Thornton
1997	—	`conf`	Graph Analysis and Transformation Techniques for Runtime Minimization in Multi-Threaded Architectures. HICSS (1) Mitchell A. Thornton, David L. Andrews
1997	J	`jnl`	Signed Binary Addition Circuitry with Inherent Even Parity Outputs. IEEE Trans. Computers Mitchell A. Thornton
1995	J	`jnl`	Efficient calculation of spectral coefficients and their applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Mitchell A. Thornton, V. S. S. Nair
1993	—	`conf`	An iterative combinational logic synthesis technique using spectral information. EURO-DAC Mitchell A. Thornton, V. S. S. Nair