Mino Kim

13 papers A 1C 1Journal 6Unranked 5
YearRankTypeTitle / Venue / Authors
2026 — conf
A 1cnm 14.4Gb/s/pin 16Gb LPDDR6 SDRAM with Efficiency Mode, LDO-Based WCK Tree, Dynamic Write NT-ODT, Fast CS Control and System Meta Mode.
ISSCC
Jungtaek You, Mino Kim, Dae-Han Kwon, SangSic Yoon, Joonhong Park, Hyungrok Do, Jeongje Park, Yooseok Jung, Seongseop Lee, Kyuyoung Kim, Hyeongsoo Jeong, Jaeyeol Kang, Hanbyeol Kwon, Minwook Oh, Jieun Kim, Jinseok Oh, Gi-Moon Hong, Dongyoon Ka, Seungho Lee, Heewoong Song, Minchang Kim, Daeho Yun, Sooncheol Kwon, Dongbeom Lee, Taekyun Shin, Jongmyeong Lee, Jungmin Yoon, Kyeong Pil Kang, Sanghyuk Heo, Dongkyun Kim, Jieun Jang, Hyungsoo Kim
2024 — conf
13.8 A 1a-nm 1.05V 10.5Gb/s/pin 16Gb LPDDR5 Turbo DRAM with WCK Correction Strategy, a Voltage-Offset-Calibrated Receiver and Parasitic Capacitance Reduction.
ISSCC
Yangho Seo, Jihee Choi, Sunki Cho, Hyunwook Han, Wonjong Kim, Gyeongha Ryu, Jungil Ahn, Younga Cho, Sungphil Choi, Seohee Lee, Wooju Lee, Chaehyuk Lee, Kiup Kim, Seongseop Lee, Sangbeom Park, Minjun Choi, Sungwoo Lee, Mino Kim, Taekyun Shin, Hyeongsoo Jeong, Hyunseung Kim, Houk Song, Yunsuk Hong, Seokju Yoon, Giwook Park, Hokeun You, Changkyu Choi, Hae-Kang Jung, Joohwan Cho, Jonghwan Kim
2021 J jnl
A Controller PHY for Managed DRAM Solution With Damping-Resistor-Aided Pulse-Based Feed-Forward Equalizer.
IEEE J. Solid State Circuits
Hyeongjun Ko, Mino Kim, Hyunkyu Park, Sangyoon Lee, Jaewook Kim, Suhwan Kim, Joo-Hyung Chae
2020 J jnl
A 9Gb/s Wide Output Range Transmitter With 2D Binary-Segmented Driver and Dual-Loop Calibration for Intra-Panel Interfaces.
IEEE Trans. Circuits Syst. II Express Briefs
Yong-Un Jeong, Jihwan Park, Mino Kim, Joo-Hyung Chae, Jaekwang Yun, Hyunjoong Lee, Suhwan Kim
2018 J jnl
A 3.2 Gb/s 16-Channel Transmitter for Intra-Panel Interfaces, With Independently Controllable Output Swing, Common-Mode Voltage, and Equalization.
IEEE Access
Joo-Hyung Chae, Mino Kim, Gi-Moon Hong, Jihwan Park, Suhwan Kim
2018 J jnl
A 4266 Mb/s/pin LPDDR4 Interface With An Asynchronous Feedback CTLE and An Adaptive 3-Step Eye Detection Algorithm for Memory Controller.
IEEE Trans. Circuits Syst. II Express Briefs
Mino Kim, Joo-Hyung Chae, Sungphil Choi, Gi-Moon Hong, Hyeongjun Ko, Deog-Kyoon Jeong, Suhwan Kim
2017 A conf
A 0.13pJ/bit, referenceless transceiver with clock edge modulation for a wired intra-BAN communication.
ISLPED
Jihwan Park, Gi-Moon Hong, Mino Kim, Joo-Hyung Chae, Suhwan Kim
2017 — conf
An 8Gb/s adaptive DFE with level calibration using training data pattern for mobile DRAM interface.
ISOCC
Minchang Kim, Jihwan Park, Joo-Hyung Chae, Hyeongjun Ko, Mino Kim, Suhwan Kim
2016 J jnl
A Sub-1.0-V On-Chip CMOS Thermometer With a Folded Temperature Sensor for Low-Power Mobile DRAM.
IEEE Trans. Circuits Syst. II Express Briefs
Hyunjoong Lee, Daeyong Shim, Cyuyeol Rhee, Mino Kim, Suhwan Kim
2016 C conf
Phase shift keying demodulator with decision feedback phase-locked loop.
ISCAS
Jae-Whan Lee, Mino Kim, Jihwan Park, Gi-Moon Hong, Suhwan Kim
2015 — conf
A 1.74mW/GHz 0.11-2.5GHz fast-locking, jitter-reducing, 180° phase-shift digital DLL with a window phase detector for LPDDR4 memory controllers.
A-SSCC
Joo-Hyung Chae, Gi-Moon Hong, Jihwan Park, Mino Kim, Hyeongjun Ko, Woo-Yeol Shin, Hankyu Chi, Deog-Kyoon Jeong, Suhwan Kim
2013 — conf
High-resolution and wide-dynamic range time-to-digital converter with a multi-phase cyclic Vernier delay line.
ESSCIRC
Mino Kim, Woo-Yeol Shin, Gi-Moon Hong, Jihwan Park, Joo-Hyung Chae, Nan Xing, Jong-Kwan Woo, Suhwan Kim
2012 J jnl
Static-switching pulse domino: A switching-aware design technique for wide fan-in dynamic multiplexers.
Integr.
Rahul Singh, Gi-Moon Hong, Mino Kim, Jihwan Park, Woo-Yeol Shin, Suhwan Kim