Mingyan Yu

34 papers C 3Misc 2Journal 10Unranked 19
YearRankTypeTitle / Venue / Authors
2025 J jnl
Corrigendum to "Exploring the clinical diagnostic value of linguistic learning ability in patients with disorders of consciousness using electrooculography" [NeuroImage Volume 297 (2024) 120753].
NeuroImage
Xiangyue Xiao, Junhua Ding, Mingyan Yu, Zhicai Dong, Sara Cruz, Nai Ding, Charlène Aubinet, Steven Laureys, Haibo Di, Yan Chen
2024 J jnl
Exploring the clinical diagnostic value of linguistic learning ability in patients with disorders of consciousness using electrooculography.
NeuroImage
Xiangyue Xiao, Junhua Ding, Mingyan Yu, Zhicai Dong, Sara Cruz, Nai Ding, Charlène Aubinet, Steven Laureys, Haibo Di, Yan Chen
2023 — conf
A Study of the States Kinetics in NBTI and HCI Degradation based on TCAD.
EEET
Xinhuan Yang, Mingyan Yu, Xingyu Fang, Liang Wang, Chuanzheng Wang, Yuanfu Zhao
2023 J jnl
Comprehensive probability method of buffer insertion based on Gaussian fitting under process variation condition.
Microelectron. J.
Xinsheng Wang, Yanhong Song, Mingyan Yu
2018 J jnl
Structure-Preserving-Based Model-Order Reduction of Parameterized Interconnect Systems.
Circuits Syst. Signal Process.
Xinsheng Wang, Mingyan Yu, Chenxu Wang
2018 J jnl
The Error Bound of Timing Domain in Model Order Reduction by Krylov Subspace Methods.
J. Circuits Syst. Comput.
Xinsheng Wang, Mingyan Yu
2017 J jnl
The Minimum Norm Least-Squares Solution in Reduction by Krylov Subspace Methods.
J. Circuits Syst. Comput.
Xinsheng Wang, Chenxu Wang, Mingyan Yu
2016 J jnl
Swarm intelligence algorithm for interconnect model order reduction with sub-block structure preserving.
Int. J. Syst. Sci.
Xinsheng Wang, Chenxu Wang, Mingyan Yu
2015 — conf
A distinctive O(mn) time algorithm for optimal buffer insertions.
ISQED
Xinsheng Wang, Wenpan Liu, Mingyan Yu
2013 J jnl
A Low Power and variation-Insensitive Current-Mode Signaling Scheme.
J. Circuits Syst. Comput.
Xinsheng Wang, Yizhe Hu, Liang Han, Jinghu Li, Chenxu Wang, Mingyan Yu
2013 J jnl
An intelligent classification method for Trojan detection based on side-channel analysis.
IEICE Electron. Express
Chenxu Wang, Jinghu Li, Mingyan Yu, Jinxiang Wang
2013 — conf
Robust current-mode on-chip interconnect signaling scheme in deep submicron.
ASICON
Xinsheng Wang, Mingyang Hu, Mingyan Yu
2013 — conf
The Analysis of Generic SIMT Scheduling Model Extracted from GPU.
NCCET
Yuanxu Xu, Mingyan Yu, Chao Zhang, Bing Yang
2012 — conf
A more practical CPA attack against present hardware implementation.
CCIS
Chenxu Wang, Mingyan Yu, Jinxiang Wang, Peihe Jiang, Xiaochen Tang
2012 — conf
Novel O-GEHL Based Hyperblock Predictor for EDGE Architectures.
NAS
Pengfei Gou, Bing Yang, Mingyan Yu, Zhigang Mao
2011 — conf
A 16 bit low voltage low power Delta Sigma modulator.
EMEIT
Yongsheng Wang, Yuanhong Li, Mingyan Yu
2011 — conf
Power Research of JPEG Circuits in FPGA.
IIH-MSP
Xinsheng Wang, Mingyan Yu
2010 C conf
M5 based EDGE architecture modeling.
ICCD
Pengfei Gou, Qingbo Li, Yinghan Jin, Qi Zheng, Bing Yang, Mingyan Yu, Jinxiang Wang
2010 — conf
MMPI: A flexible and efficient multiprocessor message passing interface for NoC-based MPSoC.
SoCC
Fangfa Fu, Siyue Sun, Xin'an Hu, Junjie Song, Jinxiang Wang, Mingyan Yu
2009 — conf
Wideband reconfigurable CMOS Gm-C filter For wireless applications.
ICECS
Zhiqiang Gao, Jinxiang Wang, Fengchang Lai, Mingyan Yu, Zhongzhao Zhang
2008 J jnl
A Fully Integrated CMOS Active Bandpass Filter for Multiband RF Front-Ends.
IEEE Trans. Circuits Syst. II Express Briefs
Zhiqiang Gao, Jianguo Ma, Mingyan Yu, Yizheng Ye
2006 C conf
A CMOS bandpass filter with wide-tuning range for wireless applications.
ISCAS
Zhiqiang Gao, Mingyan Yu, Yizheng Ye, Jianguo Ma
2006 — conf
A Novel Input Stage Based on DTMOS for Low-Voltage Low-Noise Operational Amplifier.
APCCAS
Zhiyuan Li, Mingyan Yu, Jianguo Ma
2006 Misc conf
A Pipelined Switched-Current Chaotic System for the High-Speed Truly Random Number Generation in Crypto Processor.
VLSI Design
Tong Zhou, Mingyan Yu, Yizheng Ye
2006 Misc conf
A Rail-to-Rail I/O Operational Amplifier with 0.5% gm Fluctuation Using Double P-channel Differential Input Pairs.
VLSI Design
Zhiyuan Li, Mingyan Yu, Jianguo Ma
2006 — conf
Design of A Low Power High Entropy Chaos-Based Truly Random Number Generator.
APCCAS
Tong Zhou, Zhibo Zhou, Mingyan Yu, Yizheng Ye
2006 — conf
Embedded DC-DC Voltage Down Converter for Low-Power VLSI Chip.
APCCAS
Qianneng Zhou, Fengchang Lai, Mingyan Yu
2006 — conf
Low-noise high-precision operational amplifier using vertical NPN transistor in CMOS technology.
ACM Great Lakes Symposium on VLSI
Zhiyuan Li, Fengchang Lai, Mingyan Yu
2006 — conf
On-chip 3.3V-to-1.8V voltage down converter for low-power VLSI chips.
ACM Great Lakes Symposium on VLSI
Qianneng Zhou, Fengchang Lai, Mingyan Yu
2006 C conf
Post linearization of CMOS LNA using double cascade FETs.
ISCAS
Guochi Huang, Tae-sung Kim, Byung-Sung Kim, Mingyan Yu, Yizheng Ye
2005 — conf
A CMOS RF tuning wide-band bandpass filter for wireless applications.
SoCC
Zhiqiang Gao, Jianguo Ma, Mingyan Yu, Yizheng Ye
2005 — conf
Large tuning band range of high frequency filter for wireless applications.
ISCAS (1)
Zhiqiang Gao, Jianguo Ma, Yizheng Ye, Mingyan Yu
2003 — conf
A Test Architecture for System-on-a-Chip.
Asian Test Symposium
Yongsheng Wang, Liyi Xiao, Mingyan Yu, Jinxiang Wang, Yizheng Ye
2002 — conf
Design and implementation of concatenated decoder.
DCV
Yuxin You, Jinxiang Wang, Mingyan Yu, Yizheng Ye