Ming Ming Wong

36 papers C 9Misc 1Journal 11Unranked 15

Year	Rank	Type	Title / Venue / Authors
2024	J	`jnl`	1.63 pJ/SOP Neuromorphic Processor With Integrated Partial Sum Routers for In-Network Computing. IEEE Trans. Very Large Scale Integr. Syst. Dongrui Li, Ming Ming Wong, Yi Sheng Chong, Jun Zhou, Mohit Upadhyay, Ananta Narayanan Balaji, Aarthy Mani, Weng-Fai Wong, Li-Shiuan Peh, Anh Tuan Do, Bo Wang
2023	C	`conf`	1.7pJ/SOP Neuromorphic Processor with Integrated Partial Sum Routers for In-Network Computing. ISCAS Bo Wang, Ming Ming Wong, Dongrui Li, Yi Sheng Chong, Jun Zhou, Weng-Fai Wong, Li-Shiuan Peh, Aarthy Mani, Mohit Upadhyay, Ananta Narayanan Balaji, Anh Tuan Do
2022	C	`conf`	A 1800μm ISCAS Jingjing Lan, Vishnu P. Nambiar, Ming Ming Wong, Fei Li, Yuan Gao, Kevin Tshun Chuan Chai, Anh Tuan Do
2022	J	`jnl`	Coreset: Hierarchical neuromorphic computing supporting large-scale neural networks with improved resource efficiency. Neurocomputing Liwei Yang, Huaipeng Zhang, Tao Luo, Chuping Qu, Myat Thu Linn Aung, Yingnan Cui, Jun Zhou, Ming Ming Wong, Junran Pu, Anh Tuan Do, Rick Siow Mong Goh, Weng-Fai Wong
2022	J	`jnl`	Corrigendum to "Coreset: Hierarchical neuromorphic computing supporting large-scale neural networks with improved resource efficiency" [Neurocomputing (2022) 128-140]. Neurocomputing Liwei Yang, Huaipeng Zhang, Tao Luo, Chuping Qu, Myat Thu Linn Aung, Yingnan Cui, Jun Zhou, Ming Ming Wong, Junran Pu, Anh Tuan Do, Rick Siow Mong Goh, Weng-Fai Wong
2021	—	`conf`	A 2.1 pJ/SOP 40nm SNN Accelerator Featuring On-chip Transfer Learning using Delta STDP. ESSCIRC Ming Ming Wong, S. B. Shrestha, Vishnu P. Nambiar, Aarthy Mani, Yun Kwan Lee, Eng-Kiat Koh, W. Jiang, Kevin Tshun Chuan Chai, Anh-Tuan Do
2021	—	`conf`	A 2.1 pJ/SOP 40nm SNN Accelerator Featuring On-chip Transfer Learning using Delta STDP. ESSDERC Ming Ming Wong, S. B. Shrestha, Vishnu P. Nambiar, Aarthy Mani, Yun Kwan Lee, Eng-Kiat Koh, W. Jiang, Kevin Tshun Chuan Chai, Anh-Tuan Do
2021	C	`conf`	A 25 TOPS/W High Power Efficiency Deterministic and Split Stochastic MAC (SC-MAC) Design. VLSI-SoC Ming Ming Wong, Lu Chen, Anh Tuan Do
2021	J	`jnl`	A 5.28-mm² 4.5-pJ/SOP Energy-Efficient Spiking Neural Network Hardware With Reconfigurable High Processing Speed Neuron Core and Congestion-Aware Router. IEEE Trans. Circuits Syst. I Regul. Pap. Junran Pu, Wang Ling Goh, Vishnu P. Nambiar, Ming Ming Wong, Anh Tuan Do
2021	—	`conf`	A Backpropagation Extreme Learning Machine Approach to Fast Training Neural Network-Based Side-Channel Attack. AsianHOST Xuyang Huang, Ming Ming Wong, Anh Tuan Do, Wang Ling Goh
2021	—	`conf`	An Improved Deterministic Stochastic MAC (SC-MAC) for High Power Efficiency Design. VLSI-SoC (Selected Papers) Ming Ming Wong, Lu Chen, Anh Tuan Do
2021	J	`jnl`	Energy Efficient 0.5V 4.8pJ/SOP 0.93μW Leakage/Core Neuromorphic Processor Design. IEEE Trans. Circuits Syst. II Express Briefs Vishnu P. Nambiar, Junran Pu, Yun Kwan Lee, Aarthy Mani, Eng-Kiat Koh, Ming Ming Wong, Fei Li, Wang Ling Goh, Anh Tuan Do
2020	—	`conf`	0.5V 4.8 pJ/SOP 0.93µW Leakage/core Neuromorphic Processor with Asynchronous NoC and Reconfigurable LIF Neuron. A-SSCC Vishnu P. Nambiar, Junran Pu, Yun Kwan Lee, Aarthy Mani, Tao Luo, L. Yang, Eng-Kiat Koh, Ming Ming Wong, Fei Li, Wang Ling Goh, Anh Tuan Do
2020	C	`conf`	Scalable Block-Based Spiking Neural Network Hardware with a Multiplierless Neuron Model. ISCAS Vishnu P. Nambiar, Eng-Kiat Koh, Junran Pu, Aarthy Mani, Ming Ming Wong, Li Fei, Wang Ling Goh, Anh Tuan Do
2020	C	`conf`	Ultra-Low Leakage, High Fan-Out Neuro Connection Map with TCAM-Based LUT, Localized Priority Encoder and Decoder-Less SRAM. ISCAS Aarthy Mani, Fei Li, Ming Ming Wong, Luo Tao, Liwei Yang, Vishnu Paramasivam, Anh Tuan Do
2019	—	`conf`	0.54 pJ/bit, 15Mb/s True Random Number Generator Using Probabilistic Delay Cell for Edge Computing Applications. A-SSCC Fei Li, Ming Ming Wong, Aarthy Mani, Vishnu Paramasivam, Anh-Tuan Do
2019	Misc	`conf`	Criticality Aware Soft Error Mitigation in the Configuration Memory of SRAM Based FPGA. VLSID Swagata Mandal, Sreetama Sarkar, Ming Ming Wong, Anupam Chattopadhyay, Amlan Chakrabarti
2019	—	`conf`	Folded and Deterministic Stochastic MAC for High Accuracy and Hardware Efficient Convolution Function. SoCC Ming Ming Wong, Anh-Tuan Do
2019	—	`conf`	Lightweight Secure-Boot Architecture for RISC-V System-on-Chip. ISQED Jawad Haj-Yahya, Ming Ming Wong, Vikramkumar Pudi, Shivam Bhasin, Anupam Chattopadhyay
2018	C	`conf`	A New High Throughput and Area Efficient SHA-3 Implementation. ISCAS Ming Ming Wong, Jawad Haj-Yahya, Suman Sau, Anupam Chattopadhyay
2018	J	`jnl`	A tree search algorithm for low multiplicative complexity logic design. Future Gener. Comput. Syst. Jia Jun Tay, M. L. Dennis Wong, Ming Ming Wong, Cishen Zhang, Ismat Hijazin
2018	C	`conf`	Construction of a Low Multiplicative Complexity GF (2 TENCON Jia Jun Tay, M. L. Dennis Wong, Ming Ming Wong, Cishen Zhang, Ismat Hijazin
2018	J	`jnl`	Criticality Aware Soft Error Mitigation in the Configuration Memory of SRAM based FPGA. CoRR Swagata Mandal, Sreetama Sarkar, Ming Ming Wong, Anupam Chattopadhyay, Amlan Chakrabarti
2018	C	`conf`	Lightweight and High Performance SHA-256 using Architectural Folding and 4-2 Adder Compressor. VLSI-SoC Ming Ming Wong, Vikramkumar Pudi, Anupam Chattopadhyay
2018	—	`conf`	SMARTS: secure memory assurance of RISC-V trusted SoC. HASP@ISCA Ming Ming Wong, Jawad Haj-Yahya, Anupam Chattopadhyay
2017	J	`jnl`	Stochastic Computing with Spiking Neural P Systems. J. Univers. Comput. Sci. Ming Ming Wong, Mou Ling Dennis Wong
2017	—	`conf`	Survey of secure processors. SAMOS Suman Sau, Jawad Haj-Yahya, Ming Ming Wong, Kwok-Yan Lam, Anupam Chattopadhyay
2015	—	`conf`	Compact and short critical path finite field inverter for cryptographic S-box. DSP Ming Ming Wong, Mou Ling Dennis Wong, C. Zhang, Ismat Hijazin
2014	—	`conf`	Compact and low power AES block cipher using lightweight key expansion mechanism and optimal number of S-Boxes. ISPACS Jia Jun Tay, Ming Ming Wong, Ismat Hijazin
2014	—	`conf`	New lightweight AES S-box using LFSR. ISPACS Ming Ming Wong, Mou Ling Dennis Wong
2012	—	`conf`	AES S-box using Fermat's Little Theorem for the highly constrained embedded devices. EUSIPCO Ming Ming Wong, M. L. Dennis Wong, Asoke K. Nandi, Ismat Hijazin
2012	C	`conf`	Compact Multiplicative Inverter for Hardware Elliptic Curve Cryptosystem. NPC Ming Ming Wong, Mou Ling Dennis Wong, Ka Lok Man
2012	J	`jnl`	Construction of Optimum Composite Field Architecture for Compact High-Throughput AES S-Boxes. IEEE Trans. Very Large Scale Integr. Syst. Ming Ming Wong, M. L. Dennis Wong, Asoke K. Nandi, Ismat Hijazin
2011	J	`jnl`	Composite field GF(((2 IET Circuits Devices Syst. Ming Ming Wong, M. L. Dennis Wong, Asoke K. Nandi, Ismat Hijazin
2010	—	`conf`	A new common subexpression elimination algorithm with application in composite field AES S-box. ISSPA Ming Ming Wong, M. L. Dennis Wong
2010	J	`jnl`	A throughput maximised parallel architecture for 2D fast Discrete Pascal Transform. Comput. Electr. Eng. Ming Ming Wong, M. L. Dennis Wong, Ismat Hijazin