Ming Liu - RankMe

100 papers A* 2C 6Journal 44Unranked 47

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	14.1 THz-TSI: A 0.33pJ/b 264Gb/s Through-Silicon Interconnect Module for 3D Integration Utilizing Terahertz Coupling. ISSCC Chen Jiang, Xiaodi Feng, Xiaohan Shen, Chixiao Chen, Qi Liu, Ming Liu, Ningsheng Xu
2026	—	`conf`	30.6 A 16Mb 166.8TOPS/W Near-Memory Phase-Domain-Computing Ferroelectric NAND Flash for Approximate Nearest Neighbor Search on Edge Devices. ISSCC Weizeng Li, Bohan Wang, Zhidao Zhou, Junyu Zhu, Zhi Li, Junzhe Shen, Wenfeng Zha, Zhongze Han, Yiman Wang, Linfang Wang, Hongyang Hu, Qing Luo, Chunmeng Dou, Ming Liu
2026	—	`conf`	A 1.2GHz 12.77GB/s/mm ISSCC Yue Cao, Jinghao Jiang, Haijun Jiang, Qian Zhang, Xuanzhi Liu, Jinhui Cheng, Zhongze Han, Xiping Jiang, Fengguo Zuo, Song Wang, Fujun Bai, Yixin Guo, Chunmeng Dou, Jianguo Yang, Hangbing Lv, Qi Liu, Ming Liu
2026	—	`conf`	A 128×96 Multimodal Flash LiDAR SPAD Imager with Object Segmentation Latency of 18μs Based on Compute-Near-Sensor Ising Annealing Machine. ISSCC Jingyi Wang, Tao Hong, Bu Chen, Zhangcheng Huang, Qi Liu, Ming Liu
2026	—	`conf`	A 12nm 4Mb 104.56-to-137.75TFLOPS/W Charge-Trap Transistor-Based Computing-in-Memory Macro Using Analog-Predict-Digital-Compute for AI Edge Devices. ISSCC Junzhe Shen, Zhidao Zhou, Wenfeng Zha, Zhi Li, Weizeng Li, Bohan Wang, Junyu Zhu, Hanghang Gao, Zhongze Han, Yiman Wang, Linfang Wang, Hongyang Hu, Qing Luo, Chunmeng Dou, Ming Liu
2026	J	`jnl`	A 13-GS/s 9-bit Time-Interleaved Pipelined-SAR ADC With Common-Mode Regulated Floating-Inverter-Amplifier and Rapid-Tracking Bootstrapped Switch. IEEE Trans. Circuits Syst. I Regul. Pap. Ji Guo, Jianwei Liu, Danfeng Zhai, Xinsheng Wang, Wenning Jiang, Qi Liu, Ming Liu
2026	—	`conf`	A 16Gb/s/pin 0.51pJ/b Single-Ended NRZ Transceiver with Distributed Dual-Loop VDDQ-Ripple Compensation and Dynamic Clock Duty-Cycle Calibration for Memory Interfaces. ISSCC Yuchen He, Yunbin Luo, Yunzhengmao Wang, Tengyue Yi, Chen Jiang, Chixiao Chen, Qi Liu, Ming Liu, Wenning Jiang
2026	J	`jnl`	A 22-nm 109.3-to-249.5-TFLOPS/W Outlier-Aware Floating-Point SRAM Compute-in-Memory Macro for Large Language Models. IEEE J. Solid State Circuits Siqi He, Haozhe Zhu, Hongyi Zhang, Yujie Ma, Zexing Chen, Mengjie Li, Danfeng Zhai, Chixiao Chen, Qi Liu, Xiaoyang Zeng, Ming Liu
2026	J	`jnl`	SHINSAI: A 586 mm IEEE J. Solid State Circuits Haozhe Zhu, Bo Jiao, Yuman Zeng, Yongjiang Li, Jie Liao, Siyao Jia, Zexing Chen, Liyu Lin, Xuanda Lin, Suchang Huang, Mochen Tian, Jundong Zhu, Dexin Wen, Yan Wang, Yu Wang, Jian Xu, Feng Wang, Jun Tao, Chixiao Chen, Qi Liu, Ming Liu
2025	—	`conf`	37.4 SHINSAI: A 586mm ISSCC Bo Jiao, Haozhe Zhu, Yuman Zeng, Yongjiang Li, Jie Liao, Siyao Jia, Mochen Tian, Zexing Chen, Jundong Zhu, Dexin Wen, Yan Wang, Yu Wang, Jian Xu, Feng Wang, Jun Tao, Chixiao Chen, Qi Liu, Ming Liu
2025	—	`conf`	A PMOS-Based Deep Cryogenic CMOS Temperature Sensor Achieving a Range from 10K to 410K with a Relative Inaccuracy of 0.5% (3σ). CICC Xingyu Qi, Yingzhe Sha, Xufeng Kou, Xiaoyong Xue, Peng Wang, Zhangcheng Huang, Qi Liu, Ming Liu
2025	J	`jnl`	A Six-Phase Harmonic-Rejection Digital Transmitter. IEEE J. Solid State Circuits Jiaxiang Li, Zimu Li, Yun Yin, Changgu Yan, Nan Qi, Ming Liu, Hongtao Xu
2025	J	`jnl`	A monolithic 3D IGZO-RRAM-SRAM-integrated architecture for robust and efficient compute-in-memory enabling equivalent-ideal device metrics. Sci. China Inf. Sci. Shengzhe Yan, Zhaori Cong, Zi Wang, Zhuoyu Dai, Zeyu Guo, Zhihang Qian, Xufan Li, Xu Zheng, Chuanke Chen, Nianduan Lu, Chunmeng Dou, Guanhua Yang, Xiaoxin Xu, Di Geng, Jinshan Yue, Lingfei Wang, Ling Li, Ming Liu
2025	A*	`conf`	An Energy-Efficient High-Utilization Hardware Architecture for Attention Mechanism in Transformer using Balanced Systolic Array and Multi-Row Interleaved Operation Ordering. DAC Haiyang Zhou, Hongyang Hu, Jinshan Yue, Hanghang Gao, Yuanlu Xie, Xiaoxin Xu, Chunmeng Dou, Ming Liu
2025	A*	`conf`	EIGEN: Enabling Efficient 3DIC Interconnect with Heterogeneous Dual-Layer Network-on-Active-Interposer. HPCA Siyao Jia, Bo Jiao, Haozhe Zhu, Chixiao Chen, Qi Liu, Ming Liu
2025	J	`jnl`	Efficient modeling of ionic and electronic interactions by a resistive memory-based reservoir graph neural network. Nat. Comput. Sci. Meng Xu, Shaocong Wang, Yangu He, Yi Li, Woyu Zhang, Ming Yang, Xiaojuan Qi, Zhongrui Wang, Ming Xu, Dashan Shang, Qi Liu, Xiangshui Miao, Ming Liu
2025	J	`jnl`	Resistive memory-based zero-shot liquid state machine for multimodal event data learning. Nat. Comput. Sci. Ning Lin, Shaocong Wang, Yi Li, Bo Wang, Shuhui Shi, Yangu He, Woyu Zhang, Yifei Yu, Yue Zhang, Xinyuan Zhang, Kwunhang Wong, Songqi Wang, Xiaoming Chen, Hao Jiang, Xumeng Zhang, Peng Lin, Xiaoxin Xu, Xiaojuan Qi, Zhongrui Wang, Dashan Shang, Qi Liu, Ming Liu
2024	—	`conf`	34.9 A Flash-SRAM-ADC-Fused Plastic Computing-in-Memory Macro for Learning in Neural Networks in a Standard 14nm FinFET Process. ISSCC Linfang Wang, Weizeng Li, Zhidao Zhou, Hanghang Gao, Zhi Li, Wang Ye, Hongyang Hu, Jing Liu, Jinshan Yue, Jianguo Yang, Qing Luo, Chunmeng Dou, Qi Liu, Ming Liu
2024	J	`jnl`	A 28-nm Floating-Point Computing-in-Memory Processor Using Intensive-CIM Sparse-Digital Architecture. IEEE J. Solid State Circuits Shengzhe Yan, Jinshan Yue, Chaojie He, Zi Wang, Zhaori Cong, Yifan He, Mufeng Zhou, Wenyu Sun, Xueqing Li, Chunmeng Dou, Feng Zhang, Huazhong Yang, Yongpan Liu, Ming Liu
2024	—	`conf`	A 32×32 Flash LiDAR SPAD Sensor with Up-to-1kfps Motional Target Detection by Threshold-adaptive 2D Dynamic Vision. CICC Jingyi Wang, Zhangcheng Huang, Bu Chen, Hongyang Shang, Jiapei Zheng, Hankun Lv, Chixiao Chen, Qi Liu, Ming Liu
2024	—	`conf`	A 32×32 SPAD LiDAR Sensor with In-pixel Spatial-temporal Coincidence and Per-SPAD Pulse Delay for Resolution-lossless Imaging. A-SSCC Bu Chen, Zhangcheng Huang, Jingyi Wang, Hongyang Shang, Hankun Lv, Qi Liu, Ming Liu
2024	—	`conf`	A 41.7TOPS/W@INT8 Computing-in-Memory Processor with Zig-Zag Backbone-Systolic CIM and Block/Self-Gating CAM for NN/Recommendation Applications. VLSI Technology and Circuits Zhuoyu Dai, Shengzhe Yan, Zhaori Cong, Zeyu Guo, Yifan He, Wenyu Sun, Chunmeng Dou, Feng Zhang, Jinshan Yue, Yongpan Liu, Ming Liu
2024	J	`jnl`	A 9-Mb HZO-Based Embedded FeRAM With 10-Cycle Endurance and 5/7-ns Read/Write Using ECC-Assisted Data Refresh and Offset-Canceled Sense Amplifier. IEEE J. Solid State Circuits Qiqiao Wu, Yue Cao, Qing Luo, Haijun Jiang, Zhongze Han, Yongkang Han, Chunmeng Dou, Hangbing Lv, Qi Liu, Jianguo Yang, Ming Liu
2024	J	`jnl`	An Energy-Efficient Computing-in-Memory NN Processor With Set-Associate Blockwise Sparsity and Ping-Pong Weight Update. IEEE J. Solid State Circuits Jinshan Yue, Yongpan Liu, Xiaoyu Feng, Yifan He, Jingyu Wang, Zhe Yuan, Mingtao Zhan, Jiaxin Liu, Jian-Wei Su, Yen-Lin Chung, Ping-Chun Wu, Li-Yang Hong, Meng-Fan Chang, Nan Sun, Chunmeng Dou, Xueqing Li, Ming Liu, Huazhong Yang
2024	J	`jnl`	Binary-Stochasticity-Enabled Highly Efficient Neuromorphic Deep Learning Achieves Better-than-Software Accuracy. Adv. Intell. Syst. Yang Li, Wei Wang, Ming Wang, Chunmeng Dou, Zhengyu Ma, Huihui Zhou, Peng Zhang, Nicola Lepri, Xumeng Zhang, Qing Luo, Xiaoxin Xu, Guanhua Yang, Feng Zhang, Ling Li, Daniele Ielmini, Ming Liu
2024	J	`jnl`	Continuous-Time Digital Twin with Analogue Memristive Neural Ordinary Differential Equation Solver. CoRR Hegan Chen, Jichang Yang, Jia Chen, Songqi Wang, Shaocong Wang, Dingchen Wang, Xinyu Tian, Yifei Yu, Xi Chen, Yinan Lin, Yangu He, Xiaoshan Wu, Yi Li, Xinyuan Zhang, Ning Lin, Meng Xu, Xumeng Zhang, Zhongrui Wang, Han Wang, Dashan Shang, Qi Liu, Kwang-Ting Cheng, Ming Liu
2024	J	`jnl`	Dynamic neural network with memristive CIM and CAM for 2D and 3D vision. CoRR Yue Zhang, Woyu Zhang, Shaocong Wang, Ning Lin, Yifei Yu, Yangu He, Bo Wang, Hao Jiang, Peng Lin, Xiaoxin Xu, Xiaojuan Qi, Zhongrui Wang, Xumeng Zhang, Dashan Shang, Qi Liu, Kwang-Ting Cheng, Ming Liu
2024	J	`jnl`	Efficient and accurate neural field reconstruction using resistive memory. CoRR Yifei Yu, Shaocong Wang, Woyu Zhang, Xinyuan Zhang, Xiuzhe Wu, Yangu He, Jichang Yang, Yue Zhang, Ning Lin, Bo Wang, Xi Chen, Songqi Wang, Xumeng Zhang, Xiaojuan Qi, Zhongrui Wang, Dashan Shang, Qi Liu, Kwang-Ting Cheng, Ming Liu
2024	—	`conf`	First Demonstration of Monolithic Three-Dimensional Integration of Ultra-High Density Hybrid IGZO/Si SRAM and IGZO 2T0C DRAM Achieving Record-Low Latency (5000s). VLSI Technology and Circuits Menggan Liu, Zhi Li, Wendong Lu, Kaifei Chen, Jiebin Niu, Fuxi Liao, Zijing Wu, Congyan Lu, Weizeng Li, Di Geng, Nianduan Lu, Chunmeng Dou, Guanhua Yang, Ling Li, Ming Liu
2024	—	`conf`	Ge-doped In2O3: First Demonstration of Utlizing Ge as Oxygen Vacancy Consumer to Break the Mobility/Reliability Tradeoff for High Performance Oxide TFTs. VLSI Technology and Circuits Jiayi Wang, Ziheng Bai, Kuo Zhang, Zhicheng Wu, Di Geng, Yang Xu, Nannan You, Yuxuan Li, Guanhua Yang, Ling Li, Shengkai Wang, Ming Liu
2024	J	`jnl`	Hardware Implementation of Next Generation Reservoir Computing with RRAM-Based Hybrid Digital-Analog System. Adv. Intell. Syst. Danian Dong, Woyu Zhang, Yuanlu Xie, Jinshan Yue, Kuan Ren, Hongjian Huang, Xu Zheng, Wenxuan Sun, Jinru Lai, Shaoyang Fan, Hongzhou Wang, Zhaoan Yu, Zhihong Yao, Xiaoxin Xu, Dashan Shang, Ming Liu
2024	—	`conf`	High-efficient and Comprehensive Modeling of MFIM Ferroelectric Tunnel Junctions for Non-volatile/Volatile Applications. IMW Yu Li, Hao Jiang, Jie Yu, Xuanyu Zhao, Xiaodong Wang, Qihan Liu, Yingfen Wei, Qi Liu, Ming Liu
2024	J	`jnl`	Resistive Memory-based Neural Differential Equation Solver for Score-based Diffusion Model. CoRR Jichang Yang, Hegan Chen, Jia Chen, Songqi Wang, Shaocong Wang, Yifei Yu, Xi Chen, Bo Wang, Xinyuan Zhang, Binbin Cui, Yi Li, Ning Lin, Meng Xu, Xiaoxin Xu, Xiaojuan Qi, Zhongrui Wang, Xumeng Zhang, Dashan Shang, Han Wang, Qi Liu, Kwang-Ting Cheng, Ming Liu
2024	J	`jnl`	SLAM-CIM: A Visual SLAM Backend Processor With Dynamic-Range-Driven-Skipping Linear-Solving FP-CIM Macros. IEEE J. Solid State Circuits Mengjie Li, Haozhe Zhu, Siqi He, Hongyi Zhang, Jie Liao, Danfeng Zhai, Chixiao Chen, Qi Liu, Xiaoyang Zeng, Ninghui Sun, Ming Liu
2023	—	`conf`	16-layer 3D Vertical RRAM with Low Read Latency (18ns), High Nonlinearity (>5000) and Ultra-low Leakage Current (~pA) Self-Selective Cells. VLSI Technology and Circuits Yaxin Ding, Jianguo Yang, Yu Liu, Jianfeng Gao, Yuan Wang, Pengfei Jiang, Shuxian Lv, Yuting Chen, Boping Wang, Wei Wei, Tiancheng Gong, Kanhao Xue, Qing Luo, Xiangshui Miao, Ming Liu
2023	J	`jnl`	A 14b 500 MS/s Single-Channel Pipelined-SAR ADC With Reference Ripple Mitigation Techniques and Adaptively Biased Floating Inverter Amplifier. IEEE J. Solid State Circuits Wenning Jiang, Yan Zhu, Chixiao Chen, Hao Xu, Qi Liu, Ming Liu, Rui Paulo Martins, Chi-Hang Chan
2023	J	`jnl`	A 28-nm RRAM Computing-in-Memory Macro Using Weighted Hybrid 2T1R Cell Array and Reference Subtracting Sense Amplifier for AI Edge Inference. IEEE J. Solid State Circuits Wang Ye, Linfang Wang, Zhidao Zhou, Junjie An, Weizeng Li, Hanghang Gao, Zhi Li, Jinshan Yue, Hongyang Hu, Xiaoxin Xu, Jianguo Yang, Jing Liu, Dashan Shang, Feng Zhang, Jinghui Tian, Chunmeng Dou, Qi Liu, Ming Liu
2023	—	`conf`	A 28nm 16.9-300TOPS/W Computing-in-Memory Processor Supporting Floating-Point NN Inference/Training with Intensive-CIM Sparse-Digital Architecture. ISSCC Jinshan Yue, Chaojie He, Zi Wang, Zhaori Cong, Yifan He, Mufeng Zhou, Wenyu Sun, Xueqing Li, Chunmeng Dou, Feng Zhang, Huazhong Yang, Yongpan Liu, Ming Liu
2023	—	`conf`	A 28nm 53.8TOPS/W 8b Sparse Transformer Accelerator with In-Memory Butterfly Zero Skipper for Unstructured-Pruned NN and CIM-Based Local-Attention-Reusable Engine. ISSCC Shiwei Liu, Peizhe Li, Jinshan Zhang, Yunzhengmao Wang, Haozhe Zhu, Wenning Jiang, Shan Tang, Chixiao Chen, Qi Liu, Ming Liu
2023	—	`conf`	A 5.6-89.9TOPS/W Heterogeneous Computing-in-Memory SoC with High-Utilization Producer-Consumer Architecture and High-Frequency Read-Free CIM Macro. VLSI Technology and Circuits Jinshan Yue, Mingtao Zhan, Zi Wang, Yifan He, Yaolei Li, Songming Yu, Wenyu Sun, Lu Jie, Chunmeng Dou, Xueqing Li, Nan Sun, Huazhong Yang, Ming Liu, Yongpan Liu
2023	—	`conf`	A 9Mb HZO-Based Embedded FeRAM with 10 ISSCC Jianguo Yang, Qing Luo, Xiaoyong Xue, Haijun Jiang, Qiqiao Wu, Zhongze Han, Yue Cao, Yongkang Han, Chunmeng Dou, Hangbing Lv, Qi Liu, Ming Liu
2023	J	`jnl`	Binary stochasticity enabled highly efficient neuromorphic deep learning achieves better-than-software accuracy. CoRR Yang Li, Wei Wang, Ming Wang, Chunmeng Dou, Zhengyu Ma, Huihui Zhou, Peng Zhang, Nicola Lepri, Xumeng Zhang, Qing Luo, Xiaoxin Xu, Guanhua Yang, Feng Zhang, Ling Li, Daniele Ielmini, Ming Liu
2023	J	`jnl`	CNN Accelerator at the Edge With Adaptive Zero Skipping and Sparsity-Driven Data Flow. IEEE Trans. Circuits Syst. Video Technol. Ming Liu, Changchun Zhou, Siyuan Qiu, Yifan He, Hailong Jiao
2023	J	`jnl`	Echo state graph neural networks with analogue random resistive memory arrays. Nat. Mac. Intell. Shaocong Wang, Yi Li, Dingchen Wang, Woyu Zhang, Xi Chen, Danian Dong, Songqi Wang, Xumeng Zhang, Peng Lin, Claudio Gallicchio, Xiaoxin Xu, Qi Liu, Kwang-Ting Cheng, Zhongrui Wang, Dashan Shang, Ming Liu
2023	—	`conf`	First Demonstration of a Design Methodology for Highly Reliable Operation at High Temperature on 128kb 1T1C FeRAM Chip. VLSI Technology and Circuits Tiancheng Gong, Lihua Xu, Wei Wei, Pengfei Jiang, Peng Yuan, Bowen Nie, Yuanquan Huang, Yuan Wang, Yang Yang, Jianfeng Gao, Junfeng Li, Jun Luo, Lingfei Wang, Jianguo Yang, Qing Luo, Ling Li, Steve S. Chung, Ming Liu
2023	J	`jnl`	Pruning random resistive memory for optimizing analogue AI. CoRR Yi Li, Songqi Wang, Yaping Zhao, Shaocong Wang, Woyu Zhang, Yangu He, Ning Lin, Binbin Cui, Xi Chen, Shiming Zhang, Hao Jiang, Peng Lin, Xumeng Zhang, Xiaojuan Qi, Zhongrui Wang, Xiaoxin Xu, Dashan Shang, Qi Liu, Kwang-Ting Cheng, Ming Liu
2023	J	`jnl`	Random resistive memory-based deep extreme point learning machine for unified visual processing. CoRR Shaocong Wang, Yizhao Gao, Yi Li, Woyu Zhang, Yifei Yu, Bo Wang, Ning Lin, Hegan Chen, Yue Zhang, Yang Jiang, Dingchen Wang, Jia Chen, Peng Dai, Hao Jiang, Peng Lin, Xumeng Zhang, Xiaojuan Qi, Xiaoxin Xu, Hayden K. H. So, Zhongrui Wang, Dashan Shang, Qi Liu, Kwang-Ting Cheng, Ming Liu
2023	J	`jnl`	Resistive memory-based zero-shot liquid state machine for multimodal event data learning. CoRR Ning Lin, Shaocong Wang, Yi Li, Bo Wang, Shuhui Shi, Yangu He, Woyu Zhang, Yifei Yu, Yue Zhang, Xiaojuan Qi, Xiaoming Chen, Hao Jiang, Xumeng Zhang, Peng Lin, Xiaoxin Xu, Qi Liu, Zhongrui Wang, Dashan Shang, Ming Liu
2022	—	`conf`	3D Reservoir Computing with High Area Efficiency (5.12 TOPS/mm VLSI Technology and Circuits Wenxuan Sun, Woyu Zhang, Jie Yu, Yi Li, Zeyu Guo, Jinru Lai, Danian Dong, Xu Zheng, Fei Wang, Shaoyang Fan, Xiaoxin Xu, Dashan Shang, Ming Liu
2022	—	`conf`	An LUT-Based Multiplier Array for Systolic Array-Based Convolutional Neural Network Accelerator. APCCAS Ming Liu, Yifan He, Hailong Jiao
2022	—	`conf`	COMB-MCM: Computing-on-Memory-Boundary NN Processor with Bipolar Bitwise Sparsity Optimization for Scalable Multi-Chiplet-Module Edge Machine Learning. ISSCC Haozhe Zhu, Bo Jiao, Jinshan Zhang, Xinru Jia, Yunzhengmao Wang, Tianchan Guan, Shengcheng Wang, Dimin Niu, Hongzhong Zheng, Chixiao Chen, Mingyu Wang, Lihua Zhang, Xiaoyang Zeng, Qi Liu, Yuan Xie, Ming Liu
2022	—	`conf`	Compact Modeling of IGZO-based CAA-FETs with Time-zero-instability and BTI Impact on Device and Capacitor-less DRAM Retention Reliability. VLSI Technology and Circuits Jingrui Guo, Ying Sun, Lingfei Wang, Xinlv Duan, Kailiang Huang, Zhaogui Wang, Junxiao Feng, Qian Chen, Shijie Huang, Lihua Xu, Di Geng, Guangfan Jiao, Shihui Yin, Zhengbo Wang, Weiliang Jing, Ling Li, Ming Liu
2022	—	`conf`	Few-shot graph learning with robust and energy-efficient memory-augmented graph neural network (MAGNN) based on homogeneous computing-in-memory. VLSI Technology and Circuits Woyu Zhang, Shaocong Wang, Yi Li, Xiaoxin Xu, Danian Dong, Nanjia Jiang, Fei Wang, Zeyu Guo, Renrui Fang, Chunmeng Dou, Kai Ni, Zhongrui Wang, Dashan Shang, Ming Liu
2022	—	`conf`	First Demonstration of High-Sensitivity (NEP 1fW VLSI Technology and Circuits Yuan Qin, Congyan Lu, Zhaoan Yu, Zhihong Yao, Feihong Wu, Danian Dong, Xiaolong Zhao, Guangwei Xu, Yuhao Zhang, Shibing Long, Ling Li, Ming Liu
2022	J	`jnl`	STICKER-IM: A 65 nm Computing-in-Memory NN Processor Using Block-Wise Sparsity Optimization and Inter/Intra-Macro Data Reuse. IEEE J. Solid State Circuits Jinshan Yue, Yongpan Liu, Zhe Yuan, Xiaoyu Feng, Yifan He, Wenyu Sun, Zhixiao Zhang, Xin Si, Ruhui Liu, Zi Wang, Meng-Fan Chang, Chunmeng Dou, Xueqing Li, Ming Liu, Huazhong Yang
2022	—	`conf`	Scaling Dual-Gate Ultra-thin a-IGZO FET to 30 nm Channel Length with Record-high Gm, max of 559 µS/µm at VDS=1 V, Record-low DIBL of 10 mV/V and Nearly Ideal SS of 63 mV/dec. VLSI Technology and Circuits Kaifei Chen, Jiebin Niu, Guanhua Yang, Menggan Liu, Wendong Lu, Fuxi Liao, Kailiang Huang, Xinlv Duan, Congyan Lu, Jiawei Wang, Lingfei Wang, Mengmeng Li, Di Geng, Chao Zhao, Guilei Wang, Nianduan Lu, Ling Li, Ming Liu
2022	—	`conf`	Vertical Channel-All-Around (CAA) IGZO FET under 50 nm CD with High Read Current of 32.8 μA/μm (Vth + 1 V), Well-performed Thermal Stability up to 120 ℃ for Low Latency, High-density 2T0C 3D DRAM Application. VLSI Technology and Circuits Kailiang Huang, Xinlv Duan, Junxiao Feng, Ying Sun, Congyan Lu, Chuanke Chen, Guangfan Jiao, Xinpeng Lin, Jinhai Shao, Shihui Yin, Jiazhen Sheng, Zhaogui Wang, Wenqiang Zhang, Xichen Chuai, Jiebin Niu, Wenwu Wang, Ying Wu, Weiliang Jing, Zhengbo Wang, Jeffrey Xu, Guanhua Yang, Di Geng, Ling Li, Ming Liu
2021	—	`conf`	14.6 A 76-to-81GHz 2×8 FMCW MIMO Radar Transceiver with Fast Chirp Generation and Multi-Feed Antenna-in-Package Array. ISSCC Zongming Duan, Bowen Wu, ChuanMing Zhu, Yan Wang, Weiwei Jin, Ying Liu, Yanhui Wu, Tao Zhang, Ming Liu, Bingfei Dou, Bingbing Liao, Wei Lv, Dongfang Pan, Yongjie Li, Changwei Wang, Yuefei Dai, Pei Li, Hao Gao
2021	—	`conf`	24.2 A 14nm-FinFET 1Mb Embedded 1T1R RRAM with a 0.022µ m ISSCC Jianguo Yang, Xiaoyong Xue, Xiaoxin Xu, Qiao Wang, Haijun Jiang, Jie Yu, Danian Dong, Feng Zhang, Hangbing Lv, Ming Liu
2021	—	`conf`	A 1.25W 46.5%-Peak-Efficiency Transformer-in-Package Isolated DC-DC Converter Using Glass-Based Fan-Out Wafer-Level Packaging Achieving 50mW/mm2 Power Density. ISSCC Dongfang Pan, Guolong Li, Fangting Miao, Biao Deng, Junying Wei, Daquan Yu, Ming Liu, Lin Cheng
2021	J	`jnl`	A low-power twiddle factor addressing architecture for split-radix FFT processor. Microelectron. J. Ming Liu, Ping Zhao, Tianshu Wu, Keshab K. Parhi, Xiaoyang Zeng, Yun Chen
2021	J	`jnl`	Echo state graph neural networks with analogue random resistor arrays. CoRR Shaocong Wang, Yi Li, Dingchen Wang, Woyu Zhang, Xi Chen, Danian Dong, Songqi Wang, Xumeng Zhang, Peng Lin, Claudio Gallicchio, Xiaoxin Xu, Qi Liu, Kwang-Ting Cheng, Zhongrui Wang, Dashan Shang, Ming Liu
2021	J	`jnl`	High-Density 3-D Stackable Crossbar 2D2R nvTCAM With Low-Power Intelligent Search for Fast Packet Forwarding in 5G Applications. IEEE J. Solid State Circuits Keji Zhou, Xiaoyong Xue, Jianguo Yang, Xiaoxin Xu, Hangbing Lv, Ming-e Jing, Jing Li, Xiaoyang Zeng, Ming Liu
2021	J	`jnl`	Investigation of weight updating modes on oxide-based resistive switching memory synapse towards neuromorphic computing applications. Sci. China Inf. Sci. Qingting Ding, Tiancheng Gong, Jie Yu, Xiaoxin Xu, Xiaoyan Li, Hangbing Lv, Jianguo Yang, Qing Luo, Peng Yuan, Feng Zhang, Ming Liu
2021	J	`jnl`	Simulations of single event effects on the ferroelectric capacitor-based non-volatile SRAM design. Sci. China Inf. Sci. Jianjian Wang, Jinshun Bi, Gang Liu, Hua Bai, Kai Xi, Bo Li, Sandip Majumdar, Lanlong Ji, Ming Liu, Zhangang Zhang
2021	C	`conf`	Sparsity-Aware Clamping Readout Scheme for High Parallelism and Low Power Nonvolatile Computing-in-Memory Based on Resistive Memory. ISCAS Linfang Wang, Wang Ye, Junjie An, Chunmeng Dou, Qi Liu, Meng-Fan Chang, Ming Liu
2020	—	`conf`	A 28nm 1.5Mb Embedded 1T2R RRAM with 14.8 Mb/mm VLSI Circuits Jianguo Yang, Xiaoyong Xue, Xiaoxin Xu, Hangbing Lv, Feng Zhang, Xiaoyang Zeng, Meng-Fan Chang, Ming Liu
2020	J	`jnl`	A 6.78-MHz Single-Stage Wireless Charger With Constant-Current Constant-Voltage Charging Technique. IEEE J. Solid State Circuits Lin Cheng, Xinyuan Ge, Wai Chiu Ng, Wing-Hung Ki, Jiawei Zheng, Tsz Fai Kwok, Chi-Ying Tsui, Ming Liu
2020	J	`jnl`	A Low Power 4T2C nvSRAM With Dynamic Current Compensation Operation Scheme. IEEE Trans. Very Large Scale Integr. Syst. Chao Liu, Jianguo Yang, Pengfei Jiang, Qiao Wang, Donglin Zhang, Tiancheng Gong, Qingting Ding, Yuling Zhao, Qing Luo, Xiaoyong Xue, Hangbing Lv, Ming Liu
2020	—	`conf`	Design of a Single-Stage Wireless Charger with 92.3%-Peak-Efficiency for Portable Devices Applications. ASP-DAC Lin Cheng, Xinyuan Ge, Wai Chiu Ng, Wing-Hung Ki, Jiawei Zheng, Tsz Fai Kwok, Chi-Ying Tsui, Ming Liu
2019	J	`jnl`	A 0.75 V reference clamping sense amplifier for low-power high-density ReRAM with dynamic pre-charge technique. IEICE Electron. Express Jiahao Yin, Chunmeng Dou, Danian Dong, Jie Yu, Xiaoxin Xu, Qing Luo, Tiancheng Gong, Lu Tai, Peng Yuan, Xiaoyong Xue, Ming Liu, Hangbing Lv
2019	—	`conf`	A 28nm 512Kb adjacent 2T2R RRAM PUF with interleaved cell mirroring and self-adaptive splitting for extremely low bit error rate of cryptographic key. A-SSCC Xiaoyong Xue, Jianguo Yang, Yuejun Zhang, Mingyu Wang, Hangbing Lv, Xiaoyang Zeng, Ming Liu
2019	—	`conf`	A 6.78MHz 92.3%-Peak-Efficiency Single-Stage Wireless Charger with CC-CV Charging and On-Chip Bootstrapping Techniques. VLSI Circuits Lin Cheng, Xinyuan Ge, Wai Chiu Ng, Wing-Hung Ki, Jiawei Zheng, Tsz Fai Kwok, Chi-Ying Tsui, Ming Liu
2019	J	`jnl`	A Few-Step and Low-Cost Memristor Logic Based on MIG Logic for Frequent-Off Instant-On Circuits in IoT Applications. IEEE Trans. Circuits Syst. II Express Briefs Yiming Wang, Yun Li, Haihua Shen, Dongyu Fan, Wei Wang, Ling Li, Qi Liu, Feng Zhang, Xinghua Wang, Meng-Fan Chang, Ming Liu
2019	—	`conf`	A High Reliability 500 µW Resistance-to-Digital Interface Circuit for SnO2 Gas Sensor IoT Applications. ASICON Jianguo Yang, Xiaowen Li, Qingting Ding, Xiaoyong Xue, Xiaoxin Xu, Qing Luo, Hangbing Lv, Ming Liu
2019	J	`jnl`	A Novel General Compact Model Approach for 7nm Technology Node Circuit Optimization from Device Perspective and Beyond. CoRR Qiang Huo, Zhenhua Wu, Weixing Huang, Xingsheng Wang, Geyu Tang, Jiaxin Yao, Yongpan Liu, Feng Zhang, Ling Li, Ming Liu
2019	J	`jnl`	Low-Noise Broadband CMOS TIA Based on Multi-Stage Stagger-Tuned Amplifier for High-Speed High-Sensitivity Optical Communication. IEEE Trans. Circuits Syst. I Regul. Pap. Dan Li, Ming Liu, Shengwei Gao, Yongjun Shi, Yihua Zhang, Zhiyong Li, Patrick Yin Chiang, Franco Maloberti, Li Geng
2019	—	`ch.`	Resistive Switching Devices: Mechanism, Performance and Integration. Handbook of Memristor Networks Ming Liu, Qi Liu, Hangbing Lv, Shibing Long
2019	J	`jnl`	Total ionizing dose effects on graphene-based charge-trapping memory. Sci. China Inf. Sci. Kai Xi, Jinshun Bi, Sandip Majumdar, Bo Li, Jing Liu, Yannan Xu, Ming Liu
2018	C	`conf`	Low-Noise High-Linearity 56Gb/s PAM-4 Optical Receiver in 45nm SOI CMOS. ISCAS Yang Xie, Dan Li, Yiqun Liu, Ming Liu, Yihua Zhang, Xiaoli Wang, Li Geng
2018	—	`conf`	Nonvolatile Crossbar 2D2R TCAM with Cell Size of 16.3 F A-SSCC Keji Zhou, Xiaoyong Xue, Jianguo Yang, Xiaoxin Xu, Hangbing Lv, Mingyu Wang, Ming-e Jing, Wenjun Liu, Xiaoyang Zeng, Steve S. Chung, Jing Li, Ming Liu
2017	—	`conf`	A 0.13μm 64Mb HfOx ReRAM using configurable ramped voltage write and low read-disturb sensing techniques for reliability improvement. CICC Xiaowei Han, Qian Jia, Hongbin Sun, Longfei Wang, Huaqiang Wu, Yimao Cai, Feng Zhang, Yongyi Xie, Fangxu Dong, Xiaoguang Wang, Xiaofei Xue, Li Pang, Xiaoqing Zhao, Mengnan Wu, Pu Bai, Qi Liu, Hangbing Lv, Bing Yu, Chao Zhao, He Qian, Ru Huang, Ming Liu, Yumei Zhou, Nanning Zheng, Qiwei Ren
2017	—	`conf`	A 130nm 1Mb HfOx embedded RRAM macro using self-adaptive peripheral circuit system techniques for 1.6X work temperature range. A-SSCC Feng Zhang, Dongyu Fan, Yuan Duan, Jin Li, Cong Fang, Yun Li, Xiaowei Han, Lan Dai, Cheng-Ying Chen, Jinshun Bi, Ming Liu, Meng-Fan Chang
2017	—	`conf`	A 51Gb/s, 320mW, PAM4 CDR with baud-rate sampling for high-speed optical interconnects. A-SSCC Nan Qi, Yuhang Kang, Qipeng Lin, Jianxu Ma, Jingbo Shi, Bozhi Yin, Chang Liu, Rui Bai, Shang Hu, Juncheng Wang, Jiangbing Du, Lin Ma, Zuyuan He, Ming Liu, Feng Zhang, Patrick Yin Chiang
2017	J	`jnl`	Total ionizing dose effects and annealing behaviors of HfO Sci. China Inf. Sci. Yannan Xu, Jinshun Bi, Gaobo Xu, Kai Xi, Bo Li, Ming Liu
2016	—	`conf`	A 25Gb/s low-noise optical receiver in 0.13 μm SiGe BiCMOS. ICECS Dan Li, Zimou Zhang, Yang Xie, Ming Liu, Qian Yang, Li Geng
2016	J	`jnl`	Study of total ionizing dose induced read bit errors in magneto-resistive random access memory. Microelectron. Reliab. Haohao Zhang, Jinshun Bi, Haibin Wang, Hongyang Hu, Jin Li, Lanlong Ji, Ming Liu
2015	—	`conf`	Impact of P/E cycling on read current fluctuation of NOR Flash memory cell: A microscopic perspective based on low frequency noise analysis. IRPS Xiaonan Yang, Jing Liu, Zhiwei Zheng, Yan Wang, Dandan Jiang, Shengfen Chiu, Hanming Wu, Ming Liu
2011	J	`jnl`	3D Integration of CMOL Structures for FPGA Applications. IEEE Trans. Computers Zine Abid, Ming Liu, Wei Wang
2011	J	`jnl`	FPGA Based on Integration of CMOS and RRAM. IEEE Trans. Very Large Scale Integr. Syst. Sansiri Tanachutiwat, Ming Liu, Wei Wang
2010	C	`conf`	A low power single ended input differential output low noise amplifier for L1/L2 band. ISCAS Yonghui Ji, Ming Liu, Qin Wang, Shibing Long, Zhaoan Yu, Manhong Zhang
2010	C	`conf`	Formation and annihilation of Cu conductive filament in the nonpolar resistive switching Cu/ZrO2: Cu/Pt ReRAM. ISCAS Ming Liu, Qi Liu, Shibing Long, Weihua Guan
2009	—	`conf`	Carbon Nanotube Nanorelays with Pass-Transistor for FPGA Routing Devices. NanoNet Ming Liu, Haigang Yang, Sansiri Tanachutiwat, Wei Wang
2009	—	`conf`	FPGA based on integration of carbon nanorelays and CMOS devices. NANOARCH Ming Liu, Haigang Yang, Sansiri Tanachutiwat, Wei Wang
2008	C	`conf`	Analyzing mixed carbon nanotube bundles: A current density study. ISCAS Liwei Shang, Ming Liu, Sansiri Tanachutiwat, Wei Wang
2008	—	`conf`	FPAA Based on Integration of CMOS and Nanojunction Devices for Neuromorphic Applications. NanoNet Ming Liu, Hua Yu, Wei Wang
2008	—	`conf`	rFGA: CMOS-nano hybrid FPGA using RRAM components. NANOARCH Ming Liu, Wei Wang
2007	C	`conf`	Fault Tolerance Circuit for AM-OLED. ISCAS Dayong Li, Ming Liu, Wei Wang
2006	J	`jnl`	Hybrid Nanoelectronics: Future of Computer Technology. J. Comput. Sci. Technol. Wei Wang, Ming Liu, Andrew Hsu
2006	J	`jnl`	Modeling and simulation development of electron beam resist based on cellular automata. Microelectron. J. Ling Li, Shibing Long, Congshun Wang, Wengang Wu, Yilong Hao, Ming Liu