Ming-Ju Edward Lee

12 papers C 1Journal 7Unranked 4
YearRankTypeTitle / Venue / Authors
2021 — conf
3.2 The A100 Datacenter GPU and Ampere Architecture.
ISSCC
Jack Choquette, Ming-Ju Edward Lee, Ronny Krashinsky, Vishnu Balan, Brucek Khailany
2014 — conf
26.1 A 130mW 20Gb/s half-duplex serial link in 28nm CMOS.
ISSCC
Vishnu Balan, Olakanmi Oluwole, Gregory Kodani, Charlie Zhong, Sanjeev Maheswari, Ratnakar Dadi, Arif Amin, Gautam Bhatia, Peter Mills, Ahmed Ragab, Ming-Ju Edward Lee
2014 J jnl
A 15-22 Gbps Serial Link in 28 nm CMOS With Direct DFE.
IEEE J. Solid State Circuits
Vishnu Balan, Olakanmi Oluwole, Gregory Kodani, Charlie Zhong, Ratnakar Dadi, Arif Amin, Ahmed Ragab, Ming-Ju Edward Lee
2005 J jnl
A 20-Gb/s 0.13-μm CMOS serial link transmitter using an LC-PLL to directly drive the output multiplexer.
IEEE J. Solid State Circuits
Patrick Chiang, William J. Dally, Ming-Ju Edward Lee, Ramesh Senthinathan, Yangjin Oh, Mark A. Horowitz
2004 J jnl
A 33-mW 8-Gb/s CMOS clock multiplier and CDR for highly integrated I/Os.
IEEE J. Solid State Circuits
Ramin Farjad-Rad, Anhtuyet Nguyen, James Tran, Trey Greer, John Poulton, William J. Dally, John H. Edmondson, Ramesh Senthinathan, Rohit Rathi, Ming-Ju Edward Lee, Hiok-Tiaq Ng
2003 — conf
A 33mW 8Gb/s CMOS clock multiplier and CDR for highly integrated I/Os.
CICC
Hiok-Tiaq Ng, Ming-Ju Edward Lee, Ramin Farjad-Rad, Ramesh Senthinathan, William J. Dally, Anhtuyet Nguyen, Rohit Rathi, Trey Greer, John Poulton, John H. Edmondson, James Tran
2003 J jnl
A second-order semidigital clock recovery circuit based on injection locking.
IEEE J. Solid State Circuits
Hiok-Tiaq Ng, Ramin Farjad-Rad, Ming-Ju Edward Lee, William J. Dally, Trey Greer, John Poulton, John H. Edmondson, Rohit Rathi, Ramesh Senthinathan
2003 C conf
CMOS High-Speed I/Os - Present and Future.
ICCD
Ming-Ju Edward Lee, William J. Dally, Ramin Farjad-Rad, Hiok-Tiaq Ng, Ramesh Senthinathan, John H. Edmondson, John W. Poulton
2003 J jnl
Jitter transfer characteristics of delay-locked loops - theories and design techniques.
IEEE J. Solid State Circuits
Ming-Ju Edward Lee, William J. Dally, Trey Greer, Hiok-Tiaq Ng, Ramin Farjad-Rad, John Poulton, Ramesh Senthinathan
2002 J jnl
A low-power multiplying DLL for low-jitter multigigahertz clock generation in highly integrated digital chips.
IEEE J. Solid State Circuits
Ramin Farjad-Rad, William J. Dally, Hiok-Tiaq Ng, Ramesh Senthinathan, Ming-Ju Edward Lee, Rohit Rathi, John Poulton
2001 — conf
Monolithic chaotic communications system.
ISCAS (3)
Patrick Chiang, William J. Dally, Ming-Ju Edward Lee
2000 J jnl
Low-power area-efficient high-speed I/O circuit techniques.
IEEE J. Solid State Circuits
Ming-Ju Edward Lee, William J. Dally, Patrick Chiang