Ming-Hwa Sheu - RankMe

110 papers B 1C 14Journal 37Unranked 58

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	Modified Wallace-Tree Architecture Design and Implementation for High-Speed Multiplier. ICECS Bing-Huang Wu, Tung-Chin Tsai, Ming-Hwa Sheu, Chung-Ho Chen
2025	J	`jnl`	VLSI Architecture Design for Compact Shortcut Denoising Autoencoder Neural Network of ECG Signal. IEEE Trans. Circuits Syst. I Regul. Pap. Shin-Chi Lai, Szu-Ting Wang, S. M. Salahuddin Morsalin, Jia-He Lin, Shih-Chang Hsia, Chuan-Yu Chang, Ming-Hwa Sheu
2024	—	`conf`	DMCGF Dehazing Neural Network Design for Edge-AI Implementation. CyberSciTech Kuo-Yi Chang, Kun-Lin Li, Ming-Hwa Sheu, Szu-Hong Wang
2024	J	`jnl`	High Precision, Low Complexity, and Fast Calculation Based on Hybrid Recursive DFT and FFT Algorithms for Electrochemical Impedance Spectroscopy System. IEEE Trans. Instrum. Meas. Ming-Hwa Sheu, En-Chi Yang, Szu-Ting Wang, Wen-Ho Juang, Shin-Chi Lai
2024	—	`conf`	Integrating Noise Classification and Speech Enhancement Model for Hearing Aids. ISOCC Ying-Hsiu Hung, Yen-Ching Chang, Shin-Chi Lai, Wen-Ho Juang, Ming-Hwa Sheu, Jeng-Dao Lee
2024	—	`conf`	Low-Complexity RDFT-Based Impedance Calculation for Enhanced EIS Analysis. APCCAS Wen-Ho Juang, Li-Chuan Hsu, Hau-Ping Chen, En-Chi Yang, Ming-Hwa Sheu
2023	—	`conf`	A Low-Complexity Convolution Network for Upscale Super-Resolution Image. ICKII Shih-Chang Hsia, Szu-Hong Wang, Ming-Hwa Sheu, Wei-Chien Yuan
2023	—	`conf`	Convolutional Neural Network-based Keyword Classification for Mixer Control. ISOCC Ying-Hsiu Hung, Yen-Ching Chang, Szu-Ting Wang, Jeng-Dao Lee, Wen-Ho Juang, Ming-Hwa Sheu, Shin-Chi Lai
2023	—	`conf`	Fast Measurement of Impedance Calculation for Electrochemical Impedance Spectroscopy. ISOCC En-Chi Yang, Szu-Ting Wang, Kusn-Lin Liu, Wen-Ho Juang, Ming-Hwa Sheu, How-Chiun Wu, Shin-Chi Lai
2023	—	`conf`	Heart Valve Disease Recognition Using Phonocardiogram Signal Based on A Lightweight Convolution Neural Network. ISOCC Yen-Ching Chang, Szu-Ting Wang, Ying-Hsiu Hung, Yao-Feng Liang, Ming-Hwa Sheu, Shin-Chi Lai
2023	J	`jnl`	Improvement of Human Pose Estimation and Processing With the Intensive Feature Consistency Network. IEEE Access Ming-Hwa Sheu, S. M. Salahuddin Morsalin, Chung-Chian Hsu, Shin-Chi Lai, Szu-Hong Wang, Chuan-Yu Chang
2023	J	`jnl`	Portable RDFT-Based EIS System Design With a Low-Complexity Impedance Calculation. IEEE Trans. Instrum. Meas. Wen-Ho Juang, En-Chi Yang, Szu-Ting Wang, Ming-Hwa Sheu, How-Chiun Wu, Shin-Chi Lai
2023	—	`conf`	Unique Feature Extraction and Consistency Network for Skeleton Body Keypoints Configuration and Enhancement. ICKII Ming-Hwa Sheu, S. M. Salahuddin Morsalin, Yi-Wen Chang, Szu-Hong Wang, Chung-Chian Hsu, Shin-Chi Lai
2022	J	`jnl`	FHI-Unet: Faster Heterogeneous Images Semantic Segmentation Design and Edge AI Implementation for Visible and Thermal Images Processing. IEEE Access Ming-Hwa Sheu, S. M. Salahuddin Morsalin, Szu-Hong Wang, Lin-Keng Wei, Shih-Chang Hsia, Chuan-Yu Chang
2022	J	`jnl`	FIBS-Unet: Feature Integration and Block Smoothing Network for Single Image Dehazing. IEEE Access Ming-Hwa Sheu, S. M. Salahuddin Morsalin, Szu-Hong Wang, Yu-Teng Shen, Shih-Chang Hsia, Chuan-Yu Chang
2022	J	`jnl`	Hardware Accelerator Design of DCT Algorithm With Unique-Group Cosine Coefficients for Mel-Scale Frequency Cepstral Coefficients. IEEE Access Shin-Chi Lai, Ying-Hsiu Hung, Yi-Chang Zhu, Szu-Ting Wang, Qi-Xian Huang, Ming-Hwa Sheu, Wen-Ho Juang
2022	J	`jnl`	Integration Design of Portable ECG Signal Acquisition With Deep-Learning Based Electrode Motion Artifact Removal on an Embedded System. IEEE Access Yu-Syuan Jhang, Szu-Ting Wang, Ming-Hwa Sheu, Szu-Hong Wang, Shin-Chi Lai
2022	J	`jnl`	Lightweight Denoising Autoencoder Design for Noise Removal in Electrocardiography. IEEE Access Ming-Hwa Sheu, Yu-Syuan Jhang, Yen-Ching Chang, Szu-Ting Wang, Chuan-Yu Chang, Shin-Chi Lai
2021	J	`jnl`	A 0.3 V PNN Based 10T SRAM with Pulse Control Based Read-Assist and Write Data-Aware Schemes for Low Power Applications. Sensors Ming-Hwa Sheu, Chang-Ming Tsai, Ming-Yan Tsai, Shih-Chang Hsia, S. M. Salahuddin Morsalin, Jin-Fa Lin
2021	—	`conf`	A Novel Bird Detection and Identification based on DPU processor on PYNQ FPGA. ICCE-TW Guan-Zhou Lin, Hoang Minh Nguyen, Chi-Chia Sun, Po-Yu Kuo, Ming-Hwa Sheu
2021	—	`conf`	AIoT-based Audio Recognition System for Smart Home Applications. ICCE-TW Bo-Wei Chen, Yu-Syuan Jhang, Hao-Ting Pai, Szu-Hong Wang, Ming-Hwa Sheu, Tzu-Hsiung Chen
2021	J	`jnl`	FGSC: Fuzzy Guided Scale Choice SSD Model for Edge AI Design on Real-Time Vehicle Detection and Class Counting. Sensors Ming-Hwa Sheu, S. M. Salahuddin Morsalin, Jia-Xiang Zheng, Shih-Chang Hsia, Cheng-Jian Lin, Chuan-Yu Chang
2021	J	`jnl`	Fast-transient high-voltage buck-boost DC-DC conversion with low overshoot. Microelectron. J. Shih-Chang Hsia, Ming-Hwa Sheu, Jhih-Jian Jhou
2021	—	`conf`	Font-End Integrated Circuit Design for Plant Physiological Sensing. ICCE-TW En-Chi Yang, Ming Jie Lee, Wen-Ho Juang, Ming-Hwa Sheu, Shin-Chi Lai
2021	C	`conf`	Real-time Stereo Television Broadcasting System. ICCE Shih-Chang Hsia, Szu-Hong Wang, Ho-Cheng Tsai, Ming-Hwa Sheu
2021	—	`conf`	Software and Hardware Integration System Design with Fruit Identification for Smart Electronic Scale Applications. ICCE-TW Wei-Yu Zhu, Wing-Kwong Wong, S. M. Salahuddin Morsalin, Szu-Hong Wang, Ming-Hwa Sheu
2020	J	`jnl`	Cost-Effective LED Dimming Driver With Single Chip Design for Smart Lighting System. IEEE Access Shih-Chang Hsia, Ming-Hwa Sheu, Jyun-Jia Ciou
2020	—	`conf`	Real-Time Lighter Sound Recognition System for IoT Applications. ICCE-TW Yu-Sheng Yang, Che-Wei Chen, Ming-Hwa Sheu, Szu-Hong Wang, Tzu-Hsiung Chen
2019	J	`jnl`	A Fast Non-Overlapping Multi-Camera People Re-Identification Algorithm and Tracking Based on Visual Channel Model. IEICE Trans. Inf. Syst. Chi-Chia Sun, Ming-Hwa Sheu, Jui-Yang Chi, Yan-Kai Huang
2019	C	`conf`	Implementation of FPGA-based Accelerator for Deep Neural Networks. DDECS Tsung-Han Tsai, Yuan-Chen Ho, Ming-Hwa Sheu
2019	J	`jnl`	Low Complexity and Low Power Sense-Amplifier Based Flip-Flop Design. IEICE Trans. Electron. Po-Yu Kuo, Chia-Hsin Hsieh, Jin-Fa Lin, Ming-Hwa Sheu, Yi-Ting Hung
2019	—	`conf`	Low-Power Counter-Based Delay Line Design For DPWM. ICCE-TW Cheng-Jie Yang, Ming-Jie Li, Chen-Yueh Liu, Ming-Hwa Sheu, Chi-Chia Sun
2019	—	`conf`	The Image Shape Recovery on Communication Data Lost Damage. ICUFN Shih-Chang Hsia, Ming-Hwa Sheu, Cheng Hung Hsiao
2018	C	`conf`	An Ultra-low-power True Single-phase Clocking Flip-flop with Improved Hold time Variation using Logic Structure Reduction Scheme. ISCAS Ming-Yan Tsai, Po-Yu Kuo, Jin-Fa Lin, Ming-Hwa Sheu
2017	—	`conf`	A new fall detection algorithm based on depth information using RGB-D camera. ISPACS Chi-Chia Sun, Ming-Hwa Sheu, Yu-Cheng Syu
2017	—	`conf`	High-performance reverse converter design for the new four-moduli Set {2 DSC Siang-Min Siao, Ming-Hwa Sheu, Shao-Yu Wang
2017	J	`jnl`	Low-Power 19-Transistor True Single-Phase Clocking Flip-Flop Design Based on Logic Structure Reduction Schemes. IEEE Trans. Very Large Scale Integr. Syst. Jin-Fa Lin, Ming-Hwa Sheu, Yin-Tsung Hwang, Chen-Syuan Wong, Ming-Yan Tsai
2016	—	`conf`	Edge-based moving object tracking algorithm for an embedded system. APCCAS Kai Xiang Yang, Ming-Hwa Sheu
2016	—	`conf`	Intelligent system design for variable color temperature LED street light. ICCE-TW Ming-Hwa Sheu, Li Hung Chang, Shih-Chang Hsia, Chi-Chia Sun
2016	J	`jnl`	New adaptable three-moduli set {2 IEICE Electron. Express Ming-Hwa Sheu, Siang-Min Siao, Yin-Tsung Hwang, Chi-Chia Sun, You-Ping Lin
2016	—	`conf`	Object detection using adaptive block-based background model. ICCE-TW Wen-Kai Tsai, Jian-Hui Chen, Ming-Hwa Sheu, Chi-Chia Sun
2016	—	`conf`	Single image fog removal algorithm based on an improved dark channel prior method. ISPACS Chi-Chia Sun, Heng-Chi Lai, Ming-Hwa Sheu, Yi-Hsing Huang
2015	—	`conf`	Efficient object motion detection based on RGB-D image. ICCE-TW Yi-Hua Wang, Ming-Hwa Sheu, Chi-Chia Sun
2015	—	`conf`	Extendable multi-pixel object labeling for digital image. ICCE-TW Ming-Hwa Sheu, Shyue-Wen Yang, Tzu-Hsiung Chen
2015	—	`conf`	High efficient hardware allocation framework of arbitrary inverse transform coding blocks in H.265. ISPACS Chi-Chia Sun, Heng-Chi Lai, Sin-Kun Lin, Ming-Hwa Sheu, Mladen Berekovic
2014	—	`conf`	Feature Points Based Video Object Tracking for Dynamic Scenes and Its FPGA System Prototyping. IIH-MSP Yin-Tsung Hwang, Bing Cheng Tsai, Yu-Ting Pai, Ming-Hwa Sheu
2014	—	`conf`	High Dynamic Range Image Based on Block-Based Edge Strength for Embedded System Design. IIH-MSP Wen-Kai Tsai, Chang Jie Lai, Ming-Hwa Sheu, Tsu Hsiung Chen
2014	—	`conf`	Ultra Low Power Circuit Design Based on Adiabatic Logic. IIH-MSP Chi-Chia Sun, Cheng Chih Wang, Ming-Hwa Sheu
2013	—	`conf`	A Computation Efficiency AND-CFAR for FMCW Radar Receiver. IIH-MSP Ho-En Liao, Guan-Yu Lin, Ming-Hwa Sheu, Siang-Min Siao, Sin-Siang Wan
2013	J	`jnl`	Efficient Reverse Converter Design for New Adaptable Four-Moduli Set {2 IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Ming-Hwa Sheu, Yuan-Ching Kuo, Su-Hon Lin, Siang-Min Siao
2013	—	`conf`	Fast Image Blending and Deghosting for Panoramic Video. IIH-MSP Chen-Hong Yuan, Jeng-Shyang Pan, Ming-Hwa Sheu, Tzu-Hsiung Chen
2012	—	`conf`	A hybrid pixel-based background model for image foreground object detection in complex sence. TSP Chung-Chi Lin, Wen-Kai Tsai, Ming-Hwa Sheu
2012	B	`conf`	A robust background modeling and foreground object detection using color component analysis. SMC Wen-Kai Tsai, Ming-Hwa Sheu, Chung-Chi Lin, Ho-En Liao
2012	J	`jnl`	Block-Based Major Color Method for Foreground Object Detection on Embedded SoC Platforms. IEEE Embed. Syst. Lett. Wen-Kai Tsai, Ming-Hwa Sheu, Chung-Chi Lin
2012	—	`conf`	Fast image moving object segmentation based on block texture for embedded system implementation. ISPACS Shyue-Wen Yang, Ming-Hwa Sheu, Wen-Kai Tsai
2012	C	`conf`	Low power 10-transistor full adder design based on degenerate pass transistor logic. ISCAS Jin-Fa Lin, Yin-Tsung Hwang, Ming-Hwa Sheu
2012	J	`jnl`	Low-Power Pulse-Triggered Flip-Flop Design With Conditional Pulse-Enhancement Scheme. IEEE Trans. Very Large Scale Integr. Syst. Yin-Tsung Hwang, Jin-Fa Lin, Ming-Hwa Sheu
2012	—	`conf`	Region-Based Background Subtraction for Complex Sense on Embedded Platforms. IIH-MSP Wen-Kai Tsai, Ming-Hwa Sheu, Chung-Chi Lin
2011	—	`conf`	Efficient Color-Ingredient Particle Filter for Video Object Tracking. IBICA Jian-Hui Chen, Wen-Kai Tsai, Ming-Hwa Sheu, Kai-Min Lin, Ho-En Liao
2011	—	`conf`	New Reverse Converter Design of Moduli Set {2n, 2n+1-1, 2n-1}. IBICA Yuan-Ching Kuo, Ming-Hwa Sheu, Siang-Min Siao, Cheng-Yi Huang, Tzu-Hsiung Chen
2010	J	`jnl`	A Low Complexity Dual-Mode Pulse-Triggered Flip-Flop Design Based on Unified AND/XNOR Logic. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Jin-Fa Lin, Yin-Tsung Hwang, Ming-Hwa Sheu
2010	J	`jnl`	A Low Complexity Low Power Signal Transition Detector Design for Self-Timed Circuits. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Jin-Fa Lin, Yin-Tsung Hwang, Ming-Hwa Sheu
2010	J	`jnl`	An Efficient Architecture of Extended Linear Interpolation for Image Processing. J. Inf. Sci. Eng. Chung-Chi Lin, Ming-Hwa Sheu, Huann-Keng Chiang, Chishyan Liaw, Zeng-Chuan Wu, Wen-Kai Tsai
2010	—	`conf`	Efficient Multi-Layer Background Model on Complex Environment for Foreground Object Detection. IIH-MSP Wen-Kai Tsai, Ming-Hwa Sheu, Chung-Chi Lin
2010	—	`conf`	FPGA implementation for image object detection system on NoCs. APCCAS Ming-Hwa Sheu, Shyue-Wen Yang, Wen-Sheng Huang, Siang-Min Siao
2010	J	`jnl`	Fast First-Order Polynomials Convolution Interpolation for Real-Time Digital Image Reconstruction. IEEE Trans. Circuits Syst. Video Technol. Chung-Chi Lin, Ming-Hwa Sheu, Chishyan Liaw, Huann-Keng Chiang
2010	—	`conf`	Fast Texture-Based Object Tracking Algorithm on Embedded Platform. FCST Ming-Hwa Sheu, Wen-Kai Tsai, Chuang-Chun Hu, Chun-Heng Tsao
2010	J	`jnl`	Low Power Pulse Generator Design Using Hybrid Logic. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Jin-Fa Lin, Yin-Tsung Hwang, Ming-Hwa Sheu
2009	C	`conf`	Efficient VLSI Design of a Reverse RNS Converter for New Flexible 4-Moduli Set (2 ISCAS Yuan-Ching Kuo, Su-Hon Lin, Ming-Hwa Sheu, Jia-You Wu, Peng-Siang Wang
2009	—	`conf`	Image Object Detection and Tracking Implementation for Outdoor Scenes on an Embedded Soc Platform. IIH-MSP Wen-Kai Tsai, Ming-Hwa Sheu, Ching-Lung Su, Jun-Jie Lin, Shau-Yin Tseng
2009	C	`conf`	Parallel 3-Pixel Labeling Method and its Hardware Architecture Design. IAS Shyue-Wen Yang, Ming-Hwa Sheu, Jun-Jie Lin, Chuang-Chun Hu, Tzu-Hsiung Chen, Shau-Yin Tseng
2008	—	`conf`	A Low-cost VLSI Design of Extended Linear Interpolation for Real Time Digital Image Processing. ICESS Chung-Chi Lin, Ming-Hwa Sheu, Huann-Keng Chiang, Zeng-Chuan Wu, Jia-Yi Tu, Chia-Hung Chen
2008	J	`jnl`	An efficient convolution interpolation kernel for digital image scaling. IEICE Electron. Express Chung-Chi Lin, Ming-Hwa Sheu, Huann-Keng Chiang, Chishyan Liaw, Zeng-Chuan Wu
2008	J	`jnl`	Area-Time Efficient Modulo 2 IEICE Trans. Inf. Syst. Su-Hon Lin, Ming-Hwa Sheu
2008	—	`conf`	Area-time-power efficient VLSI design for residue-to-binary converter based on moduli set (2 APCCAS Su-Hon Lin, Ming-Hwa Sheu, Chao-Hsiang Wang, Yuan-Ching Kuo
2008	J	`jnl`	Efficient VLSI Design of Residue-to-Binary Converter for the Moduli Set (2 IEICE Trans. Inf. Syst. Su-Hon Lin, Ming-Hwa Sheu, Chao-Hsiang Wang
2008	J	`jnl`	High-performance very large scale integration architecture design for various-ratio image scaling. J. Electronic Imaging Chung-Chi Lin, Ming-Hwa Sheu, Huann-Keng Chiang, Chishyan Liaw
2008	J	`jnl`	Low Complexity Dual-Mode Pulse Generator Designs. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Jin-Fa Lin, Yin-Tsung Hwang, Ming-Hwa Sheu
2008	—	`conf`	Real-time FPGA architecture of extended linear convolution for digital image scaling. FPT Chung-Chi Lin, Ming-Hwa Sheu, Huann-Keng Chiang, Wen-Kai Tsai, Zeng-Chuan Wu
2008	C	`conf`	The efficient VLSI design of BI-CUBIC convolution interpolation for digital image processing. ISCAS Chung-Chi Lin, Ming-Hwa Sheu, Huann-Keng Chiang, Chishyan Liaw, Zeng-Chuan Wu
2008	J	`jnl`	VLSI Design of Diminished-One Modulo 2 IEEE Trans. Circuits Syst. II Express Briefs Su-Hon Lin, Ming-Hwa Sheu
2007	J	`jnl`	A High-Performance Architecture of Motion Adaptive De-interlacing with Reliable Interfield Information. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Chung-Chi Lin, Ming-Hwa Sheu, Huann-Keng Chiang, Chih-Jen Wei, Chishyan Liaw
2007	J	`jnl`	A Novel High-Speed and Energy Efficient 10-Transistor Full Adder Design. IEEE Trans. Circuits Syst. I Regul. Pap. Jin-Fa Lin, Yin-Tsung Hwang, Ming-Hwa Sheu, Cheng-Che Ho
2007	—	`conf`	Efficient VLSI Design of Modulo 2 SiPS Su-Hon Lin, Ming-Hwa Sheu, Kuang-Hui Wang, Jun-Jie Zhu, Si-Ying Chen
2007	C	`conf`	Fast Fair Crossbar Scheduler for On-chip Router. ISCAS Shyue-Wen Yang, Ming-Hwa Sheu, Chun-Kai Yeh, Chih-Yuen Wen, Chih-Chieh Lin, Wen-Kai Tsai
2007	—	`conf`	Low Power Multipliers Using Enhenced Row Bypassing Schemes. SiPS Yin-Tsung Hwang, Jin-Fa Lin, Ming-Hwa Sheu, Chia-Jen Sheu
2007	—	`conf`	The VLSI Design of Winscale for Digital Image Scaling. IIH-MSP Chung-Chi Lin, Zeng-Chuan Wu, Wen-Kai Tsai, Ming-Hwa Sheu, Huann-Keng Chiang
2006	C	`conf`	A high speed and energy efficient full adder design using complementary & level restoring carry logic. ISCAS Jin-Fa Lin, Yin-Tsung Hwang, Ming-Hwa Sheu, Cheng-Che Ho
2006	—	`conf`	Automatic Generation of Programmable Parallel CRC & Scrambler Designs. SiPS Yin-Tsung Hwang, Jiun-Yan Chen, Ming-Hwa Sheu
2006	—	`conf`	Efficient VLSI Design for RNS Reverse Converter Based on New Moduli Set (2n-1, 2n+1, 22n+1). APCCAS Su-Hon Lin, Ming-Hwa Sheu, Jing-Shiun Lin, Wen-Tsai Sheu
2006	—	`conf`	Film-to-Video Conversion with Scene Cut Detection. ICICIC (1) Chung-Chi Lin, Ming-Hwa Sheu, Huann-Keng Chiang, Chishyan Liaw, Ming-Che Chen
2006	—	`conf`	Low Power Multiplier Designs Based on Improved Column Bypassing Schemes. APCCAS Yin-Tsung Hwang, Jin-Fa Lin, Ming-Hwa Sheu, Chia-Jen Sheu
2006	—	`conf`	The VLSI Design of Motion Adaptive De-interlacing with Horizontal and Vertical Motions Detection. APCCAS Chung-Chi Lin, Ming-Hwa Sheu, Huann-Keng Chiang, Chih-Jen Wei
2006	C	`conf`	The VLSI design of de-interlacing with scene change detection. ISCAS Chung-Chi Lin, Chih-Jen Wei, Ming-Hwa Sheu, Huann-Keng Chiang, Chishyan Liaw
2005	—	`conf`	Directional interpolation for field-sequential stereoscopic video. ISCAS (3) Hsien-Huang Peter Wu, Ming-Hwa Sheu, Tung-Yu Yang
2005	—	`conf`	Motion Adaptive De-interlacing with Horizontal and Vertical Motions Detection. PCM (1) Chung-Chi Lin, Ming-Hwa Sheu, Huann-Keng Chiang, Chishyan Liaw
2005	—	`conf`	VLSI architecture design for a fast parallel label assignment in binary image. ISCAS (3) Shyue-Wen Yang, Ming-Hwa Sheu, Hsien-Huang Peter Wu, Hung-En Chien, Ping-Kuo Weng, Ying-Yih Wu
2004	J	`jnl`	An efficient VLSI design for a residue to binary converter for general balance moduli (2 IEEE Trans. Circuits Syst. II Express Briefs Ming-Hwa Sheu, Su-Hon Lin, Chichyang Chen, Shyue-Wen Yang
2003	C	`conf`	A Fast Additive Normalization Method for Exponential Computation. DSD Chichyang Chen, Rui-Lin Chen, Ming-Hwa Sheu
2002	J	`jnl`	Fast compensative design approach for the approximate squaring function. IEEE J. Solid State Circuits Ming-Hwa Sheu, Su-Hon Lin
2002	—	`conf`	Fast design approach for implementing the approximate squaring function. APCCAS (2) Ming-Hwa Sheu, Su-Hon Lin
2001	J	`jnl`	A Systematic Approach for Parallel CRC Computations. J. Inf. Sci. Eng. Ming-Der Shieh, Ming-Hwa Sheu, Chung-Ho Chen, Hsin-Fu Lo
2001	—	`conf`	A novel adaptive algorithm and VLSI design for frequency detection in noisy environment based on adaptive IIR filter. ISCAS (4) Ming-Hwa Sheu, Ho-En Liao, Shih Tsung Kan, Ming-Der Shieh
2001	—	`conf`	VLSI architecture of extended in-place path metric update for Viterbi decoders. ISCAS (4) Chien-Ming Wu, Ming-Der Shieh, Chien-Hsing Wu, Ming-Hwa Sheu
2000	C	`conf`	An efficient approach for in-place scheduling of path metric update in Viterbi decoders. ISCAS Chien-Ming Wu, Ming-Der Shieh, Chien-Hsing Wu, Ming-Hwa Sheu
2000	—	`conf`	High-speed generation of LFSR signatures. Asian Test Symposium Ming-Der Shieh, Hsin-Fu Lo, Ming-Hwa Sheu
1999	—	`conf`	A VLSI architecture of fast high-radix modular multiplication for RSA cryptosystem. ISCAS (1) Che-Han Wu, Ming-Der Shieh, Chien-Hsing Wu, Ming-Hwa Sheu, Jia-Lin Sheu
1993	C	`conf`	A High Throughput-Rate Architecture for 8*8 2-D DCT. ISCAS Ming-Hwa Sheu, Jau-Yien Lee, Jhing-Fa Wang, An-Nan Suen, Lian-Ying Liu
1993	C	`conf`	An Expandable Chip Desing for Gray-scale Morphological Operations. ISCAS Ming-Hwa Sheu, Jhing-Fa Wang, Jau-Yien Lee, Lian-Ying Liu
1993	J	`jnl`	The determination of the cycle length in high level synthesis. Integr. Ming-Hwa Sheu, Yuan-Long Jeang, Jhing-Fa Wang, Jau-Yien Lee