Ming-Hung Chang

31 papers A 2B 4C 4Journal 10Unranked 11
YearRankTypeTitle / Venue / Authors
2025 J jnl
A 3 nm-FinFET 4.3 GHz 21.1 Mb/mm
IEEE J. Solid State Circuits
Masaru Haraguchi, Yorinobu Fujino, Yoshisato Yokoyama, Ming-Hung Chang, Yu-Hao Hsu, Hong-Chen Cheng, Koji Nii, Yih Wang, Tsung-Yung Jonathan Chang
2025 — conf
A 38.1Mb/mm
ISSCC
Tsung-Yung Jonathan Chang, Yen-Huei Chen, K. Venkateswara Reddy, Nikhil Puri, Teja Masina, Kuo-Cheng Lin, Po-Sheng Wang, Yangsyu Lin, Chih-Yu Lin, Yi-Hsin Nien, Hidehiro Fujiwara, Ku-Feng Lin, Ming-Hung Chang, Ching-Wei Wu, Robin Lee, Yih Wang, Hung-Jen Liao, Quincy Li, Ping-Wei Wang, Geoffrey Yeap
2024 — conf
15.3 A 3nm FinFET 4.3GHz 21.1Mb/mm2 Double-Pumping 1-Read and 1-Write Pseudo-2-Port SRAM with Folded-Bitline Multi-Bank Architecture.
ISSCC
Masaru Haraguchi, Yorinobu Fujino, Yoshisato Yokoyama, Ming-Hung Chang, Yu-Hao Hsu, Hong-Chen Cheng, Koji Nii, Yih Wang, Tsung-Yung Jonathan Chang
2024 J jnl
Conflict, dissonance and engagement in virtual communities.
Int. J. Serv. Stand.
Jao-Hong Cheng, Ming-Hung Chang, Zong-Heng Jheng, Albert Huang, Shang-Che Huang
2022 J jnl
A Unified Grey Riccati Model.
Axioms
Ming-Feng Yeh, Ming-Hung Chang, Ching-Chuan Luo
2022 J jnl
Speed control of electric vehicle by using type-2 fuzzy neural network.
Int. J. Mach. Learn. Cybern.
Ming-Hung Chang, Yi-Chao Wu
2021 J jnl
GM(1, 1;λ) with Constrained Linear Least Squares.
Axioms
Ming-Feng Yeh, Ming-Hung Chang
2014 — conf
A configurable 2-in-1 SRAM compiler with constant-negative-level write driver for low Vmin in 16nm Fin-FET CMOS.
A-SSCC
Ching-Wei Wu, Ming-Hung Chang, Chia-Cheng Chen, Robin Lee, Hung-Jen Liao, Jonathan Chang
2013 — conf
A dual-edged triggered explicit-pulsed level converting flip-flop with a wide operation range.
SoCC
Mei-Wei Chen, Ming-Hung Chang, Pei-Chen Wu, Yi-Ping Kuo, Chun-Lin Yang, Yuan-Hua Chu, Wei Hwang
2013 C conf
Near-/Sub-Vth process, voltage, and temperature (PVT) sensors with dynamic voltage selection.
ISCAS
Ming-Hung Chang, Shang-Yuan Lin, Pei-Chen Wu, Olesya Zakoretska, Ching-Te Chuang, Kuan-Neng Chen, Chen-Chao Wang, Kuo-Hua Chen, Chi-Tsung Chiu, Ho-Ming Tong, Wei Hwang
2012 J jnl
A 0.4 V 520 nW 990
J. Low Power Electron.
Ming-Hung Chang, Shang-Yuan Lin, Wei Hwang
2012 — conf
A 2kb built-in row-controlled dynamic voltage scaling near-/sub-threshold FIFO memory for WBANs.
VLSI-DAT
Wei-Hung Du, Po-Tsang Huang, Ming-Hung Chang, Wei Hwang
2012 — conf
An energy-efficient level converter with high thermal variation immunity for sub-threshold to super-threshold operation.
SoCC
Mei-Wei Chen, Ming-Hung Chang, Yuan-Hua Chu, Wei Hwang
2012 J jnl
Design and Iso-Area V
IEEE Trans. Circuits Syst. II Express Briefs
Ming-Hung Chang, Yi-Te Chiu, Wei Hwang
2012 B conf
Design of the Self-Constructing Fuzzy Neural Network controller for a sliding door system.
IJCNN
Hung-Ching Lu, Ming-Hung Chang
2012 J jnl
Parameter estimation of fuzzy neural network controller based on a modified differential evolution.
Neurocomputing
Hung-Ching Lu, Ming-Hung Chang, Cheng-Hung Tsai
2011 A conf
A 1kb 9T subthreshold SRAM with bit-interleaving scheme in 65nm CMOS.
ISLPED
Ming-Hung Chang, Yi-Te Chiu, Shu-Lin Lai, Wei Hwang
2011 J jnl
Adaptive self-constructing fuzzy neural network controller for hardware implementation of an inverted pendulum system.
Appl. Soft Comput.
Hung-Ching Lu, Ming-Hung Chang, Cheng-Hung Tsai
2011 — conf
An energy-efficient 10T SRAM-based FIFO memory operating in near-/sub-threshold regions.
SoCC
Wei-Hung Du, Ming-Hung Chang, Hao-Yi Yang, Wei Hwang
2011 A conf
Near-/sub-threshold DLL-based clock generator with PVT-aware locking range compensation.
ISLPED
Ming-Hung Chang, Chung-Ying Hsieh, Mei-Wei Chen, Wei Hwang
2011 B conf
Self-organizing fuzzy neural network controller design.
SMC
Ming-Hung Chang, Hung-Ching Lu
2010 C conf
Fully on-chip temperature, process, and voltage sensors.
ISCAS
Shi-Wen Chen, Ming-Hung Chang, Wei-Chih Hsieh, Wei Hwang
2010 — conf
High efficiency power management system for solar energy harvesting applications.
APCCAS
Ming-Hung Chang, Jung-Yi Wu, Wei-Chih Hsieh, Shang-Yuan Lin, You-Wei Liang, Wei Hwang
2010 B conf
Radial basis function neural network with sliding mode control for robotic manipulators.
SMC
Hung-Ching Lu, Cheng-Hung Tsai, Ming-Hung Chang
2009 — conf
A 2.1-mW 0.3V-1.0V wide locking range multiphase DLL using self-estimated SAR algorithm.
SoCC
Yi-Ming Chang, Ming-Hung Chang, Wei Hwang
2008 — conf
A 300-mV 36-muW multiphase dual digital clock output generator with self-calibration.
SoCC
Ming-Hung Chang, Li-Pu Chuang, I-Ming Chang, Wei Hwang
2008 C conf
A 5.2mW all-digital fast-lock self-calibrated multiphase delay-locked loop.
ISCAS
Li-Pu Chuang, Ming-Hung Chang, Po-Tsang Huang, Chih-Hao Kan, Wei Hwang
2007 C conf
A 1.9mW Portable ADPLL-based Frequency Synthesizer for High Speed Clock Generation.
ISCAS
Ming-Hung Chang, Zong-Xi Yang, Wei Hwang
2007 — conf
A flexible two-layer external memory management for H.264/AVC decoder.
SoCC
Chang-Hsuan Chang, Ming-Hung Chang, Wei Hwang
2007 B conf
Fuzzy neural network design with switching strategy for permanent-magnet synchronous motor speed controller.
SMC
Ming-Hung Chang, Hung-Ching Lu, Cheng-Hung Tsai
2007 J jnl
Reconfigurable Optical Add/Drop Multiplexer with 8.0 dB Net Gain Using Dual-Pass Amplified Scheme.
IEICE Trans. Commun.
Shien-Kuei Liaw, Ming-Hung Chang, Chun-Jung Wang, Yi-Tseng Lin