Ming-Che Lai

29 papers A* 1A 2B 1C 1Misc 4Journal 10Unranked 10
YearRankTypeTitle / Venue / Authors
2022 C conf
SpacKV: A Pmem-Aware Key-Value Separation Store Based on LSM-Tree.
NPC
Xuran Ge, Ming-Che Lai, Yang Liu, Lizhou Wu, Zhutao Zhuang, Yang Ou, Zhiguang Chen, Nong Xiao
2018 J jnl
Moving from exascale to zettascale computing: challenges and techniques.
Frontiers Inf. Technol. Electron. Eng.
Xiangke Liao, Kai Lu, Canqun Yang, Jin-wen Li, Yuan Yuan, Ming-Che Lai, Libo Huang, Pingjing Lu, Jianbin Fang, Jing Ren, Jie Shen
2014 J jnl
Holistic Routing Algorithm Design to Support Workload Consolidation in NoCs.
IEEE Trans. Computers
Sheng Ma, Natalie D. Enright Jerger, Zhiying Wang, Ming-Che Lai, Libo Huang
2013 — conf
A Highly-Efficient Approach to Adaptive Load Balance for Scalable TBGP.
NCCET
Lei Gao, Ming-Che Lai, Kefei Wang, Zhengbin Pang
2013 J jnl
An accurate and highly-efficient performance evaluation approach based on queuing model for on-chip network.
Sci. China Inf. Sci.
Ming-Che Lai, Lei Gao, Nong Xiao, Zhiying Wang
2013 J jnl
Efficient multimedia coprocessor with enhanced SIMD engines for exploiting ILP and DLP.
Parallel Comput.
Libo Huang, Nong Xiao, Zhiying Wang, Yongwen Wang, Ming-Che Lai
2011 — conf
A Scalable Multi-channel Parallel NAND Flash Memory Controller Architecture.
ChinaGrid
Yang Ou, Nong Xiao, Ming-Che Lai
2011 J jnl
A practical low-latency router architecture with wing channel for on-chip network.
Microprocess. Microsystems
Ming-Che Lai, Lei Gao, Sheng Ma, Nong Xiao, Zhiying Wang
2011 J jnl
P3Stor: A parallel, durable flash-based SSD for enterprise-scale storage systems.
Sci. China Inf. Sci.
Nong Xiao, Zhiguang Chen, Fang Liu, Ming-Che Lai, Longfei An
2011 J jnl
Two-level tries: A general acceleration structure for parallel routing table accesses.
J. Commun. Networks
Ming-Che Lai, Lei Gao
2010 J jnl
A hybrid algorithm for capacitated plant location problem.
Expert Syst. Appl.
Ming-Che Lai, Hansuk Sohn, Tzu-Liang (Bill) Tseng, Chunkuan Chiang
2010 J jnl
Exploration and implementation of a highly efficient processor element for multimedia and signal processing domains.
IET Comput. Digit. Tech.
Ming-Che Lai, Lei Gao, Zhiying Wang
2009 — conf
A Practical Non-blocking Route Propagation Technology for Threaded BGP.
ScalCom-EmbeddedCom
Gao Lai, Ming-Che Lai, Zhenghu Gong
2009 B conf
An Improved Parallel Access Technology on Routing Table for Threaded BGP.
ICPADS
Lei Gao, Ming-Che Lai, Zhenghu Gong
2009 A conf
An accurate and efficient performance analysis approach based on queuing model for network on chip.
ICCAD
Ming-Che Lai, Lei Gao, Nong Xiao, Zhiying Wang
2008 J jnl
A TLP approach for BGP based on local speculation.
Sci. China Ser. F Inf. Sci.
Lei Gao, Zhenghu Gong, Yaping Liu, Ming-Che Lai, Wei Peng
2008 A* conf
A dynamically-allocated virtual channel architecture with congestion awareness for on-chip routers.
DAC
Ming-Che Lai, Zhiying Wang, Lei Gao, Hongyi Lu, Kui Dai
2008 Misc conf
Escaping from Blocking: A Dynamic Virtual Channel for Pipelined Routers.
CISIS
Ming-Che Lai, Lei Gao, Wei Shi, Zhiying Wang
2008 — conf
Exploiting the Thread-Level Parallelism for BGP on Multi-core.
CNSR
Lei Gao, Ming-Che Lai, Zhenghu Gong
2008 Misc conf
Hierarchical memory system design for a heterogeneous multi-core processor.
SAC
Jianjun Guo, Ming-Che Lai, Zhengyuan Pang, Libo Huang, Fangyuan Chen, Kui Dai, Zhiying Wang
2008 Misc conf
Memory System Design for a Multi-core Processor.
CISIS
Jianjun Guo, Ming-Che Lai, Zhengyuan Pang, Libo Huang, Fangyuan Chen, Kui Dai, Zhiying Wang
2008 — conf
The P2P Communication Model for a Local Memory based Multi-core Processor.
ICYCS
Jianjun Guo, Kui Dai, Ming-Che Lai, Zhiying Wang
2008 Misc conf
Using an Automated Approach to Explore and Design a High-Efficiency Processor Element for the Multimedia Domain.
CISIS
Ming-Che Lai, Jianjun Guo, Zhuxi Zhang, Zhiying Wang
2007 — conf
Hardware Support for Arithmetic Units of Processor with Multimedia Extension.
MUE
Libo Huang, Ming-Che Lai, Kui Dai, Hong Yue, Li Shen
2007 — conf
Template Vertical Dictionary-Based Program Compression Scheme on the TTA.
PATMOS
Ming-Che Lai, Zhiying Wang, Jianjun Guo, Kui Dai, Shen Li
2007 — conf
The Research of an Embedded Processor Element for Multimedia Domain.
MCAM
Ming-Che Lai, Jianjun Guo, Lv Yasuai, Kui Dai, Zhiying Wang
2006 A conf
A Novel Data-Parallel Coprocessor for Multimedia Signal Processing.
ICME
Ming-Che Lai, Kui Dai, Lu Hong-yi, Zhiying Wang
2005 — conf
Design of a Configurable Embedded Processor Architecture for DSP Functions.
ICPADS (2)
Hong Yue, Ming-Che Lai, Kui Dai, Zhiying Wang
2004 — conf
A New Technique for Program Code Compression in Embedded Microprocessor.
ICESS
Ming-Che Lai, Kui Dai, Li Shen, Zhiying Wang