Milos Stanisavljevic

29 papers B 1C 6Journal 8Unranked 14

Year	Rank	Type	Title / Venue / Authors
2024	—	`conf`	11.3 Metis AIPU: A 12nm 15TOPS/W 209.6TOPS SoC for Cost- and Energy-Efficient Inference at the Edge. ISSCC Pascal Alexander Hager, Bert Moons, Stefan Cosemans, Ioannis A. Papistas, Bram Rooseleer, Jeroen Van Loon, Roel Uytterhoeven, Florian Zaruba, Spyridoula Koumousi, Milos Stanisavljevic, Stefan Mach, Sebastiaan Mutsaards, Riduan Khaddam Aljameh, Gua Hao Khov, Brecht Machiels, Cristian Olar, Anastasios Psarras, Sander Geursen, Jeroen Vermeeren, Yi Lu, Abhishek Maringanti, Deepak Ameta, Leonidas Katselas, Noah Hütter, Manuel Schmuck, Swetha Sivadas, Karishma Sharma, Manuel Oliveira, Ramon Aerne, Nitish Sharma, Timir Soni, Beatrice Bussolino, Djordje Pesut, Michele Pallaro, Andrei Podlesnii, Alexios Lyrakis, Yannick Ruffiner, Martino Dazzi, Johannes Thiele, Koen Goetschalckx, Nazareno Bruschi, Jonas Doevenspeck, Bram Verhoef, Stefan Linz, Giuseppe Garcea, Jonathan Ferguson, Ioannis Koltsidas, Evangelos Eleftheriou
2023	J	`jnl`	A Heterogeneous and Programmable Compute-In-Memory Accelerator Architecture for Analog-AI Using Dense 2-D Mesh. IEEE Trans. Very Large Scale Integr. Syst. Shubham Jain, Hsinyu Tsai, Ching-Tzu Chen, Ramachandran Muralidhar, Irem Boybat, Martin M. Frank, Stanislaw Wozniak, Milos Stanisavljevic, Praneet Adusumilli, Pritish Narayanan, Kohji Hosokawa, Masatoshi Ishii, Arvind Kumar, Vijay Narayanan, Geoffrey W. Burr
2023	C	`conf`	Acceleration of Decision-Tree Ensemble Models on the IBM Telum Processor. ISCAS Nikolaos Papandreou, Jan van Lunteren, Andreea Anghel, Thomas P. Parnell, Martin Petermann, Milos Stanisavljevic, Cédric Lichtenau, Andrew Sica, Dominic Röhm, Elpida Tzortzatos, Haralampos Pozidis
2022	J	`jnl`	A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference. CoRR Manuel Le Gallo, Riduan Khaddam-Aljameh, Milos Stanisavljevic, Athanasios Vasilopoulos, Benedikt Kersting, Martino Dazzi, Geethan Karunaratne, Matthias Braendli, Abhairaj Singh, Silvia M. Mueller, Julian Büchel, Xavier Timoneda Comas, Vinay Joshi, Urs Egger, Angelo Garofalo, Anastasios Petropoulos, Theodore Antonakopoulos, Kevin Brew, Samuel Choi, Injo Ok, Timothy Philip, Victor Chan, Mary Claire Silvestre, Ishtiaq Ahsan, Nicole Saulnier, Vijay Narayanan, Pier Andrea Francese, Evangelos Eleftheriou, Abu Sebastian
2022	J	`jnl`	HERMES-Core - A 1.59-TOPS/mm IEEE J. Solid State Circuits Riduan Khaddam-Aljameh, Milos Stanisavljevic, Jordi Fornt Mas, Geethan Karunaratne, Matthias Brändli, Feng Liu, Abhairaj Singh, Silvia M. Müller, Urs Egger, Anastasios Petropoulos, Theodore Antonakopoulos, Kevin Brew, Samuel Choi, Injo Ok, Fee Li Lie, Nicole Saulnier, Victor Chan, Ishtiaq Ahsan, Vijay Narayanan, S. R. Nandakumar, Manuel Le Gallo, Pier Andrea Francese, Abu Sebastian, Evangelos Eleftheriou
2021	J	`jnl`	Circuit and System-Level Aspects of Phase Change Memory. IEEE Trans. Circuits Syst. II Express Briefs Haralampos Pozidis, Nikolaos Papandreou, Milos Stanisavljevic
2021	—	`conf`	HERMES Core - A 14nm CMOS and PCM-based In-Memory Compute Core using an array of 300ps/LSB Linearized CCO-based ADCs and local digital processing. VLSI Circuits Riduan Khaddam-Aljameh, Milos Stanisavljevic, Jordi Fornt Mas, Geethan Karunaratne, Matthias Braendli, Femg Liu, Abhairaj Singh, Silvia M. Müller, Urs Egger, Anastasios Petropoulos, Theodore Antonakopoulos, Kevin Brew, Samuel Choi, Injo Ok, Fee Li Lie, Nicole Saulnier, Victor Chan, Ishtiaq Ahsan, Vijay Narayanan, S. R. Nandakumar, Manuel Le Gallo, Pier Andrea Francese, Abu Sebastian, Evangelos Eleftheriou
2021	C	`conf`	High-Throughput ECC with Integrated Chipkill Protection for Nonvolatile Memory Arrays. ISCAS Thomas Mittelholzer, Milos Stanisavljevic, Nikolaos Papandreou, Haralampos Pozidis
2021	J	`jnl`	Toward Software-Equivalent Accuracy on Transformer-Based Deep Neural Networks With Analog Memory Devices. Frontiers Comput. Neurosci. Katie Spoon, Hsinyu Tsai, An Chen, Malte J. Rasch, Stefano Ambrogio, Charles Mackin, Andrea Fasoli, Alexander M. Friz, Pritish Narayanan, Milos Stanisavljevic, Geoffrey W. Burr
2020	—	`conf`	Open Block Characterization and Read Voltage Calibration of 3D QLC NAND Flash. IRPS Nikolaos Papandreou, Haralampos Pozidis, Nikolas Ioannou, Thomas P. Parnell, Roman A. Pletka, Milos Stanisavljevic, Radu Stoica, Sasa Tomic, Patrick Breen, Gary A. Tressler, Aaron Fry, Timothy Fisher, Andrew Walls
2019	—	`conf`	Accelerated ML-Assisted Tumor Detection in High-Resolution Histopathology Images. MICCAI (1) Nikolas Ioannou, Milos Stanisavljevic, Andreea Anghel, Nikolaos Papandreou, Sonali Andani, Jan Hendrik Rüschoff, Peter Wild, Maria Gabrani, Haralampos Pozidis
2019	J	`jnl`	Deep learning acceleration based on in-memory computing. IBM J. Res. Dev. Evangelos Eleftheriou, Manuel Le Gallo, S. R. Nandakumar, Christophe Piveteau, Irem Boybat, Vinay Joshi, Riduan Khaddam-Aljameh, Martino Dazzi, Iason Giannopoulos, Geethan Karunaratne, Benedikt Kersting, Milos Stanisavljevic, Vara Prasad Jonnalagadda, Nikolas Ioannou, Kornilios Kourtis, Pier Andrea Francese, Abu Sebastian
2019	—	`conf`	Reliability of 3D NAND flash memory with a focus on read voltage calibration from a system aspect. NVMTS Nikolaos Papandreou, Nikolas Ioannou, Thomas P. Parnell, Roman A. Pletka, Milos Stanisavljevic, Radu Stoica, Sasa Tomic, Haralampos Pozidis
2018	—	`conf`	A Fast and Scalable Pipeline for Stain Normalization of Whole-Slide Images in Histopathology. ECCV Workshops (6) Milos Stanisavljevic, Andreea Anghel, Nikolaos Papandreou, Sonali Andani, Pushpak Pati, Jan Hendrik Rüschoff, Peter Wild, Maria Gabrani, Haralampos Pozidis
2018	C	`conf`	Drift-Invariant Detection for Multilevel Phase-Change Memory. ISCAS Milos Stanisavljevic, Thomas Mittelholzer, Nikolaos Papandreou, Thomas P. Parnell, Haralampos Pozidis
2016	J	`jnl`	Multilevel-Cell Phase-Change Memory: A Viable Technology. IEEE J. Emerg. Sel. Topics Circuits Syst. Aravinthan Athmanathan, Milos Stanisavljevic, Nikolaos Papandreou, Haralampos Pozidis, Evangelos Eleftheriou
2015	—	`conf`	Non-resistance metric based read scheme for multi-level PCRAM in 25 nm technology. CICC Junho Cheon, Insoo Lee, Changyong Ahn, Milos Stanisavljevic, Aravinthan Athmanathan, Nikolaos Papandreou, Haris Pozidis, Evangelos Eleftheriou, Min-Chul Shin, Taekseung Kim, Jong-Ho Kang, Jun Hyun Chun
2015	—	`conf`	Phase-change memory: Feasibility of reliable multilevel-cell storage and retention at elevated temperatures. IRPS Milos Stanisavljevic, Aravinthan Athmanathan, Nikolaos Papandreou, Haralampos Pozidis, Evangelos Eleftheriou
2014	—	`conf`	A 6-bit drift-resilient readout scheme for multi-level Phase-Change Memory. A-SSCC Aravinthan Athmanathan, Milos Stanisavljevic, Junho Cheon, Seokjoon Kang, Changyong Ahn, Junghyuk Yoon, Min-Chul Shin, Taekseung Kim, Nikolaos Papandreou, Haris Pozidis, Evangelos Eleftheriou
2010	C	`conf`	Output probability density functions of logic circuits: Modeling and fault-tolerance evaluation. VLSI-SoC Milos Stanisavljevic, Alexandre Schmid, Yusuf Leblebici
2010	C	`conf`	Selective redundancy-based design techniques for the minimization of local delay variations. ISCAS Milos Stanisavljevic, Alexandre Schmid, Yusuf Leblebici
2009	J	`jnl`	On the Reliability of Post-CMOS and SET Systems. Int. J. Nanotechnol. Mol. Comput. Milos Stanisavljevic, Alexandre Schmid, Yusuf Leblebici
2009	—	`conf`	Optimization of Nanoelectronic Systems Reliability Under Massive Defect Density Using Distributed R-fold Modular Redundancy (DRMR). DFT Milos Stanisavljevic, Alexandre Schmid, Yusuf Leblebici
2009	—	`conf`	Optimization of Nanoelectronic Systems Reliability by Reducing Logic Depth. NanoNet Milos Stanisavljevic, Alexandre Schmid, Yusuf Leblebici
2008	—	`conf`	An Enhanced Service Provider Communication Interface with Client Prioritization - Case Study on Fast-food Chain Restaurants. ICE-B Slobodan Lukovic, Nikola Puzovic, Milos Stanisavljevic
2007	—	`conf`	A 90nm CMOS cryptographic core with improved fault-tolerance in presence of massive defect density. Nano-Net Milos Stanisavljevic, Frank Kagan Gürkaynak, Alexandre Schmid, Yusuf Leblebici, Maria Gabrani
2007	—	`conf`	Design and realization of a fault-tolerant 90nm CMOS cryptographic engine capable of performing under massive defect density. ACM Great Lakes Symposium on VLSI Milos Stanisavljevic, Frank K. Gürkaynak, Alexandre Schmid, Yusuf Leblebici, Maria Gabrani
2006	B	`conf`	Fault-Tolerance of Robust Feed-Forward Architecture Using Single-Ended and Differential Deep-Submicron Circuits Under Massive Defect Density. IJCNN Milos Stanisavljevic, Alexandre Schmid, Yusuf Leblebici
2005	C	`conf`	A Methodology for Reliability Enhancement of Nanometer-Scale Digital Systems Based on a-priori Functional Fault- Tolerance Analysis. VLSI-SoC Milos Stanisavljevic, Alexandre Schmid, Yusuf Leblebici