Milos D. Ercegovac

144 papers A* 4A 6B 2C 29Misc 18Journal 55Unranked 27

Year	Rank	Type	Title / Venue / Authors
2024	J	`jnl`	Unified Digit Selection for Radix-4 Recurrence Division and Square Root. IEEE Trans. Computers David M. Harris, James E. Stine, Milos D. Ercegovac, Alberto Nannarelli, Katherine Parry, Cedar Turek
2023	Misc	`conf`	An Efficient Dot-Product Unit Based on Online Arithmetic for Variable Precision Applications. ACSSC Saeid Gorgin, Mohammad H. Golamrezaei, Jeong-A Lee, Milos D. Ercegovac
2023	J	`jnl`	Low Latency and High Throughput Pipelined Online Adder for Streaming Inner Product. J. Signal Process. Syst. Tooba Arifeen, Saeid Gorgin, MohammadHosein Gholamrezaei, Abdus Sami Hassan, Milos D. Ercegovac, Jeong-A Lee
2023	J	`jnl`	Low-Latency Online Multiplier with Reduced Activities and Minimized Interconnect for Inner Product Arrays. CoRR Muhammad Usman, Milos D. Ercegovac, Jeong-A Lee
2023	J	`jnl`	Low-Latency Online Multiplier with Reduced Activities and Minimized Interconnect for Inner Product Arrays. J. Signal Process. Syst. Muhammad Usman, Milos D. Ercegovac, Jeong-A Lee
2023	Misc	`conf`	MSDF-SVM: Advantage of Most Significant Digit First Arithmetic for SVM Realization. ACSSC Saeid Gorgin, Mohammadreza Najafi, Mohammad H. Golamrezaei, Jeong-A Lee, Milos D. Ercegovac
2023	Misc	`conf`	Multiplier Optimization via E-Graph Rewriting. ACSSC Andy Wanna, Samuel Coward, Theo Drane, George A. Constantinides, Milos D. Ercegovac
2023	J	`jnl`	Multiplier Optimization via E-Graph Rewriting. CoRR Andy Wanna, Samuel Coward, Theo Drane, George A. Constantinides, Milos D. Ercegovac
2022	J	`jnl`	Multiplier with Reduced Activities and Minimized Interconnect for Inner Product Arrays. CoRR Muhammad Usman, Jeong-A Lee, Milos D. Ercegovac
2021	—	`conf`	Adder with Reduced Latency and Minimized Interconnect for Streaming Inner Products. ACSCC Tooba Arifeen, Abdus Sami Hassan, Jeong-A Lee, Milos D. Ercegovac
2021	—	`conf`	Multiplier with Reduced Activities and Minimized Interconnect for Inner Product Arrays. ACSCC Muhammad Usman, Jeong-A Lee, Milos D. Ercegovac
2020	Misc	`conf`	An Architecture for Improving Variable Radix Real and Complex Division Using Recurrence Division. ACSSC James E. Stine, Milos D. Ercegovac, Jean-Michel Muller
2020	Misc	`conf`	On Reducing Module Activities in Online Arithmetic Operations. ACSSC Milos D. Ercegovac
2019	Misc	`conf`	Conditional Estimation of Residuals with Prescaling for Use in Low-Energy Division Units. ACSSC Milos D. Ercegovac, James E. Stine
2017	Misc	`conf`	On left-to-right arithmetic. ACSSC Milos D. Ercegovac
2016	J	`jnl`	An Energy-Efficient Multiplier With Fully Overlapped Partial Products Reduction and Final Addition. IEEE Trans. Circuits Syst. I Regul. Pap. Wen Yan, Milos D. Ercegovac, He Chen
2016	Misc	`conf`	Radix-4 energy efficient carry-free truncated multiplier. ACSSC Wen Yan, Milos D. Ercegovac
2015	Misc	`conf`	An error-compensated piecewise linear logarithmic arithmetic unit for phong lighting acceleration. ACSSC Ching-En Lee, Milos D. Ercegovac
2014	J	`jnl`	(M, p, k)-Friendly Points: A Table-Based Method to Evaluate Trigonometric Function. IEEE Trans. Circuits Syst. II Express Briefs Dong Wang, Jean-Michel Muller, Nicolas Brisebarre, Milos D. Ercegovac
2014	J	`jnl`	Complex Function Approximation Using Two-Dimensional Interpolation. IEEE Trans. Computers Dong Wang, Milos D. Ercegovac, Yang Xiao
2014	Misc	`conf`	Low-power radix-4 quotient generator. ACSSC Milos D. Ercegovac, Lu Meng
2014	—	`conf`	RF digital predistorter implementation using polynomial optimization. MWSCAS Hojat Parta, Milos D. Ercegovac, Sudhakar Pamarti
2013	A	`conf`	Energy-efficient computing using adaptive table lookup based on nonvolatile memories. ISLPED Jason Cong, Milos D. Ercegovac, Muhuan Huang, Sen Li, Bingjun Xiao
2013	Misc	`conf`	On approximate arithmetic. ACSSC Milos D. Ercegovac
2013	C	`conf`	Power optimization in a parallel multiplier using voltage islands. ISCAS Seok Won Heo, Suk Joong Huh, Milos D. Ercegovac
2013	—	`conf`	Power optimization of sum-of-products design for signal processing applications. ASAP Seok Won Heo, Suk Joong Huh, Milos D. Ercegovac
2012	—	`conf`	(M, p, k)-Friendly Points: A Table-Based Method for Trigonometric Function Evaluation. ASAP Nicolas Brisebarre, Milos D. Ercegovac, Jean-Michel Muller
2012	J	`jnl`	A Radix-16 Combined Complex Division/Square Root Unit with Operand Prescaling. IEEE Trans. Computers Dong Wang, Milos D. Ercegovac
2012	—	`conf`	Linearization using efficient complex polynomial evaluations. ACSCC Pouya Dormiani, Milos D. Ercegovac
2012	—	`conf`	Session TP8a3: Design methodology and computer arithmetic. ACSCC Milos D. Ercegovac
2012	—	`conf`	Shared implementation of radix-10 and radix-16 square root algorithm with limited precision primitives. ACSCC Milos D. Ercegovac, Robert McIlhenny
2011	—	`ed.`	22nd IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2011, Santa Monica, CA, USA, Sept. 11-14, 2011 ASAP Joseph R. Cavallaro, Milos D. Ercegovac, Frank Hannig, Paolo Ienne, Earl E. Swartzlander Jr., Alexandre F. Tenca
2011	—	`conf`	Accelerating the photon mapping algorithm and its hardware implementation. ASAP Shawn Singh, Seung hyun Pan, Milos D. Ercegovac
2011	—	`conf`	Shared implementation of radix-10 and radix-16 division algorithm with limited precision primitives. ACSCC Milos D. Ercegovac, Robert McIlhenny
2011	J	`jnl`	Trading Accuracy for Power in a Multiplier Architecture. J. Low Power Electron. Parag Kulkarni, Puneet Gupta, Milos D. Ercegovac
2011	Misc	`conf`	Trading Accuracy for Power with an Underdesigned Multiplier Architecture. VLSI Design Parag Kulkarni, Puneet Gupta, Milos D. Ercegovac
2010	J	`jnl`	An Efficient Method for Evaluating Complex Polynomials. J. Signal Process. Syst. Milos D. Ercegovac, Jean-Michel Muller
2010	J	`jnl`	Combining leak-resistant arithmetic for elliptic curves defined over F IACR Cryptol. ePrint Arch. Jean-Claude Bajard, Sylvain Duquesne, Milos D. Ercegovac
2010	J	`jnl`	Design of High-Throughput Fixed-Point Complex Reciprocal/Square-Root Unit. IEEE Trans. Circuits Syst. II Express Briefs Dong Wang, Milos D. Ercegovac, Nanning Zheng
2010	—	`conf`	Implementing decimal floating-point arithmetic through binary: Some suggestions. ASAP Nicolas Brisebarre, Nicolas Louvet, Érik Martin-Dorel, Jean-Michel Muller, Adrien Panhaleux, Milos D. Ercegovac
2009	B	`conf`	A radix-8 complex divider for FPGA implementation. FPL Dong Wang, Milos D. Ercegovac, Nanning Zheng
2009	—	`conf`	Design and Implementation of a Radix-4 Complex Division Unit with Prescaling. ASAP Pouya Dormiani, Milos D. Ercegovac, Jean-Michel Muller
2009	J	`jnl`	Exploration of Power-Delay Trade-Offs with Heterogeneous Adders by Integer Linear Programming. J. Circuits Syst. Comput. Sanghoon Kwak, Jeong-Gun Lee, Eun-Gu Jung, Dongsoo Har, Milos D. Ercegovac, Jeong-A Lee
2008	—	`conf`	An efficient method for evaluating polynomial and rational function approximations. ASAP Nicolas Brisebarre, Sylvain Chevillard, Milos D. Ercegovac, Jean-Michel Muller, Serge Torres
2008	—	`conf`	Design and FPGA implementation of radix-10 algorithm for division with limited precision primitives. ACSCC Milos D. Ercegovac, Robert McIlhenny
2008	—	`ch.`	Digital Arithmetic. Wiley Encyclopedia of Computer Science and Engineering Florent de Dinechin, Milos D. Ercegovac, Jean-Michel Muller, Nathalie Revol
2007	—	`conf`	A Design Method for Heterogeneous Adders. ICESS Jeong-Gun Lee, Jeong-A Lee, Byeong-Seok Lee, Milos D. Ercegovac
2007	—	`conf`	A Hardware-Oriented Method for Evaluating Complex Polynomials. ASAP Milos D. Ercegovac, Jean-Michel Muller
2007	J	`jnl`	Complex Square Root with Operand Prescaling. J. VLSI Signal Process. Milos D. Ercegovac, Jean-Michel Muller
2007	A*	`conf`	The Art of Deception: Adaptive Precision Reduction for Area Efficient Physics Acceleration. MICRO Thomas Y. Yeh, Petros Faloutsos, Milos D. Ercegovac, Sanjay J. Patel, Glenn Reinman
2005	C	`conf`	A Linear-System Operator Based Scheme for Evaluation of Multinomials. IEEE Symposium on Computer Arithmetic Pavan Adharapurapu, Milos D. Ercegovac
2005	J	`jnl`	High-Performance Low-Power Left-to-Right Array Multiplier Design. IEEE Trans. Computers Zhijun Huang, Milos D. Ercegovac
2005	J	`jnl`	High-Radix Logarithm with Selection by Rounding: Algorithm and Implementation. J. VLSI Signal Process. José-Alejandro Piñeiro, Milos D. Ercegovac, Javier D. Bruguera
2005	Misc	`conf`	RAVIOLI - Reconfigurable Arithmetic Variable-Precision Implementations of On-Line Instructions. FCCM Robert McIlhenny, Milos D. Ercegovac
2005	—	`conf`	Variable Radix Real and Complex Digit-Recurrence Division. ASAP Milos D. Ercegovac, Jean-Michel Muller
2004	J	`jnl`	Algorithm and Architecture for Logarithm, Exponential, and Powering Computation. IEEE Trans. Computers José-Alejandro Piñeiro, Milos D. Ercegovac, Javier D. Bruguera
2004	—	`conf`	Complex Square Root with Operand Prescaling. ASAP Milos D. Ercegovac, Jean-Michel Muller
2004	—	`conf`	From the University of Illinois via JPL and UCLA to Vytautas Magnus University - 50 years of computer engineering by Algirdas Avizienis. IFIP Congress Topical Sessions David A. Rennels, Milos D. Ercegovac
2003	J	`jnl`	Comments on "A carry-free 54 b×54 b multiplier using equivalent bit conversion algorithm". IEEE J. Solid State Circuits Milos D. Ercegovac, Tomás Lang, Y. Kim, Bang-Sup Song, John Grosspietsch, Steven F. Gillig
2003	C	`conf`	High-Performance Left-to-Right Array Multiplier Design. IEEE Symposium on Computer Arithmetic Zhijun Huang, Milos D. Ercegovac
2003	C	`conf`	High-Radix Iterative Algorithm for Powering Computation. IEEE Symposium on Computer Arithmetic José-Alejandro Piñeiro, Milos D. Ercegovac, Javier D. Bruguera
2003	—	`conf`	On-line high-radix exponential with selection by rounding. ISCAS (4) José-Alejandro Piñeiro, Javier D. Bruguera, Milos D. Ercegovac
2003	J	`jnl`	Performance-driven mapping for CPLD architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Deming Chen, Jason Cong, Milos D. Ercegovac, Zhijun Huang
2002	C	`conf`	Analysis of the Tradeoffs for the Implementation of a High-Radix Logarithm. ICCD José-Alejandro Piñeiro, Milos D. Ercegovac, Javier D. Bruguera
2002	—	`conf`	High-Level Synthesis with SIMD Units. ASP-DAC/VLSI Design Vijay Raghunathan, Anand Raghunathan, Mani B. Srivastava, Milos D. Ercegovac
2002	—	`conf`	High-Radix Logarithm with Selection by Rounding. ASAP José-Alejandro Piñeiro, Milos D. Ercegovac, Javier D. Bruguera
2002	—	`conf`	Two-dimensional signal gating for low-power array multiplier design. ISCAS (1) Zhijun Huang, Milos D. Ercegovac
2001	J	`jnl`	A FPGA-based Library for On-Line Signal Processing. J. VLSI Signal Process. Dannie Lau, Aaron Schneider, Milos D. Ercegovac, John D. Villasenor
2001	Misc	`conf`	FPGA Implementation of Pipelined On-Line Scheme for 3-D Vector Normalization. FCCM Zhijun Huang, Milos D. Ercegovac
2001	A	`conf`	Performance-driven mapping for CPLD architectures. FPGA Deming Chen, Jason Cong, Milos D. Ercegovac, Zhijun Huang
2000	A	`conf`	A Component Framework for Communication in Distributed Applications. IPDPS Jeffrey M. Fischer, Milos D. Ercegovac
2000	Misc	`conf`	BigSky-An On-Line Arithmetic Design Tool for FPGAs. FCCM Aaron Schneider, Robert McIlhenny, Milos D. Ercegovac
2000	J	`jnl`	Improving Goldschmidt Division, Square Root, and Square Root Reciprocal. IEEE Trans. Computers Milos D. Ercegovac, Laurent Imbert, David W. Matula, Jean-Michel Muller, Guoheng Wei
2000	J	`jnl`	Reciprocation, Square Root, Inverse Square Root, and Some Elementary Functions Using Small Multipliers. IEEE Trans. Computers Milos D. Ercegovac, Tomás Lang, Jean-Michel Muller, Arnaud Tisserand
1999	Misc	`conf`	FPGA-Based Structures for On-Line FFT and DCT. FCCM Dannie Lau, Aaron Schneider, Milos D. Ercegovac, John D. Villasenor
1999	A*	`conf`	Low-Power Behavioral Synthesis Optimization Using Multiple Precision Arithmetic. DAC Milos D. Ercegovac, Darko Kirovski, Miodrag Potkonjak
1999	C	`conf`	On the Design of High-Radix On-Line Division for Long Precision. IEEE Symposium on Computer Arithmetic Alexandre F. Tenca, Milos D. Ercegovac
1998	Misc	`conf`	A Variable Long-Precision Arithmetic Unit Design for Reconfigurable Coprocessor Architectures. FCCM Alexandre F. Tenca, Milos D. Ercegovac
1998	Misc	`conf`	Behavioral synthesis optimization using multiple precision arithmetic. ICASSP Milos D. Ercegovac, Darko Kirovski, George Mustafa, Miodrag Potkonjak
1998	J	`jnl`	Long and Fast Up/Down Counters. IEEE Trans. Computers Mircea R. Stan, Alexandre F. Tenca, Milos D. Ercegovac
1997	A	`conf`	Synchronous Up/Down Binary Counter for LUT FPGAs with Counting Frequency Independent of Counter Size. FPGA Alexandre F. Tenca, Milos D. Ercegovac
1996	J	`jnl`	On recoding in arithmetic algorithms. J. VLSI Signal Process. Milos D. Ercegovac, Tomás Lang
1996	J	`jnl`	Vector quantization with compressed codebooks. Signal Process. Image Commun. Raffi Dionysian, Milos D. Ercegovac
1996	J	`jnl`	Vector quantization with variable-precision classification. IEEE Trans. Image Process. Raffi Dionysian, Milos D. Ercegovac
1995	J	`jnl`	A variable-precision square root implementation for field programmable gate arrays. J. Supercomput. Marianne E. Louie, Milos D. Ercegovac
1995	C	`conf`	Sign detection and comparison networks with a small number of transitions. IEEE Symposium on Computer Arithmetic Milos D. Ercegovac, Tomás Lang
1994	J	`jnl`	Conventional and on-line arithmetic designs for high-speed recursive digital filters. J. VLSI Signal Process. John S. Fernando, Milos D. Ercegovac
1994	J	`jnl`	Implementing division with field programmable gate arrays. J. VLSI Signal Process. Marianne E. Louie, Milos D. Ercegovac
1994	J	`jnl`	Very-High Radix Division with Prescaling and Selection by Rounding. IEEE Trans. Computers Milos D. Ercegovac, Tomás Lang, Paolo Montuschi
1993	—	`conf`	ALIAS Environment: A Design Tool for Application Specific Arrays. SPDP James J. Liu, Milos D. Ercegovac
1993	J	`jnl`	Multiplication/ division/ square root module for massively parallel computers. Integr. Milos D. Ercegovac, Tomás Lang
1993	C	`conf`	On digit-recurrence division implementations for field programmable gate arrays. IEEE Symposium on Computer Arithmetic Marianne E. Louie, Milos D. Ercegovac
1993	—	`conf`	Symbolic Synthesis of Parallel Processing Systems. IPPS James J. Liu, Milos D. Ercegovac
1993	C	`conf`	Very high radix division with selection by rounding and prescaling. IEEE Symposium on Computer Arithmetic Milos D. Ercegovac, Tomás Lang, Paolo Montuschi
1992	J	`jnl`	A methodology for performance analysis of parallel computations with looping constructs. J. Parallel Distributed Comput. Alex Kapelnikov, Richard R. Muntz, Milos D. Ercegovac
1992	J	`jnl`	Architectural Support for Goal Management in Flat Concurrent Prolog. Computer Leon Alkalaj, Tomás Lang, Milos D. Ercegovac
1992	—	`conf`	MAMACG: a tool for automatic mapping of matrix algorithms onto mesh array computational graphs. ASAP Dinh Lê, Milos D. Ercegovac, Tomás Lang, Jaime H. Moreno
1992	J	`jnl`	On-the-Fly Rounding. IEEE Trans. Computers Milos D. Ercegovac, Tomás Lang
1992	B	`conf`	Variable Precision Representation for Efficient VQ Codebook Storage. Data Compression Conference Raffi Dionysian, Milos D. Ercegovac
1991	C	`conf`	Application of on-line arithmetic algorithms to the SVD computation: preliminary results. IEEE Symposium on Computer Arithmetic Paul K.-G. Tu, Milos D. Ercegovac
1991	J	`jnl`	Evaluation of two-summand adders implemented in ECDL CMOS differential logic. IEEE J. Solid State Circuits Shih-Lien Lu, Milos D. Ercegovac
1991	J	`jnl`	Gate array implementation of on-line algorithms for floating-point operations. J. VLSI Signal Process. Paul K.-G. Tu, Milos D. Ercegovac
1991	J	`jnl`	Module to Perform Multiplication, Division, and Square Root in Systolic Arrays for Matrix Computations. J. Parallel Distributed Comput. Milos D. Ercegovac, Tomás Lang
1990	J	`jnl`	A novel CMOS implementation of double-edge-triggered flip-flops. IEEE J. Solid State Circuits Shih-Lien Lu, Milos D. Ercegovac
1990	A*	`conf`	Architectural Support for the Management of Tightly-Coupled Fine-Grain Goals in Flat Concurrent Prolog. ISCA Leon Alkalaj, Tomás Lang, Milos D. Ercegovac
1990	J	`jnl`	Fast Multiplication Without Carry-Propagate Addition. IEEE Trans. Computers Milos D. Ercegovac, Tomás Lang
1990	J	`jnl`	Radix-4 Square Root Without Initial PLA. IEEE Trans. Computers Milos D. Ercegovac, Tomás Lang
1990	J	`jnl`	Redundant and On-Line CORDIC: Application to Matrix Triangularization and SVD. IEEE Trans. Computers Milos D. Ercegovac, Tomás Lang
1990	J	`jnl`	Simple Radix-4 Division with Opterands Scaling. IEEE Trans. Computers Milos D. Ercegovac, Tomás Lang
1989	J	`jnl`	A Modeling Methodology for the Analysis of Concurrent Systems and Computations. J. Parallel Distributed Comput. Alex Kapelnikov, Richard R. Muntz, Milos D. Ercegovac
1989	C	`conf`	Design of an on-line multiply-add module for recursive digital filters. IEEE Symposium on Computer Arithmetic Ralph Hans Brackert Jr., Milos D. Ercegovac, Alan N. Willson Jr.
1989	C	`conf`	Design of on-line division unit. IEEE Symposium on Computer Arithmetic Paul K.-G. Tu, Milos D. Ercegovac
1989	C	`conf`	On-the-fly rounding for division and square root. IEEE Symposium on Computer Arithmetic Milos D. Ercegovac, Tomás Lang
1989	C	`conf`	Radix-4 square root without initial PLA. IEEE Symposium on Computer Arithmetic Milos D. Ercegovac, Tomás Lang
1988	J	`jnl`	Heterogeneity in supercomputer architectures. Parallel Comput. Milos D. Ercegovac
1988	C	`conf`	Implementation of fast radix-4 division with operands scaling. ICCD Milos D. Ercegovac, Tomás Lang, Ramin Modiri
1988	J	`jnl`	On-Line Scheme for Computing Rotation Factors. J. Parallel Distributed Comput. Milos D. Ercegovac, Tomás Lang
1987	C	`conf`	A radix-4 on-line division algorithm. IEEE Symposium on Computer Arithmetic Paul K.-G. Tu, Milos D. Ercegovac
1987	C	`conf`	On-line scheme for computing rotation factors. IEEE Symposium on Computer Arithmetic Milos D. Ercegovac, Tomás Lang
1987	J	`jnl`	On-the-Fly Conversion of Redundant into Conventional Representations. IEEE Trans. Computers Milos D. Ercegovac, Tomás Lang
1985	C	`conf`	A division algorithm with prediction of quotient digits. IEEE Symposium on Computer Arithmetic Milos D. Ercegovac, Tomás Lang
1985	A*	`conf`	A functional language for description and design of digital systems: sequential constructs. DAC F. Meshkinpour, Milos D. Ercegovac
1985	J	`jnl`	Performance evaluation of a simulated data-flow computer with low-resolution actors. J. Parallel Distributed Comput. Jean-Luc Gaudiot, Milos D. Ercegovac
1984	J	`jnl`	Fault Tolerance in Binary Tree Architectures. IEEE Trans. Computers Cauligi S. Raghavendra, Algirdas Avizienis, Milos D. Ercegovac
1984	A	`conf`	Performance Analysis of a Data-Flow Computer with Variable Resolution Actors. ICDCS Jean-Luc Gaudiot, Milos D. Ercegovac
1983	C	`conf`	A higher-radix division with simple selection of quotient digits. IEEE Symposium on Computer Arithmetic Milos D. Ercegovac
1983	J	`jnl`	Error Analysis of Certain Floating-Point On-Line Algorithms. IEEE Trans. Computers Osaaki Watanuki, Milos D. Ercegovac
1983	C	`conf`	On-line multiplicative normalization. IEEE Symposium on Computer Arithmetic Aksenti L. Grnarov, Milos D. Ercegovac
1982	J	`jnl`	A On-Line Square Root Algorithm. IEEE Trans. Computers Vojin G. Oklobdzija, Milos D. Ercegovac
1982	A	`conf`	A scheme for handling arrays in data-flow systems. ICDCS Jean-Luc Gaudiot, Milos D. Ercegovac
1981	C	`conf`	A simulator for on-line arithmetic. IEEE Symposium on Computer Arithmetic Cauligi S. Raghavendra, Milos D. Ercegovac
1981	C	`conf`	Design of a digit-slice on-line arithmetic unit. IEEE Symposium on Computer Arithmetic Abdolali Gorji-Sinaki, Milos D. Ercegovac
1981	C	`conf`	Floating-point on-line arithmetic: Algorithms. IEEE Symposium on Computer Arithmetic Osaaki Watanuki, Milos D. Ercegovac
1981	C	`conf`	Floating-point on-line arithmetic: Error analysis. IEEE Symposium on Computer Arithmetic Osaaki Watanuki, Milos D. Ercegovac
1981	—	`conf`	Queue machines: an organization for parallel computation. CONPAR M. Feller, Milos D. Ercegovac
1978	C	`conf`	An arithmetic module for efficient evaluation of functions. IEEE Symposium on Computer Arithmetic Milos D. Ercegovac, Melvin M. Takata
1978	C	`conf`	An on-line square rooting algorithm. IEEE Symposium on Computer Arithmetic Milos D. Ercegovac
1977	J	`jnl`	A General Hardware-Oriented Method for Evaluation of Functions and Computations in a Digital Computer. IEEE Trans. Computers Milos D. Ercegovac
1977	J	`jnl`	On-Line Algorithms for Division and Multiplication. IEEE Trans. Computers Kishor S. Trivedi, Milos D. Ercegovac
1975	—	`—`	A General Method for Evaluation of Functions and Computations in A Digital Computer Milos D. Ercegovac
1975	C	`conf`	A general method for evaluation of functions and computations in a digital computing. IEEE Symposium on Computer Arithmetic Milos D. Ercegovac
1975	C	`conf`	On-line algorithms for division and multiplication. IEEE Symposium on Computer Arithmetic Kishor S. Trivedi, Milos D. Ercegovac
1973	J	`jnl`	Radix-16 Evaluation of Certain Elementary Functions. IEEE Trans. Computers Milos D. Ercegovac
1972	C	`conf`	Eadix l6 evaluation of some elementary functions. IEEE Symposium on Computer Arithmetic Milos D. Ercegovac