Mike Lankamp

11 papers C 1Journal 5Unranked 5
YearRankTypeTitle / Venue / Authors
2013 J jnl
Apple-CORE: Harnessing general-purpose many-cores with hardware concurrency management.
Microprocess. Microsystems
Raphael Poss, Mike Lankamp, Qiang Yang, Jian Fu, Michiel W. van Tol, Muhammad Irfan Uddin, Chris R. Jesshope
2013 — conf
MGSim - A simulation environment for multi-core research and education.
ICSAMOS
Raphael Poss, Mike Lankamp, Qiang Yang, Jian Fu, Muhammad Irfan Uddin, Chris R. Jesshope
2013 J jnl
MGSim - Simulation tools for multi-core processor architectures
CoRR
Mike Lankamp, Raphael 'kena' Poss, Qiang Yang, Jian Fu, Muhammad Irfan Uddin, Chris R. Jesshope
2012 C conf
Apple-CORE: Microgrids of SVP Cores - Flexible, General-Purpose, Fine-Grained Hardware Concurrency Management.
DSD
Raphael Poss, Mike Lankamp, Qiang Yang, Jian Fu, Michiel W. van Tol, Chris R. Jesshope
2012 — conf
Heterogeneous integration to simplify many-core architecture simulations.
RAPIDO
Raphael Poss, Mike Lankamp, Muhammad Irfan Uddin, Jaroslav Sykora, Leos Kafka
2009 J jnl
An implementation of the SANE Virtual Processor using POSIX threads.
J. Syst. Archit.
Michiel W. van Tol, Chris R. Jesshope, Mike Lankamp, Simon Polstra
2009 — conf
Evaluating CMPs and Their Memory Architecture.
ARCS
Chris R. Jesshope, Mike Lankamp, Li Zhang
2009 J jnl
Implementation and evaluation of a microthread architecture.
J. Syst. Archit.
Kostas Bousias, Liang Guang, Chris R. Jesshope, Mike Lankamp
2009 — conf
Making multi-cores mainstream - from security to scalability.
PARCO
Chris R. Jesshope, Michael A. Hicks, Mike Lankamp, Raphael 'kena' Poss, Li Zhang
2009 J jnl
The implementation of an SVP many-core processor and the evaluation of its memory architecture.
SIGARCH Comput. Archit. News
Chris R. Jesshope, Mike Lankamp, Li Zhang
2008 — conf
A general model of concurrency and its implementation as many-core dynamic RISC processors.
ICSAMOS
Thomas A. M. Bernard, Kostas Bousias, Liang Guang, Chris R. Jesshope, Mike Lankamp, Michiel W. van Tol, Li Zhang