Mike Hutton - RankMe

32 papers A* 1A 8B 7Journal 4Unranked 8

Year	Rank	Type	Title / Venue / Authors
2023	A*	`conf`	Understanding and Mitigating Hardware Failures in Deep Learning Training Systems. ISCA Yi He, Mike Hutton, Steven Chan, Robert De Gruijl, Rama Govindaraju, Nishant Patil, Yanjing Li
2017	J	`jnl`	The First 25 Years of the FPL Conference: Significant Papers. ACM Trans. Reconfigurable Technol. Syst. Philip Heng Wai Leong, Hideharu Amano, Jason Helge Anderson, Koen Bertels, João M. P. Cardoso, Oliver Diessel, Guy Gogniat, Mike Hutton, JunKyu Lee, Wayne Luk, Patrick Lysaght, Marco Platzner, Viktor K. Prasanna, Tero Rissa, Cristina Silvano, Hayden Kwok-Hay So, Yu Wang
2015	—	`conf`	Arria™ 10 device architecture. CICC Jeffrey Tyhach, Mike Hutton, Sean Atsatt, Arifur Rahman, Brad Vest, David M. Lewis, Martin Langhammer, Sergey Y. Shumarayev, Tim Hoang, Allen Chan, Dong-Myung Choi, Dan Oh, Hae-Chang Lee, Jack Chui, Ket Chiew Sia, Edwin Kok, Wei-Yee Koay, Boon-Jin Ang
2015	B	`conf`	Significant papers from the first 25 years of the FPL conference. FPL Philip Heng Wai Leong, Hideharu Amano, Jason Helge Anderson, Koen Bertels, João M. P. Cardoso, Oliver Diessel, Guy Gogniat, Mike Hutton, JunKyu Lee, Wayne Luk, Patrick Lysaght, Marco Platzner, Viktor K. Prasanna, Tero Rissa, Cristina Silvano, Hayden Kwok-Hay So, Yu Wang
2015	—	`conf`	Stratix® 10: 14nm FPGA delivering 1GHz. Hot Chips Symposium Mike Hutton
2014	—	`conf`	Design of a high-density SoC FPGA at 20nm. Hot Chips Symposium Brad Vest, Sean Atsatt, Mike Hutton
2009	—	`ch.`	FPGA Synthesis and Physical Design. Embedded Systems Design and Verification Mike Hutton, Vaughn Betz
2008	J	`jnl`	Guest Editorial: TRETS Special Edition on the 15th International Symposium on FPGAs. ACM Trans. Reconfigurable Technol. Syst. André DeHon, Mike Hutton
2008	A	`ed.`	Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, FPGA 2008, Monterey, California, USA, February 24-26, 2008 FPGA Mike Hutton, Paul Chow
2008	J	`jnl`	Stochastic Physical Synthesis Considering Prerouting Interconnect Uncertainty and Process Variation for FPGAs. IEEE Trans. Very Large Scale Integr. Syst. Yan Lin, Lei He, Mike Hutton
2007	—	`conf`	Accelerating pattern matching for DPI. SoCC Jun Mu, Sakir Sezer, Gareth Douglas, Dwayne Burns, Emi Garcia, Mike Hutton, Kevin Cackovic
2007	B	`conf`	An FPGA Based Memory Efficient Shared Buffer Implementation. FPL Dwayne Burns, Ciaran Toal, Kieran McLaughlin, Sakir Sezer, Mike Hutton, Kevin Cackovic
2007	B	`conf`	Equivalence Verification of FPGA and Structured ASIC Implementations. FPL Joachim Pistorius, Mike Hutton, Jay Schleicher, Mihail Iotov, Enoch Julias, Kumara Tharmalingam
2007	A	`conf`	Integrating FPGAs in high-performance computing: introduction. FPGA Paul Chow, Mike Hutton
2007	A	`ed.`	Proceedings of the ACM/SIGDA 15th International Symposium on Field Programmable Gate Arrays, FPGA 2007, Monterey, California, USA, February 18-20, 2007 FPGA André DeHon, Mike Hutton
2007	J	`jnl`	Statistical placement for FPGAs considering. IET Comput. Digit. Tech. Yan Lin, Mike Hutton, Lei He
2007	A	`conf`	Timing constraint-driven technology mapping for FPGAs considering false paths and multi-clock domains. ICCAD Lei Cheng, Deming Chen, Martin D. F. Wong, Mike Hutton, Jason Govig
2006	B	`conf`	FPGA Architecture Design Methodology. FPL Mike Hutton
2006	B	`conf`	FPGA Performance Optimization Via Chipwise Placement Considering Process Variations. FPL Lerong Cheng, Jinjun Xiong, Lei He, Mike Hutton
2006	B	`conf`	Placement and Timing for FPGAs Considering Variations. FPL Mike Hutton, Yan Lin, Lei He
2006	—	`ed.`	The Eigth International Workshop on System-Level Interconnect Prediction (SLIP 2006), Munich, Germany, March 4-5, 2006, Proceedings SLIP Mike Hutton, Joni Dambre
2006	A	`conf`	Timing model reduction for hierarchical timing analysis. ICCAD Shuo Zhou, Yi Zhu, Yuanfang Hu, Ronald L. Graham, Mike Hutton, Chung-Kuan Cheng
2005	A	`conf`	Challenges and opportunities for low power FPGAs in nanometer technologies. ISLPED Lei He, Mike Hutton, Tim Tuan, Steven J. E. Wilton
2005	B	`conf`	Coping With Uncertainty in FPGA Architecture Design. FPL Boris Ratchev, Mike Hutton, David Mendel
2005	A	`conf`	Efficient static timing analysis and applications using edge masks. FPGA Mike Hutton, David Karchmer, Bryan Archell, Jason Govig
2005	—	`ed.`	The Seventh International Workshop on System-Level Interconnect Prediction (SLIP 2005), San Francisco, CA, USA, April 2-3, 2005, Proceedings SLIP Igor L. Markov, Mike Hutton
2005	A	`conf`	The Stratix II logic and routing architecture. FPGA David M. Lewis, Elias Ahmed, Gregg Baeckler, Vaughn Betz, Mark Bourgeault, David Cashman, David R. Galloway, Mike Hutton, Christopher Lane, Andy Lee, Paul Leventis, Sandy Marquardt, Cameron McClintock, Ketan Padalia, Bruce Pedersen, Giles Powell, Boris Ratchev, Srinivas Reddy, Jay Schleicher, Kevin Stevens, Richard Yuan, Richard Cliff, Jonathan Rose
2004	—	`conf`	Advances and trends in FPGA design. SBCCI Mike Hutton
2004	—	`conf`	Architecture and CAD for FPGAs. SBCCI Mike Hutton
2004	—	`conf`	MAX II: A low-cost, high-performance LUT-based CPLD. CICC Paul Leventis, Brad Vest, Mike Hutton, David M. Lewis
2003	—	`conf`	Placement rent exponent calculation methods, temporal behaviour and FPGA architecture evaluation. SLIP Joachim Pistorius, Mike Hutton
1997	—	`—`	Characterization and parameterized generation of digital circuits. Mike Hutton