Miguel Gandara

14 papers Journal 4Unranked 10

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	7.1 A 212.5Gb/s DSP-Based PAM-4 Transceiver with 50dB Loss Compensation for Large AI System Interconnects in 4nm FinFET. ISSCC Ehung Chen, Henry Park, Mohammed Abdullatif, Miguel Gandara, Ahmed ElShater, Amr Khashaba, Shih-Hao Huang, Tsz-Bin Liu, Atharav Atharav, Joonyeong Lee, Qaiser Nehal, Mohamed Megahed, Yusang Chun, Cheng-En Shieh, Vidhan Jolly, SoonWon Kwon, Hsin-Ta Chien, Ke-Chung Wu, Cheng-En Liu, Peng Yan, Po-Jui Li, Chun-Han Chen, Tzu-Shun Lin, Pei-Chieh Liu, Tamer A. Ali
2025	—	`conf`	7.4 A 112Gb/s DSP-Based PAM-4 Receiver with an LC-Resonator-Based CTLE for >52dB Loss Compensation in 4nm FinFET. ISSCC Henry Park, Qaiser Nehal, Miguel Gandara, Atharav Atharav, Joonyeong Lee, Jengfeng Li, Tamer Ali
2025	—	`conf`	An AI-driven EDA Algorithm-Empowered VCO and LDO Co-Design Method. SMACD Yijia Hao, Maarten Strackx, Miguel Gandara, Sandy Cochran, Bo Liu
2025	J	`jnl`	From Systematic to Intelligent: Assessing AI-Empowered Optimization Techniques for Analog Building Block Sizing. IEEE Access Yijia Hao, Miguel Gandara, Srinjoy Mitra, Maarten Strackx, Sandy Cochran, Francisco V. Fernández, Shaolan Li, Bo Liu
2024	—	`conf`	Design of a Two-Stage Miller-Compensated Operational Amplifier Using an EDA Tool-Centered Approach. SMACD Yijia Hao, Miguel Gandara, Srinjoy Mitra, Sandy Cochran, Bo Liu
2023	—	`conf`	A 4.63pJ/b 112Gb/s DSP-Based PAM-4 Transceiver for a Large-Scale Switch in 5nm FinFET. ISSCC Henry Park, Mohammed Abdullatif, Ehung Chen, Ahmed Elmallah, Qaiser Nehal, Miguel Gandara, Tsz-Bin Liu, Amr Khashaba, Joonyeong Lee, Chih-Yi Kuan, Dhinessh Ramachandran, Ruey-Bo Sun, Atharav Atharav, Yusang Chun, Mantian Zhang, Deng-Fu Weng, Chung-Hsien Tsai, Chen-Hao Chang, Chia-Sheng Peng, Sheng-Tsung Hsu, Tamer A. Ali
2022	J	`jnl`	An Efficient Analog Circuit Sizing Method Based on Machine Learning Assisted Global Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ahmet Faruk Budak, Miguel Gandara, Wei Shi, David Z. Pan, Nan Sun, Bo Liu
2021	—	`conf`	56/112Gbps Wireline Transceivers for Next Generation Data Centers on 7nm FINFET CMOS Technology. CICC Tamer A. Ali, Mohammed Abdullatif, Henry Park, Ehung Chen, Ramy Awad, Miguel Gandara
2021	J	`jnl`	A 74.5-dB Dynamic Range 10-MHz BW CT-ΔΣ ADC With Distributed-Input VCO and Embedded Capacitive-π Network in 40-nm CMOS. IEEE J. Solid State Circuits Abhishek Mukherjee, Miguel Gandara, Xiangxing Yang, Linxiao Shen, Xiyuan Tang, Chen-Kai Hsu, Nan Sun
2020	—	`conf`	6.2 A 460mW 112Gb/s DSP-Based Transceiver with 38dB Loss Compensation for Next-Generation Data Centers in 7nm FinFET Technology. ISSCC Tamer A. Ali, Ehung Chen, Henry Park, Ramy Yousry, Yu-Ming Ying, Mohammed Abdullatif, Miguel Gandara, Chun-Cheng Liu, Po-Shuan Weng, Huan-Sheng Chen, Mohammad Elbadry, Qaiser Nehal, Kun-Hung Tsai, Kevin Tan, Yi-Chieh Huang, Chung-Hsien Tsai, Yuyun Chang, Yuan-Hao Tung
2018	—	`conf`	A 13-ENOB 2 ISSCC Shaolan Li, Bo Qiao, Miguel Gandara, Nan Sun
2018	J	`jnl`	A 13-ENOB Second-Order Noise-Shaping SAR ADC Realizing Optimized NTF Zeros Using the Error-Feedback Structure. IEEE J. Solid State Circuits Shaolan Li, Bo Qiao, Miguel Gandara, David Z. Pan, Nan Sun
2017	—	`conf`	A 172dB-FoM pipelined SAR ADC using a regenerative amplifier with self-timed gain control and mixed-signal background calibration. A-SSCC Miguel Gandara, Paridhi Gulati, Nan Sun
2017	—	`conf`	A pipelined SAR ADC reusing the comparator as residue amplifier. CICC Miguel Gandara, Wenjuan Guo, Xiyuan Tang, Long Chen, Yeonam Yoon, Nan Sun