Michel Robert - RankMe

94 papers A* 1A 8B 9C 9Misc 2Journal 18Unranked 46

Year	Rank	Type	Title / Venue / Authors
2023	J	`jnl`	A model-based approach to addressing energy demand in sustainable urban systems. Sustain. Comput. Informatics Syst. Abdoulaye Gamatié, Thomas Leduc, Daniel Siret, Gilles Sassatelli, Michel Robert
2023	J	`jnl`	Optimization of Data and Energy Migrations in Mini Data Centers for Carbon-Neutral Computing. IEEE Trans. Sustain. Comput. Marcos de Melo da Silva, Abdoulaye Gamatié, Gilles Sassatelli, Michael Poss, Michel Robert
2017	—	`conf`	Enhancements of narrowband IoT in 3GPP Rel-14 and Rel-15. CSCN Rapeepat Ratasuk, Nitin Mangalvedhe, Zhilan Xiong, Michel Robert, David Bhatoolaul
2016	—	`conf`	Data Channel Design and Performance for LTE Narrowband IoT. VTC Fall Rapeepat Ratasuk, Nitin Mangalvedhe, Jorma Kaikkonen, Michel Robert
2016	—	`conf`	Full-System Simulation of big.LITTLE Multicore Architecture for Performance and Energy Exploration. MCSoC Anastasiia Butko, Florent Bruguier, Abdoulaye Gamatié, Gilles Sassatelli, David Novo, Lionel Torres, Michel Robert
2016	—	`conf`	Overview of narrowband IoT in LTE Rel-13. CSCN Rapeepat Ratasuk, Nitin Mangalvedhe, Yanji Zhang, Michel Robert, Jussi-Pekka Koskinen
2015	—	`conf`	Design Exploration for next Generation High-Performance Manycore On-chip Systems: Application to big.LITTLE Architectures. ISVLSI Anastasiia Butko, Abdoulaye Gamatié, Gilles Sassatelli, Lionel Torres, Michel Robert
2013	J	`jnl`	Power-aware dynamic mapping heuristics for NoC-based MPSoCs using a unified model-based approach. ACM Trans. Embed. Comput. Syst. Luciano Ost, Marcelo Mandelli, Gabriel Marchesan Almeida, Leandro Möller, Leandro Soares Indrusiak, Gilles Sassatelli, Pascal Benoit, Manfred Glesner, Michel Robert, Fernando Moraes
2013	A*	`conf`	Simultaneous multithreading support in embedded distributed memory MPSoCs. DAC Rafael Garibotti, Luciano Ost, Rémi Busseuil, Mamady kourouma, Chris Adeniyi-Jones, Gilles Sassatelli, Michel Robert
2012	J	`jnl`	A Mobile Computing Framework for Pervasive Adaptive Platforms. Int. J. Distributed Sens. Networks Olivier Brousse, Jérémie Guillot, Gilles Sassatelli, Thierry Gil, François Grize, Michel Robert
2012	J	`jnl`	Enhancing Electromagnetic Analysis Using Magnitude Squared Incoherence. IEEE Trans. Very Large Scale Integr. Syst. Amine Dehbaoui, Victor Lomné, Thomas Ordas, Lionel Torres, Michel Robert, Philippe Maurine
2012	Misc	`conf`	Remote Execution in Distributed Memory MPSoC. FCCM Rémi Busseuil, Luciano Ost, Rafael Garibotti, Gilles Sassatelli, Michel Robert
2011	—	`ch.`	An Introduction to Multi-Core System on Chip - Trends and Challenges. Multiprocessor System-on-Chip Lionel Torres, Pascal Benoit, Gilles Sassatelli, Michel Robert, Fabien Clermidy, Diego Puschini
2011	—	`conf`	Exploring dynamic mapping impact on NoC-based MPSoCs performance using a model-based framework. SBCCI Luciano Ost, Marcelo Mandelli, Gabriel Marchesan Almeida, Leandro Soares Indrusiak, Leandro Möller, Manfred Glesner, Gilles Sassatelli, Michel Robert, Fernando Moraes
2011	—	`conf`	Exploring heterogeneous NoC-based MPSoCs: From FPGA to high-level modeling. ReCoSoC Luciano Ost, Gabriel Marchesan Almeida, Marcelo Mandelli, Eduardo Wächter, Sameer Varyani, Gilles Sassatelli, Leandro Soares Indrusiak, Michel Robert, Fernando Moraes
2011	—	`conf`	Open-Scale: A Scalable, Open-Source NOC-based MPSoC for Design Space Exploration. ReConFig Rémi Busseuil, Lyonel Barthe, Gabriel Marchesan Almeida, Luciano Ost, Florent Bruguier, Gilles Sassatelli, Pascal Benoit, Michel Robert, Lionel Torres
2011	J	`jnl`	PI and PID Regulation Approaches for Performance-Constrained Adaptive Multiprocessor System-on-Chip. IEEE Embed. Syst. Lett. Gabriel Marchesan Almeida, Rémi Busseuil, Luciano Ost, Florent Bruguier, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Michel Robert
2011	J	`jnl`	Timing slack monitoring under process and environmental variations: Application to a DSP performance optimization. Microelectron. J. Bettina Rebaud, Marc Belleville, Edith Beigné, Christian Bernard, Michel Robert, Philippe Maurine, Nadine Azémard
2010	—	`conf`	Adaptation Strategies in Multiprocessors System on Chip. VLSI-SoC (Selected Papers) Rémi Busseuil, Gabriel Marchesan Almeida, Luciano Ost, Sameer Varyani, Gilles Sassatelli, Michel Robert
2010	A	`conf`	Differential Power Analysis enhancement with statistical preprocessing. DATE Victor Lomné, Amine Dehbaoui, Philippe Maurine, Lionel Torres, Michel Robert
2010	—	`conf`	Providing Better Multi-processor Systems-on-Chip Resources Utilization by Means of Using a Control-Loop Feedback Mechanism. ReConFig Gabriel Marchesan Almeida, Sameer Varyani, Rémi Busseuil, Nicolas Hebert, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Michel Robert
2010	J	`jnl`	Run-time mapping for dynamic reconfiguration management in embedded systems. Int. J. Embed. Syst. Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Nicolas Saint-Jean
2010	C	`conf`	Spatial EM jamming: A countermeasure against EM Analysis? VLSI-SoC François Poucheret, Lyonel Barthe, Pascal Benoit, Lionel Torres, Philippe Maurine, Michel Robert
2009	—	`conf`	A Bio-Inspired Agent Framework for Hardware Accelerated Distributed Pervasive Applications. AHS Olivier Brousse, Jérémie Guillot, Gilles Sassatelli, Thierry Gil, Michel Robert, Juan Manuel Moreno, Alessandro E. P. Villa, Eduardo Sanchez
2009	J	`jnl`	An Adaptive Message Passing MPSoC Framework. Int. J. Reconfigurable Comput. Gabriel Marchesan Almeida, Gilles Sassatelli, Pascal Benoit, Nicolas Saint-Jean, Sameer Varyani, Lionel Torres, Michel Robert
2009	—	`conf`	Digital Timing Slack Monitors and Their Specific Insertion Flow for Adaptive Compensation of Variabilities. PATMOS Bettina Rebaud, Marc Belleville, Edith Beigné, Christian Bernard, Michel Robert, Philippe Maurine, Nadine Azémard
2009	C	`conf`	Enhancing Electromagnetic Attacks Using Spectral Coherence Based Cartography. VLSI-SoC Amine Dehbaoui, Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert
2009	A	`conf`	Evaluation on FPGA of triple rail logic robustness against DPA and DEMA. DATE Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert, Rafael Soares, Ney Calazans
2009	B	`conf`	JubiTool: Unified design flow for the Perplexus SIMD hardware accelerator. IEEE Congress on Evolutionary Computation Olivier Brousse, Jérémie Guillot, Thierry Gil, François Grize, Gilles Sassatelli, Juan Manuel Moreno, Jordi Madrenas, Alessandro E. P. Villa, Henri Volken, Michel Robert
2008	—	`conf`	A Novel Dummy Bitline Driver for Read Margin Improvement in an eSRAM. DELTA Michael Yap San Min, Philippe Maurine, Magali Bastian, Michel Robert
2008	—	`conf`	BAF: A Bio-Inspired Agent Framework for Distributed Pervasive Applications. GEM Olivier Brousse, Gilles Sassatelli, Thierry Gil, Yoann Guillemenet, Michel Robert, François Grize, Eduardo Sanchez, Yann Thoma, Andres Upegui, Juan Manuel Moreno, Jordi Madrenas
2008	B	`conf`	Bio-inspiration helps computers: A new machine. FPL Nicolas Saint-Jean, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Michel Robert
2008	—	`conf`	Evaluating the robustness of secure triple track logic through prototyping. SBCCI Rafael Soares, Ney Laert Vilar Calazans, Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert
2008	—	`conf`	MPI-Based Adaptive Task Migration Support on the HS-Scale System. ISVLSI Nicolas Saint-Jean, Pascal Benoit, Gilles Sassatelli, Lionel Torres, Michel Robert
2008	—	`conf`	Setup and Hold Timing Violations Induced by Process Variations, in a Digital Multiplier. ISVLSI Bettina Rebaud, Marc Belleville, Christian Bernard, Zeqin Wu, Michel Robert, Philippe Maurine, Nadine Azémard
2008	—	`conf`	Statistical Sizing of an eSRAM Dummy Bitline Driver for Read Margin Improvement in the Presence of Variability Aspects. ISVLSI Michael Yap San Min, Philippe Maurine, Magali Bastian, Michel Robert
2008	—	`conf`	The Perplexus Programming Framework: Combining Bio-inspiration and Agent-Oriented Programming for the Simulation of Large Scale Complex Systems. ICES Olivier Brousse, Gilles Sassatelli, Thierry Gil, Michel Robert, François Grize, Eduardo Sanchez, Andres Upegui, Yann Thoma
2008	—	`conf`	Triple Rail Logic Robustness against DPA. ReConFig Victor Lomné, Thomas Ordas, Philippe Maurine, Lionel Torres, Michel Robert, Rafael Soares, Ney Calazans
2007	A	`conf`	A Cryptographic Coarse Grain Reconfigurable Architecture Robust Against DPA. IPDPS Daniel Mesquita, Benoît Badrignans, Lionel Torres, Gilles Sassatelli, Michel Robert, Fernando Moraes
2007	—	`conf`	Analysis and Improvement of Dual Rail Logic as a Countermeasure Against DPA. PATMOS Alin Razafindraibe, Michel Robert, Philippe Maurine
2007	—	`conf`	Application Case Studies on HS-Scale, a MP-SOC for Embbeded Systems. ICSAMOS Nicolas Saint-Jean, Pascal Benoit, Gilles Sassatelli, Lionel Torres, Michel Robert
2007	—	`conf`	HS Scale: A run-time adaptable MP-SoC architecture. ReCoSoC Nicolas Saint-Jean, Camille Jalier, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Michel Robert
2007	—	`conf`	HS-Scale: a Hardware-Software Scalable MP-SOC Architecture for embedded Systems. ISVLSI Nicolas Saint-Jean, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Michel Robert
2007	C	`conf`	Improvement of dual rail logic as a countermeasure against DPA. VLSI-SoC Alin Razafindraibe, Michel Robert, Philippe Maurine
2007	Misc	`conf`	Run-time mapping and communication strategies for Homogeneous NoC-Based MPSoCs. FCCM Gilles Sassatelli, Nicolas Saint-Jean, Pascal Benoit, Lionel Torres, Michel Robert, Cristiane R. Woszezenki, Ismael Grehs, Fernando Gehm Moraes
2006	B	`conf`	A Leak Resistant Architecture Against Side Channel Attacks. FPL Daniel Mesquita, Benoît Badrignans, Lionel Torres, Gilles Sassatelli, Michel Robert, Jean-Claude Bajard, Fernando Gehm Moraes
2006	—	`conf`	A Leak Resistant SoC to Counteract Side Channel Attacks. SoC Daniel Mesquita, Benoît Badrignans, Lionel Torres, Gilles Sassatelli, Michel Robert, Fernando Gehm Moraes
2006	—	`conf`	A Parallel and Secure Architecture for Asymmetric Cryptography. ReCoSoC Benoît Badrignans, Daniel Mesquita, Jean-Claude Bajard, Lionel Torres, Gilles Sassatelli, Michel Robert
2006	—	`conf`	Dynamic Hardware Multiplexing: Improving Adaptability with a Run Time Reconfiguration Manager. ISVLSI Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Gaston Cambon, Jürgen Becker
2006	—	`conf`	Formal Evaluation of the Robustness of Dual-Rail Logic Against DPA Attacks. PATMOS Alin Razafindraibe, Michel Robert, Philippe Maurine
2006	C	`conf`	Security evaluation of dual rail logic against DPA attacks. VLSI-SoC Alin Razafindraibe, Philippe Maurine, Michel Robert, Marc Renaudin
2005	—	`conf`	A Method to Design Compact Dual-rail Asynchronous Primitives. PATMOS Alin Razafindraibe, Michel Robert, Marc Renaudin, Philippe Maurine
2005	—	`conf`	A new hardware countermeasure for masking power signatures of crypto cores. ReCoSoC Daniel Mesquita, Jean-Denis Techer, Lionel Torres, Gilles Sassatelli, Gaston Cambon, Michel Robert, Fernando Moraes
2005	B	`conf`	An Image Sensor with Global Motion Estimation for Micro Camera Module. ACIVS F. Gensolen, Guy Cathébras, Lionel Martin, Michel Robert
2005	A	`conf`	Automatic Task Scheduling / Loop Unrolling using Dedicated RTR Controllers in Coarse Grain Reconfigurable Architectures. IPDPS Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Gaston Cambon
2005	J	`jnl`	Compact and Secured Primitives for the Design of Asynchronous Circuits. J. Low Power Electron. Alin Razafindraibe, Michel Robert, Philippe Maurine
2005	C	`conf`	Current Mask Generation: an Analog Circuit to Thwart DPA Attacks. VLSI-SoC Daniel Mesquita, Jean-Denis Techer, Lionel Torres, Michel Robert, Guy Cathébras, Gilles Sassatelli, Fernando Gehm Moraes
2005	—	`conf`	Current mask generation: a transistor level security against DPA attacks. SBCCI Daniel Mesquita, Jean-Denis Techer, Lionel Torres, Gilles Sassatelli, Gaston Cambon, Michel Robert, Fernando Moraes
2005	J	`jnl`	Distributed system design based on dependability evaluation: a case study on a pilot thermal process. Reliab. Eng. Syst. Saf. Blaise Conrard, Jean-Marc Thiriet, Michel Robert
2005	A	`conf`	Dynamic hardware multiplexing for coarse grain reconfigurable architectures. FPGA Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Gaston Cambon
2005	J	`jnl`	Méthode de caractérisation des architectures d'accélérateurs flexibles pour systèmes sur puce. Tech. Sci. Informatiques Pascal Benoit, Gilles Sassatelli, Lionel Torres, Michel Robert, Gaston Cambon, Didier Demigny
2005	B	`conf`	Run-Time Scheduling for Random Multi-Tasking in Reconfigurable Coprocessors. FPL Pascal Benoit, Jürgen Becker, Michel Robert, Lionel Torres, Gilles Sassatelli, Gaston Cambon
2005	—	`conf`	Test Engineering Education in Europe - The CRTC experience through the EuNICE-Test project. EDUTECH Laurent Latorre, Yves Bertrand, Michel Robert, Marie-Lise Flottes
2004	A	`conf`	A flexibility aware budgeting for hierarchical flow timing closure. ICCAD Olivier Omedes, Michel Robert, Mohammed Ramdani
2004	—	`conf`	Design Optimization with Automated Cell Generation. PATMOS A. Landrault, Nadine Azémard, Philippe Maurine, Michel Robert, Daniel Auvergne
2004	—	`conf`	Metrics for Digital Signal Processing Architectures Characterization: Remanence and Scalability. SAMOS Pascal Benoit, Gilles Sassatelli, Lionel Torres, Didier Demigny, Michel Robert, Gaston Cambon
2003	B	`conf`	A Novel Approach for Architectural Model Characterization. An Example through the Systolic Ring. FPL Pascal Benoit, Gilles Sassatelli, Lionel Torres, Michel Robert, Gaston Cambon, Didier Demigny
2003	C	`conf`	Are coarse grain reconfigurable architectures suitable for cryptography? VLSI-SOC Daniel Mesquita, Lionel Torres, Fernando Gehm Moraes, Gilles Sassatelli, Michel Robert
2003	A	`conf`	Metrics for Reconfigurable Architectures Characterization: Remanence and Scalability. IPDPS Pascal Benoit, Gilles Sassatelli, Lionel Torres, Didier Demigny, Michel Robert, Gaston Cambon
2002	—	`conf`	Iris recognition system for person identification. PRIS Christel-Loïc Tisse, Lionel Martin, Lionel Torres, Michel Robert
2002	C	`ed.`	SOC Design Methodologies, IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01), December 3-5, 2001, Montpellier, France VLSI-SOC Michel Robert, Bruno Rouzeyre, Christian Piguet, Marie-Lise Flottes
2002	J	`jnl`	Toward a Pan-European virtual university in electrical and information engineering. IEEE Trans. Educ. Jean-Marc Thiriet, Michel Robert, Pentti Lappalainen, Michael H. W. Hoffmann, Maria João Martins, Anselmo Seoane
2002	—	`conf`	Transistor Level Synthesis Dedicated to Fast I.P. Prototyping. PATMOS Alexis Landrault, Ludovic Pellier, Alexandre Richard, Christian Jay, Michel Robert, Daniel Auvergne
2001	—	`conf`	An embedded core for the 2D wavelet transform. ETFA (2) Camille Diou, Lionel Torres, Michel Robert
2001	C	`conf`	Dynamically Reconfigurable Architectures for Digital Signal Processing Applications. VLSI-SOC Gilles Sassatelli, Lionel Torres, Pascal Benoit, Gaston Cambon, Michel Robert, Jérôme Galy
2000	B	`conf`	A Wavelet Core for Video Processing. ICIP Camille Diou, Lionel Torres, Michel Robert
2000	—	`conf`	Design of a Classification System for Rectangular Shapes Using a Co-Design Environment. SBCCI Rolf Fredi Molz, Paulo Martins Engel, Fernando Gehm Moraes, Lionel Torres, Michel Robert
1999	—	`conf`	A Virtual CMOS Library Approach for East Layout Synthesis. VLSI Fernando Moraes, Michel Robert, Daniel Auvergne
1999	—	`conf`	Embedded Systems Design And Verification: Reuse Oriented Prototyping Methodologies. VLSI S. Raimbault, Gilles Sassatelli, Gamille Cambon, Michel Robert, Sébastien Pillement, Lionel Torres
1999	C	`conf`	Fast Prototyping: A Case Study - The JPEG Compression Algorithm. IEEE International Workshop on Rapid System Prototyping Sébastien Pillement, Lionel Torres, Michel Robert, Gaston Cambon
1999	—	`conf`	Implementation of a Wavelet Transform Architecture for Image Processing. VLSI Camille Diou, Lionel Torres, Michel Robert
1999	A	`conf`	Increasing test coverage in a VLSI design course. ITC Michel Robert
1999	—	`conf`	RF Interface Design Using Mixed-Mode Methodology. VLSI Augusto Gallegos, Philippe Silvestre, Michel Robert, Daniel Auvergne
1998	J	`jnl`	A Recursive Digital Filter Implementation for Noisy and Blurred Images. Real Time Imaging Lionel Torres, El-Bay Bourennane, Michel Robert, Michel Paindavoine
1996	B	`conf`	Concurrent Design of Hardware/Software Dedicated Systems. FPL Sébastien Pillement, Lionel Torres, Michel Robert, Gaston Cambon
1995	—	`conf`	Delay modelling improvement for low voltage applications. EURO-DAC Jean Michel Daga, Michel Robert, Daniel Auvergne
1994	—	`conf`	Design of a Real Time Geometric Classifier. EDAC-ETC-EUROASIC Michel Robert, Patrick Gorria, Johel Mitéran, S. Turgis
1994	B	`conf`	Influence of Locig Block Layout Architecture on FPGA Performance. FPL Michel Robert, Lionel Torres, Fernando Moraes, Daniel Auvergne
1993	J	`jnl`	Post-layout timing simulation of CMOS circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Denis Deschacht, Michel Robert, Nadine Azémard-Crestani, Daniel Auvergne
1991	—	`conf`	Formal sizing rules of CMOS circuits. EURO-DAC Daniel Auvergne, Nadine Azémard, V. Bonzom, Denis Deschacht, Michel Robert
1991	J	`jnl`	Synchronous-mode evaluation of delays in CMOS structures. IEEE J. Solid State Circuits Denis Deschacht, Michel Robert, Daniel Auvergne
1991	J	`jnl`	TVA: A timing verifier with analytic temporal modelling. Microprocessing and Microprogramming D. Navarro, A. Roy, Michel Robert, Denis Deschacht, Daniel Auvergne
1990	J	`jnl`	Input waveform slope effects in CMOS delays. IEEE J. Solid State Circuits Daniel Auvergne, Nadine Azémard, Denis Deschacht, Michel Robert
1990	—	`conf`	Path runner: an accurate and fast timing analyser. EURO-DAC Denis Deschacht, P. Pinede, Michel Robert, Daniel Auvergne