Michel Jézéquel

96 papers A* 1A 7B 5C 16Misc 1Journal 36Unranked 30

Year	Rank	Type	Title / Venue / Authors
2023	J	`jnl`	Angle-Domain Hybrid Beamforming-Based mmWave Massive MIMO-NOMA Systems. IEEE Open J. Commun. Soc. Israa Khaled, Ammar El Falou, Charlotte Langlais, Michel Jézéquel, Bachar Elhassan
2022	J	`jnl`	A Literature Survey on Algorithms and Hardware Architectures of Max-Log-MAP Demapping. J. Circuits Syst. Comput. Mostafa Rizk, Amer Baghdadi, Michel Jézéquel
2021	—	`conf`	Joint Single- and Multi-Beam Angle-Domain NOMA for Hybrid MmWave MIMO Systems. WSA Israa Khaled, Charlotte Langlais, Ammar El Falou, Michel Jézéquel, Bachar Elhassan
2021	J	`jnl`	Multi-User Angle-Domain MIMO-NOMA System for mmWave Communications. IEEE Access Israa Khaled, Charlotte Langlais, Ammar El Falou, Bachar A. ElHassan, Michel Jézéquel
2021	J	`jnl`	NISC-Based MIMO MMSE Detector. J. Circuits Syst. Comput. Mostafa Rizk, Amer Baghdadi, Michel Jézéquel, Youssef Atat, Yasser Mohanna
2021	J	`jnl`	No-instruction-set-computer design experience of flexible and efficient architectures for digital communication applications: two case studies on MIMO turbo detection and universal turbo demapping. Des. Autom. Embed. Syst. Mostafa Rizk, Amer Baghdadi, Michel Jézéquel, Yasser Mohanna, Youssef Atat
2020	B	`conf`	Joint SDMA and Power-Domain NOMA System for Multi-User Mm-Wave Communications. IWCMC Israa Khaled, Charlotte Langlais, Ammar El Falou, Michel Jézéquel, Bachar Elhassan
2020	J	`jnl`	Low-Complexity Angle-Domain MIMO NOMA System with partial channel state information for MmWave Communications. CoRR Israa Khaled, Charlotte Langlais, Ammar El Falou, Bachar Elhassan, Michel Jézéquel
2020	—	`conf`	Multi-User Digital Beamforming Based on Path Angle Information for mm-Wave MIMO Systems. WSA Israa Khaled, Ammar El Falou, Charlotte Langlais, Bachar El-Hassan, Michel Jézéquel
2019	J	`jnl`	Budget Restricted Incremental Learning with Pre-Trained Convolutional Neural Networks and Binary Associative Memories. J. Signal Process. Syst. Ghouthi Boukli Hacene, Vincent Gripon, Nicolas Farrugia, Matthieu Arzel, Michel Jézéquel
2019	J	`jnl`	Computational Complexity Reduction of MMSE-IC MIMO Turbo Detection. J. Circuits Syst. Comput. Mostafa Rizk, Amer Baghdadi, Michel Jézéquel
2019	—	`conf`	Efficient Hardware Implementation of Incremental Learning and Inference on Chip. NEWCAS Ghouthi B. Hacene, Vincent Gripon, Nicolas Farrugia, Matthieu Arzel, Michel Jézéquel
2019	J	`jnl`	Efficient Hardware Implementation of Incremental Learning and Inference on Chip. CoRR Ghouthi Boukli Hacene, Vincent Gripon, Nicolas Farrugia, Matthieu Arzel, Michel Jézéquel
2019	—	`conf`	Performance Evaluation of Linear Precoding mmWave Multi-User MIMO Systems with NYUSIM Channel Simulator. MENACOMM Israa Khaled, Ammar El Falou, Charlotte Langlais, Bachar Elhassan, Michel Jézéquel
2018	—	`conf`	NISC Design Experience of Flexible Architectures for Digital Communication Applications. ICCA Mostafa Rizk, Amer Baghdadi, Michel Jézéquel, Ali Chamas Al Ghouwayel
2018	J	`jnl`	Transfer Incremental Learning using Data Augmentation. CoRR Ghouthi Boukli Hacene, Vincent Gripon, Nicolas Farrugia, Matthieu Arzel, Michel Jézéquel
2017	—	`conf`	Budget restricted incremental learning with pre-trained convolutional neural networks and binary associative memories. SiPS Ghouthi Boukli Hacene, Vincent Gripon, Nicolas Farrugia, Matthieu Arzel, Michel Jézéquel
2017	J	`jnl`	Efficient quantization and fixed-point representation for MIMO turbo-detection and turbo-demapping. EURASIP J. Embed. Syst. Mostafa Rizk, Amer Baghdadi, Michel Jézéquel, Yasser Mohanna, Youssef Atat
2017	J	`jnl`	Heterogeneous Multi-ASIP and NoC-Based Architecture for Adaptive Parallel TBICM-ID-SSD. IEEE Trans. Circuits Syst. II Express Briefs Atif Raza Jafri, Amer Baghdadi, Muhammad Najam-ul-Islam, Michel Jézéquel
2017	—	`conf`	Incremental learning on chip. GlobalSIP Ghouthi Boukli Hacene, Vincent Gripon, Nicolas Farrugia, Matthieu Arzel, Michel Jézéquel
2015	J	`jnl`	NISC-Based Soft-Input-Soft-Output Demapper. IEEE Trans. Circuits Syst. II Express Briefs Mostafa Rizk, Amer Baghdadi, Michel Jézéquel, Yasser Mohanna, Youssef Atat
2014	C	`conf`	Design and prototyping flow of NISC-based flexible MIMO turbo-equalizer. RSP Mostafa Rizk, Amer Baghdadi, Michel Jézéquel, Yasser Mohanna, Youssef Atat
2014	J	`jnl`	Soft Error Detection and Correction Technique for Radiation Hardening Based on C-element and BICS. IEEE Trans. Circuits Syst. II Express Briefs Daniel Gomez Toro, Matthieu Arzel, Fabrice Seguin, Michel Jézéquel
2013	J	`jnl`	Analysis of the Convergence Process by EXIT Charts for Parallel Implementations of Turbo Decoders. IEEE Commun. Lett. Oscar Sanchez, Christophe Jégo, Michel Jézéquel
2013	—	`conf`	Efficient NISI compensation technique for a low-cost satellite video receiver. ICC Esteban Gabriel Cabanillas, Didier Lohy, Cyril Lahuec, Michel Jézéquel
2013	—	`conf`	Flexible and efficient architecture design for MIMO MMSE-IC linear turbo-equalization. ICCIT Mostafa Rizk, Amer Baghdadi, Michel Jézéquel, Yasser Mohanna, Youssef Atat
2013	C	`conf`	Muller C-element based Decoder (MCD): A decoder against transient faults. ISCAS Yangyang Tang, Emmanuel Boutillon, Chris Winstead, Christophe Jégo, Michel Jézéquel
2013	—	`conf`	PAPR reduction using contiguous-tone Tone Reservation technique in optical OFDM IMDD transmissions. OFC/NFOEC Tuan Anh Truong, Hao Lin, Bruno Jahan, Matthieu Arzel, Michel Jézéquel
2013	A	`conf`	Parameterized area-efficient multi-standard turbo decoder. DATE Purushotham Murugappa, Amer Baghdadi, Michel Jézéquel
2013	C	`conf`	Rapid design and prototyping of a reconfigurable decoder architecture for QC-LDPC codes. RSP Purushotham Murugappa, Vianney Lapotre, Amer Baghdadi, Michel Jézéquel
2013	A	`conf`	Statically-scheduled application-specific processor design: a case-study on MMSE MIMO equalization. DATE Mostafa Rizk, Amer Baghdadi, Michel Jézéquel, Yasser Mohana, Youssef Atat
2013	—	`conf`	Study of a cosmic ray impact on combinatorial logic circuits of an 8bit SAR ADC in 65nm CMOS technology. MWSCAS Daniel Gomez Toro, Fabrice Seguin, Matthieu Arzel, Michel Jézéquel
2012	—	`conf`	A Dedicated Approach to Explore Design Space for Hardware Architecture of Turbo Decoders. SiPS Oscar Sanchez, Michel Jézéquel, Saeed-ur Rehman, Awais Sani, Cyrille Chavet, Philippe Coussy, Christophe Jégo
2012	J	`jnl`	A contribution to the reduction of the dynamic power dissipation in the turbo decoder. Ann. des Télécommunications Haisheng Liu, Christophe Jégo, Emmanuel Boutillon, Michel Jézéquel, Jean-Philippe Diguet
2012	—	`conf`	A space-time redundancy technique for embedded stochastic error correction. ISTC Chris Winstead, Yangyang Tang, Emmanuel Boutillon, Christophe Jégo, Michel Jézéquel
2012	—	`conf`	Adapted scheduling of QC-LDPC decoding for multistandard receivers. ISTC Jean Dion, Marie-Hélène Hamon, Pierre Penard, Matthieu Arzel, Michel Jézéquel
2012	—	`conf`	Adaptive complexity MIMO turbo receiver applying turbo demodulation. ISTC Salim Haddad, Amer Baghdadi, Michel Jézéquel
2012	C	`conf`	An LDPC decoding method for fault-tolerant digital logic. ISCAS Yangyang Tang, Chris Winstead, Emmanuel Boutillon, Christophe Jégo, Michel Jézéquel
2012	—	`conf`	Architecture efficiency of application-specific processors: A 170Mbit/s 0.644mm ISSoC Rachid Al-Khayat, Amer Baghdadi, Michel Jézéquel
2012	—	`conf`	Compensating the high power amplifier nonlinearity for a DVB-S2 system. NEWCAS Esteban Cabanillas, Didier Lohy, Cyril Lahuec, Michel Jézéquel
2012	J	`jnl`	Complexity adaptive iterative receiver performing TBICM-ID-SSD. EURASIP J. Adv. Signal Process. Salim Haddad, Amer Baghdadi, Michel Jézéquel
2012	—	`conf`	Complexity reduction of shuffled parallel iterative demodulation with turbo decoding. ICT Salim Haddad, Oscar Sanchez, Amer Baghdadi, Michel Jézéquel
2012	C	`conf`	FPGA prototyping and performance evaluation of multi-standard Turbo/LDPC Encoding and Decoding. RSP Purushotham Murugappa, Jean-Noel Bazin, Amer Baghdadi, Michel Jézéquel
2012	—	`conf`	High speed low complexity radix-16 Max-Log-MAP SISO decoder. ICECS Oscar Sanchez, C. Jegoy, Michel Jézéquel, Yannick Saouter
2012	—	`conf`	Multi-standard trellis-based FEC decoder. DASIP Jean Dion, Marie-Hélène Hamon, Pierre Penard, Matthieu Arzel, Michel Jézéquel
2012	J	`jnl`	On the Convergence Speed of Turbo Demodulation With Turbo Decoding. IEEE Trans. Signal Process. Salim Haddad, Amer Baghdadi, Michel Jézéquel
2012	J	`jnl`	On the Convergence Speed of Turbo Demodulation with Turbo Decoding CoRR Salim Haddad, Amer Baghdadi, Michel Jézéquel
2011	J	`jnl`	A Self-Powered Telemetry System to Estimate the Postoperative Instability of a Knee Implant. IEEE Trans. Biomed. Eng. Cyril Lahuec, Shaban Almouahed, Matthieu Arzel, Deepak Gupta, Chafiaâ Hamitouche, Michel Jézéquel, Eric Stindel, Christian Roux
2011	A	`conf`	A flexible high throughput multi-ASIP architecture for LDPC and turbo decoding. DATE Purushotham Murugappa, Rachid Al-Khayat, Amer Baghdadi, Michel Jézéquel
2011	A	`conf`	A low complexity stopping criterion for reducing power consumption in turbo decoders. DATE Pallavi Reddy, Fabien Clermidy, Amer Baghdadi, Michel Jézéquel
2011	C	`conf`	Area and throughput optimized ASIP for multi-standard turbo decoding. International Symposium on Rapid System Prototyping Rachid Al-Khayat, Purushotham Murugappa, Amer Baghdadi, Michel Jézéquel
2011	—	`conf`	Hardware efficiency versus error probability in unreliable computation. SiPS Yangyang Tang, Emmanuel Boutillon, Christophe Jégo, Michel Jézéquel
2011	J	`jnl`	Parallel MIMO Turbo Equalization. IEEE Commun. Lett. Atif Raza Jafri, Amer Baghdadi, Michel Jézéquel
2011	Misc	`conf`	Reducing the number of iterations in iterative demodulation with turbo decoding. SoftCOM Salim Haddad, Amer Baghdadi, Michel Jézéquel
2011	J	`jnl`	Turbo Product Code Decoder Without Interleaving Resource: From Parallelism Exploration to High Efficiency Architecture. J. Signal Process. Syst. Camille Leroux, Christophe Jégo, Patrick Adde, Deepak Gupta, Michel Jézéquel
2010	—	`conf`	A new single-error correction scheme based on self-diagnosis residue number arithmetic. DASIP Yangyang Tang, Emmanuel Boutillon, Christophe Jégo, Michel Jézéquel
2010	J	`jnl`	Parallelism Efficiency in Convolutional Turbo Decoding. EURASIP J. Adv. Signal Process. Olivier Muller, Amer Baghdadi, Michel Jézéquel
2010	—	`conf`	Power consumption analysis and energy efficient optimization for turbo decoder implementation. SoC Pallavi Reddy, Fabien Clermidy, Rasheed Al Khayat, Amer Baghdadi, Michel Jézéquel
2010	C	`conf`	Rapid design and prototyping of universal soft demapper. ISCAS Atif Raza Jafri, Amer Baghdadi, Michel Jézéquel
2010	J	`jnl`	Scaling of analog LDPC decoders in sub-100 nm CMOS processes. Integr. Meysam Zargham, Christian Schlegel, Jorge Pérez Chamorro, Cyril Lahuec, Fabrice Seguin, Michel Jézéquel, Vincent C. Gaudet
2009	J	`jnl`	ASIP-Based Universal Demapper for Multiwireless Standards. IEEE Embed. Syst. Lett. Atif Raza Jafri, Amer Baghdadi, Michel Jézéquel
2009	A	`conf`	ASIP-based flexible MMSE-IC Linear Equalizer for MIMO turbo-equalization applications. DATE Atif Raza Jafri, Daoud Karakolah, Amer Baghdadi, Michel Jézéquel
2009	C	`conf`	Decoding a Family of Dense Codes using the Sum-Product Algorithm. ISCAS Jorge Pérez Chamorro, Fabrice Seguin, Cyril Lahuec, Michel Jézéquel, Gwenaëlle Le Mestre
2009	C	`conf`	Design of an Iterative Receiver for Linearly Precoded MIMO Systems. ISCAS Daoud Karakolah, Christophe Jégo, Charlotte Langlais, Michel Jézéquel
2009	C	`conf`	Flexible Architectures for LDPC Decoders Based on Network on Chip Paradigm. DSD Fabrizio Vacca, Guido Masera, Hazem Moussa, Amer Baghdadi, Michel Jézéquel
2009	J	`jnl`	From Parallelism Levels to a Multi-ASIP Architecture for Turbo Decoding. IEEE Trans. Very Large Scale Integr. Syst. Olivier Muller, Amer Baghdadi, Michel Jézéquel
2009	J	`jnl`	High-throughput Block Turbo Decoding: From Full-parallel Architecture to FPGA Prototyping. J. Signal Process. Syst. Camille Leroux, Christophe Jégo, Patrick Adde, Michel Jézéquel
2009	C	`conf`	Rapid Prototyping of ASIP-based Flexible MMSE-IC Linear Equalizer. IEEE International Workshop on Rapid System Prototyping Atif Raza Jafri, Amer Baghdadi, Michel Jézéquel
2008	—	`conf`	A highly parallel Turbo Product Code decoder without interleaving resource. SiPS Camille Leroux, Christophe Jégo, Patrick Adde, Michel Jézéquel, Deepak Gupta
2008	C	`conf`	Binary de Bruijn interconnection network for a flexible LDPC/turbo decoder. ISCAS Hazem Moussa, Amer Baghdadi, Michel Jézéquel
2008	A*	`conf`	Binary de Bruijn on-chip network for a flexible multiprocessor LDPC decoder. DAC Hazem Moussa, Amer Baghdadi, Michel Jézéquel
2008	C	`conf`	From Application to ASIP-based FPGA Prototype: a Case Study on Turbo Decoding. IEEE International Workshop on Rapid System Prototyping Olivier Muller, Amer Baghdadi, Michel Jézéquel
2008	—	`conf`	On the higher efficiency of parallel Reed-Solomon turbo-decoding. ICECS Camille Leroux, Christophe Jégo, Patrick Adde, Michel Jézéquel
2007	A	`conf`	Butterfly and benes-based on-chip communication networks for multiprocessor turbo decoding. DATE Hazem Moussa, Olivier Muller, Amer Baghdadi, Michel Jézéquel
2007	—	`conf`	Energy Efficient Turbo Decoder with Reduced State Metric Quantization. SiPS Haisheng Liu, Jean-Philippe Diguet, Christophe Jégo, Michel Jézéquel, Emmanuel Boutillon
2007	J	`jnl`	Semi-Iterative Analog Turbo Decoding. IEEE Trans. Circuits Syst. I Regul. Pap. Matthieu Arzel, Cyril Lahuec, Fabrice Seguin, David Gnaedig, Michel Jézéquel
2007	C	`conf`	Towards Gb/s turbo decoding of product code onto an FPGA device. ISCAS Camille Leroux, Christophe Jégo, Patrick Adde, Michel Jézéquel
2006	—	`conf`	A Flexible Architecture For Block Turbo Decoders Using BCH Or Reed-Solomon Components Codes. ISVLSI Erwan Piriou, Christophe Jégo, Patrick Adde, Michel Jézéquel
2006	A	`conf`	ASIP-based multiprocessor SoC design for simple and double binary turbo decoding. DATE Olivier Muller, Amer Baghdadi, Michel Jézéquel
2006	—	`conf`	Design, Implementation and Prototyping of a Flexible Architecture Dedicated to Block Turbo Decoding. ReCoSoC Erwan Piriou, Christophe Jégo, Patrick Adde, Michel Jézéquel
2006	C	`conf`	Efficient architecture for Reed Solomon block turbo code. ISCAS Erwan Piriou, Christophe Jégo, Patrick Adde, Raphaël Le Bidan, Michel Jézéquel
2006	B	`conf`	On the Parallelism of Convolutional Turbo Decoding and Interleaving Interference. GLOBECOM Olivier Muller, Amer Baghdadi, Michel Jézéquel
2006	C	`conf`	Semi-iterative analog turbo decoding. ISCAS Matthieu Arzel, Fabrice Seguin, Cyril Lahuec, Michel Jézéquel
2005	—	`conf`	. Analog slice turbo decoding. ISCAS (1) Matthieu Arzel, Cyril Lahuec, Fabrice Seguin, David Gnaedig, Michel Jézéquel
2005	J	`jnl`	Design of Three-Dimensional Multiple Slice Turbo Codes. EURASIP J. Adv. Signal Process. David Gnaedig, Emmanuel Boutillon, Michel Jézéquel
2005	J	`jnl`	Foreword / Éditorial. Ann. des Télécommunications Ramesh Pyndiah, Michel Jézéquel
2005	J	`jnl`	On Multiple Slice Turbo Codes. Ann. des Télécommunications David Gnaedig, Emmanuel Boutillon, Michel Jézéquel, Vincent C. Gaudet, P. Glenn Gulak
2004	—	`conf`	Designing good permutations for turbo codes: towards a single model. ICC Claude Berrou, Yannick Saouter, Catherine Douillard, Sylvie Kerouédan, Michel Jézéquel
2004	J	`jnl`	Synthèse d'architecture pour la réalisation comportementale de l'algorithme MAP pour Turbo Décodeur. Ann. des Télécommunications David Gnaedig, Emmanuel Boutillon, Eric Martin, Amor Nafkha, Michel Jézéquel, Jacky Tousch, Nathalie Brengarth
2002	B	`conf`	Application of the error impulse method in the design of high-order turbo coded modulation. ITW Claude Berrou, Michel Jézéquel, Catherine Douillard, Laura Conde
2002	B	`conf`	Computing the minimum distance of linear codes by the error impulse method. GLOBECOM Claude Berrou, Sandrine Vaton, Michel Jézéquel, Catherine Douillard
2001	B	`conf`	The advantages of non-binary turbo codes. ITW Claude Berrou, Michel Jézéquel, Catherine Douillard, Sylvie Kerouédan
2001	J	`jnl`	Turbo codes: A wide-spreading technique. Ann. des Télécommunications Michel Jézéquel, Ramesh Pyndiah
2001	J	`jnl`	Turbocodes: Une technique qui se diffuse. Ann. des Télécommunications Michel Jézéquel, Ramesh Pyndiah
1999	J	`jnl`	Multiple parallel concatenation of circular recursive systematic convolutional (Crsc ) codes. Ann. des Télécommunications Claude Berrou, Catherine Douillard, Michel Jézéquel
1995	J	`jnl`	Iterative correction of intersymbol interference: Turbo-equalization. Eur. Trans. Telecommun. Catherine Douillard, Michel Jézéquel, Claude Berrou, Annie Picart, Pierre Didier, Alain Glavieux