Michel Dubois

126 papers A* 21A 11B 14Journal 53Unranked 24
YearRankTypeTitle / Venue / Authors
2020 A conf
Transaction-Based Core Reliability.
IPDPS
Sang Wook Stephen Do, Michel Dubois
2018 J jnl
Core Reliability: Leveraging Hardware Transactional Memory.
IEEE Comput. Archit. Lett.
Sang Wook Stephen Do, Michel Dubois
2016 J jnl
Accurate Model for Application Failure Due to Transient Faults in Caches.
IEEE Trans. Computers
Mehrtash Manoochehri, Michel Dubois
2016 J jnl
Power Efficient Hardware Transactional Memory: Dynamic Issue of Transactions.
ACM Trans. Archit. Code Optim.
Sang Wook Stephen Do, Michel Dubois
2015 — conf
Chip-independent Error Correction in main memories.
SAMOS
Mehrtash Manoochehri, Michel Dubois
2015 J jnl
Dynamic MIPS Rate Stabilization for Complex Processors.
ACM Trans. Archit. Code Optim.
Jinho Suh, Chieh-Ting Huang, Michel Dubois
2014 J jnl
Extremely Low Cost Error Protection with Correctable Parity Protected Cache.
IEEE Trans. Computers
Mehrtash Manoochehri, Murali Annavaram, Michel Dubois
2014 A conf
Reliability-Aware Exceptions: Tolerating intermittent faults in microprocessor array structures.
DATE
Waleed Dweik, Murali Annavaram, Michel Dubois
2013 A conf
PHYS: Profiled-HYbrid Sampling for soft error reliability benchmarking.
DSN
Jinho Suh, Murali Annavaram, Michel Dubois
2012 A* conf
MACAU: A Markov model for reliability evaluations of caches under Single-bit and Multi-bit Upsets.
HPCA
Jinho Suh, Murali Annavaram, Michel Dubois
2011 A* conf
CPPC: correctable parity protected cache.
ISCA
Mehrtash Manoochehri, Murali Annavaram, Michel Dubois
2011 A* conf
Soft error benchmarking of L2 caches with PARMA.
SIGMETRICS
Jinho Suh, Mehrtash Manoochehri, Murali Annavaram, Michel Dubois
2010 A* conf
Adaptive and Speculative Slack Simulations of CMPs on CMPs.
MICRO
Jianwei Chen, Lakshmi Kumar Dabbiru, Daniel Wong, Murali Annavaram, Michel Dubois
2009 J jnl
A comparative evaluation of hybrid distributed shared-memory systems.
J. Syst. Archit.
Adrian Moga, Michel Dubois
2009 J jnl
Accurate Instruction Pre-scheduling in Dynamically Scheduled Processors.
Trans. High Perform. Embed. Archit. Compil.
Woojin Choi, Seok-Jun Park, Michel Dubois
2009 A* conf
Dynamic MIPS rate stabilization in out-of-order processors.
ISCA
Jinho Suh, Michel Dubois
2009 B conf
Exploiting Simulation Slack to Improve Parallel Simulation Speed.
ICPP
Jianwei Chen, Murali Annavaram, Michel Dubois
2009 J jnl
SlackSim: a platform for parallel simulations of CMPs on CMPs.
SIGARCH Comput. Archit. News
Jianwei Chen, Murali Annavaram, Michel Dubois
2009 J jnl
SlackSim: a platform for parallel simulations of CMPs on CMPs.
SIGMETRICS Perform. Evaluation Rev.
Jianwei Chen, Murali Annavaram, Michel Dubois
2008 — ed.
High Performance Embedded Architectures and Compilers, Third International Conference, HiPEAC 2008, Göteborg, Sweden, January 27-29, 2008, Proceedings
HiPEAC
Per Stenström, Michel Dubois, Manolis Katevenis, Rajiv Gupta, Theo Ungerer
2008 A conf
STAMP: A universal algorithmic model for next-generation multithreaded machines and systems.
IPDPS
Michel Dubois, Hyunyoung Lee
2008 J jnl
Simple Penalty-Sensitive Cache Replacement Policies.
J. Instr. Level Parallelism
Jaeheon Jeong, Per Stenström, Michel Dubois
2008 J jnl
The Synonym Lookaside Buffer: A Solution to the Synonym Problem in Virtual Caches.
IEEE Trans. Computers
Xiaogang Qiu, Michel Dubois
2007 B conf
Loop-level Speculative Parallelism in Embedded Applications.
ICPP
Md. Mafijul Islam, Alexander Busck, Mikael Engbom, Simji Lee, Michel Dubois, Per Stenström
2007 — ed.
Proceedings of the 4th Conference on Computing Frontiers, 2007, Ischia, Italy, May 7-9, 2007
Conf. Computing Frontiers
Utpal Banerjee, José Moreira, Michel Dubois, Per Stenström
2007 A conf
STAMP: A Universal Algorithmic Model for Next-Generation Multithreaded Machines and Systems.
IPDPS
Michel Dubois, Hyunyoung Lee, Lan Lin
2007 J jnl
SimWattch: Integrating Complete-System and User-Level Performance and Power Simulators.
IEEE Micro
Jianwei Chen, Michel Dubois, Per Stenström
2006 J jnl
Cache Replacement Algorithms with Nonuniform Miss Costs.
IEEE Trans. Computers
Jaeheon Jeong, Michel Dubois
2006 — ed.
Proceedings of the 2006 ACM/IEEE Symposium on Architecture for Networking and Communications Systems, ANCS 2006, San Jose, California, USA, December 3-5, 2006
ANCS
Laxmi N. Bhuyan, Michel Dubois, Will Eatherton
2006 — conf
Simple penalty-sensitive replacement policies for caches.
Conf. Computing Frontiers
Jaeheon Jeong, Per Stenström, Michel Dubois
2005 — conf
Controlling leakage power with the replacement policy in slumberous caches.
Conf. Computing Frontiers
Nasir Mohyuddin, Rashed Zafar Bhatti, Michel Dubois
2005 J jnl
Moving Address Translation Closer to Memory in Distributed Shared-Memory Multiprocessors.
IEEE Trans. Parallel Distributed Syst.
Xiaogang Qiu, Michel Dubois
2004 — conf
Fighting the memory wall with assisted execution.
Conf. Computing Frontiers
Michel Dubois
2004 — conf
Self-correcting LRU replacement policies.
Conf. Computing Frontiers
Martin Kämpe, Per Stenström, Michel Dubois
2004 J jnl
Tolerating Late Memory Traps in Dynamically Scheduled Processors.
IEEE Trans. Computers
Xiaogang Qiu, Michel Dubois
2003 A* conf
Cost-Sensitive Cache Replacement Algorithms.
HPCA
Jaeheon Jeong, Michel Dubois
2003 B conf
Integrating complete-system and user-level performance/power simulators: the SimWattch approach.
ISPASS
Jianwei Chen, Michel Dubois, Per Stenström
2003 J jnl
Scalability implications of software-implemented coherence.
Comput. Syst. Sci. Eng.
Adrian Moga, Michel Dubois
2002 J jnl
Shared cache architectures for decision support systems.
Perform. Evaluation
Michel Dubois, Jaeheon Jeong, Ashwini K. Nanda
2002 A* conf
The FAB Predictor: Using Fourier Analysis to Predict the Outcome of Conditional Branches.
HPCA
Martin Kämpe, Per Stenström, Michel Dubois
2001 A* conf
Towards Virtually-Addressed Memory Hierarchies.
HPCA
Xiaogang Qiu, Michel Dubois
2000 J jnl
Compiler Controlled Prefetching for Multiprocessors Using Low-Overhead Traps and Prefetch Engines.
J. Parallel Distributed Comput.
Jonas Skeppstedt, Michel Dubois
2000 J jnl
Formal Automatic Verification of Cache Coherence in Multiprocessors with Relaxed Memory Models.
IEEE Trans. Parallel Distributed Syst.
Fong Pong, Michel Dubois
1999 B conf
Optimal Replacements in Caches with Two Miss Costs.
SPAA
Jaeheon Jeong, Michel Dubois
1999 A* conf
Tolerating Late Memory Traps in ILP Processors.
ISCA
Xiaogang Qiu, Michel Dubois
1998 J jnl
Design Verification of the S3.mp Cache-Coherent Shared-Memory System.
IEEE Trans. Computers
Fong Pong, Michael C. Browne, Gunes Aybay, Andreas Nowatzyk, Michel Dubois
1998 J jnl
Empirical Models of Miss Rates.
Parallel Comput.
KangWoo Lee, Michel Dubois
1998 J jnl
Formal Verification of Complex Coherence Protocols Using Symbolic State Models.
J. ACM
Fong Pong, Michel Dubois
1998 B conf
In-Memory Directories: Eliminating the Cost of Directories in CC-NUMAs.
SPAA
Christopher Ho, Heidi E. Ziegler, Michel Dubois
1998 — conf
Memory Access Buffering in Multiprocessors.
25 Years ISCA: Retrospectives and Reprints
Michel Dubois, Christoph Scheurich, Faye A. Briggs
1998 A* conf
Options for Dynamic Address Translation in COMAs.
ISCA
Xiaogang Qiu, Michel Dubois
1998 J jnl
Performance Evaluation and Cost Analysis of Cache Protocol Extensions for Shared-Memory Multiprocessors.
IEEE Trans. Computers
Fredrik Dahlgren, Michel Dubois, Per Stenström
1998 J jnl
Rapid Hardware Prototyping on RPM-2.
IEEE Des. Test Comput.
Michel Dubois, Jaeheon Jeong, Yong Ho Song, Adrian Moga
1998 — conf
Retrospective: Memory Access Buffering in Multiprocessors.
25 Years ISCA: Retrospectives and Reprints
Michel Dubois, Christoph Scheurich
1998 A* conf
The Effectiveness of SRAM Network Caches in Clustered DSMs.
HPCA
Adrian Moga, Michel Dubois
1997 J jnl
Boosting the Performance of Shared Memory Multiprocessors.
Computer
Per Stenström, Mats Brorsson, Fredrik Dahlgren, Håkan Grahn, Michel Dubois
1997 B conf
Bottleneck-Free Interconnect and IO Subsystem in SPAX.
ICPADS
KangWoo Lee, Woo-Jong Han, Michel Dubois
1997 B conf
Hardware Versus Software Implementation of COMA.
ICPP
Adrian Moga, Michel Dubois, Alain Gefflaut
1997 B conf
Hybrid compiler/hardware prefetching for multiprocessors using low-overhead cache miss traps.
ICPP
Jonas Skeppstedt, Michel Dubois
1997 J jnl
Verification Techniques for Cache Coherence Protocols.
ACM Comput. Surv.
Fong Pong, Michel Dubois
1997 J jnl
Virtual-address caches. Part 1: problems and solutions in uniprocessors.
IEEE Micro
Michel Cekleov, Michel Dubois
1997 J jnl
Virtual-address caches.2. Multiprocessor issues.
IEEE Micro
Michel Cekleov, Michel Dubois
1996 J jnl
Effects of Asynchronism on the Convergence Rate of Iterative Algorithms.
J. Parallel Distributed Comput.
Aydin Üresin, Michel Dubois
1996 — conf
Formal Verification of Delayed Consistency Protocols.
IPPS
Fong Pong, Michel Dubois
1996 — conf
Performance of Asynchronous Linear Iterations with Random Delays.
IPPS
Adrian Moga, Michel Dubois
1995 J jnl
A New Approach for the Verification of Cache Coherence Protocols.
IEEE Trans. Parallel Distributed Syst.
Fong Pong, Michel Dubois
1995 J jnl
Essential Misses and Data Traffic in Coherence Protocols.
J. Parallel Distributed Comput.
Michel Dubois, Jonas Skeppstedt, Per Stenström
1995 J jnl
Implementation and evaluation of update-based cache protocols under relaxed memory consistency models.
Future Gener. Comput. Syst.
Håkan Grahn, Per Stenström, Michel Dubois
1995 J jnl
Performance Evaluation of the Slotted Ring Multiprocessor.
IEEE Trans. Computers
Luiz André Barroso, Michel Dubois
1995 J jnl
RPM: A Rapid Prototyping Engine for Multiprocessor Systems.
Computer
Luiz André Barroso, Sasan Iman, Jaeheon Jeong, Koray Öner, Michel Dubois
1995 J jnl
Sequential Hardware Prefetching in Shared-Memory Multiprocessors.
IEEE Trans. Parallel Distributed Syst.
Fredrik Dahlgren, Michel Dubois, Per Stenström
1995 A conf
The Design of RPM: An FPGA-based Multiprocessor Emulator.
FPGA
Koray Öner, Luiz André Barroso, Sasan Iman, Jaeheon Jeong, Krishnan Ramamurthy, Michel Dubois
1995 — conf
Verifying Distributed Directory-Based Cahce Coherence Protocols: S3.mp, a Case Study.
Euro-Par
Fong Pong, Andreas Nowatzyk, Gunes Aybay, Michel Dubois
1994 — conf
An Integrated Methodology for the Verification of Directory-Based Cache Protocols.
ICPP (1)
Fong Pong, Per Stenström, Michel Dubois
1994 A* conf
Combined Performance Gains of Simple Cache Protocol Extensions.
ISCA
Fredrik Dahlgren, Michel Dubois, Per Stenström
1993 A* conf
Cache Inclusion and Processor Sampling in Multiprocessor Simulations.
SIGMETRICS
Jacqueline Chame, Michel Dubois
1993 — conf
Cache Protocols with Partial Block Invalidations.
IPPS
Yung-Syau Chen, Michel Dubois
1993 — conf
Correctness of a Directory-Based Cache Coherence Protocol: Early Experience.
SPDP
Fong Pong, Michel Dubois
1993 A conf
Effects of Memory Latencies on Non-Blocking Processor/Cache Architectures.
International Conference on Supercomputing
Koray Öner, Michel Dubois
1993 — conf
Fixed and Adaptive Sequential Prefetching in Shared Memory Multiprocessors.
ICPP (1)
Fredrik Dahlgren, Michel Dubois, Per Stenström
1993 A* conf
The Detection and Elimination of Useless Misses in Multiprocessors.
ISCA
Michel Dubois, Jonas Skeppstedt, Livio Ricciulli, Krishnan Ramamurthy, Per Stenström
1993 A* conf
The Performance of Cache-Coherent Ring-based Multiprocessors.
ISCA
Luiz André Barroso, Michel Dubois
1993 B conf
The Verification of Cache Coherence Protocols.
SPAA
Fong Pong, Michel Dubois
1992 — conf
Matching Algorithms and Architecture in Hierarchical Shared-Memory Multiprocessor (HMS) Systems.
IPPS
Ashfaq A. Khokhar, Michel Dubois
1992 — conf
Scalability Problems in Multiprocessors with Private Caches.
PARLE
Michel Dubois, Luiz André Barroso, Yung-Syau Chen, Koray Öner
1992 J jnl
Special Issue on Memory System Architectures for Scalable Multiprocessors.
J. Parallel Distributed Comput.
Michel Dubois
1991 — conf
Analytical Modeling for Finite Cache Effects.
ICPP (1)
Jin-Chin Wang, Michel Dubois, Faye A. Briggs
1991 — conf
Cache Coherence on a Slotted Ring.
ICPP (1)
Luiz André Barroso, Michel Dubois
1991 A conf
Delayed consistency and its effects on the miss rate of parallel programs.
SC
Michel Dubois, Jin-Chin Wang, Luiz André Barroso, KangWoo Lee, Yung-Syau Chen
1991 J jnl
Lockup-free Caches in High-Performance Multiprocessors.
J. Parallel Distributed Comput.
Christoph Scheurich, Michel Dubois
1991 J jnl
Shared Block Contention in a Cache Coherence Protocol.
IEEE Trans. Computers
Michel Dubois, Jin-Chin Wang
1991 J jnl
The Run-Time Efficiency of Parallel Asynchronous Algorithms.
IEEE Trans. Computers
Michel Dubois, Faye A. Briggs
1990 — conf
Algorithm-Driven Simulation and Performance Projection of a RISC-based Orthogonal Multiprocessor.
ICPP (3)
Sharad Mehrotra, Chien-Ming Cheng, Kai Hwang, Michel Dubois, Dhabaleswar K. Panda
1990 — conf
Asynchronous Iterations with Bounded Delay.
ICPP (3)
Aydin Üresin, Michel Dubois
1990 J jnl
Cache Architectures in Tightly Coupled Multiprocessors - Guest Editors' Introduction to the Special Issue.
Computer
Michel Dubois, Shreekant S. Thakkar
1990 J jnl
Memory Access Dependencies in Shared-Memory Multiprocessors.
IEEE Trans. Software Eng.
Michel Dubois, Christoph Scheurich
1990 A conf
OMP: a RISC-based multiprocessor using orthogonal-access memories and multiple spanning buses.
ICS
Kai Hwang, Michel Dubois, Dhabaleswar K. Panda, S. Rao, Shisheng Shang, Aydin Üresin, W. Mao, H. Nair, M. Lytwyn, F. Hsieh, J. Liu, Sharad Mehrotra, Chien-Ming Cheng
1990 J jnl
Parallel Asynchronous Algorithms for Discrete Data
J. ACM
Aydin Üresin, Michel Dubois
1990 J jnl
Performance comparison of cache coherence protocols based on the access burst model.
Comput. Syst. Sci. Eng.
Jin-Chin Wang, Michel Dubois
1990 J jnl
Scalable Shared-Memory Multiprocessor Architectures.
Computer
Shreekant S. Thakkar, Michel Dubois, Anthony T. Laundrie, Gurindar S. Sohi, David V. James, Stein Gjessing, Manu Thapar, Bruce Delagi, Michael J. Carlton, Alvin M. Despain
1990 — conf
Transient Models of Bus-Based Multiprocessors.
ICPP (1)
Anastasios A. Economides, Michel Dubois
1989 J jnl
Dynamic Page Migration in Multiprocessors with Distributed Global Memory.
IEEE Trans. Computers
Christoph Scheurich, Michel Dubois
1989 J jnl
Sufficient conditions for the convergence of asynchronous iterations.
Parallel Comput.
Aydin Üresin, Michel Dubois
1988 — conf
Concurrent Miss Resolution in Multiprocessor Caches.
ICPP (1)
Christoph Scheurich, Michel Dubois
1988 A conf
Dynamic Page Migration in Multiprocessors with Distributed Global Memory.
ICDCS
Christoph Scheurich, Michel Dubois
1988 — conf
Shared Data Contention in a Cache Coherence Protocol.
ICPP (1)
Michel Dubois, Jin-Chin Wang
1988 J jnl
Synchronization, Coherence, and Event Ordering in Multiprocessors.
Computer
Michel Dubois, Christoph Scheurich, Faye A. Briggs
1988 A conf
The design of a lockup-free cache for high-performance multiprocessors.
SC
Christoph Scheurich, Michel Dubois
1988 J jnl
Throughput Analysis of Cache-Based Multiprocessors with Multiple Buses.
IEEE Trans. Computers
Michel Dubois
1987 B conf
Asynchronous Relaxation of Non-Numerical Data.
ICPP
Aydin Üresin, Michel Dubois
1987 A* conf
Correct Memory Operation of Cache-Based Multiprocessors.
ISCA
Christoph Scheurich, Michel Dubois
1987 B conf
Effect of Invalidations on the Hit Ratio of Cache-Based Multiprocessors.
ICPP
Michel Dubois
1986 — conf
Generalized Asynchronous Iterations.
CONPAR
Aydin Üresin, Michel Dubois
1986 A* conf
Memory Access Buffering in Multiprocessors.
ISCA
Michel Dubois, Christoph Scheurich, Faye A. Briggs
1986 J jnl
The TX16: A Highly Programmable Multi-microprocessor Architecture.
IEEE Micro
Jean-Luc Gaudiot, Michel Dubois, Liang-Teh Lee, Nadim G. Tohme
1986 B conf
Trace-Driven Simulations of Parallel and Distributed Algorithms in Multiprocessors.
ICPP
Michel Dubois, Faye A. Briggs, Indira Patil, Meera Balakrishnan
1985 B conf
A Cache-Based Multiprocessor with High Efficiency.
ICPP
Michel Dubois
1985 J jnl
A Cache-Based Multiprocessor with High Efficiency.
IEEE Trans. Computers
Michel Dubois
1983 J jnl
Effectiveness of Private Caches in Multiprocessor Systems with Parallel-Pipelined Memories.
IEEE Trans. Computers
Faye A. Briggs, Michel Dubois
1982 B conf
An approximate analytical model for asynchronous processes in multiprocessors.
ICPP
Michel Dubois, Faye A. Briggs
1982 J jnl
Effects of Cache Coherency in Multiprocessors.
IEEE Trans. Computers
Michel Dubois, Faye A. Briggs
1982 A* conf
Effects of cache coherency in multiprocessors.
ISCA
Michel Dubois, Faye A. Briggs
1982 J jnl
Performance of Synchronized Iterative Processes in Multiprocessor Systems.
IEEE Trans. Software Eng.
Michel Dubois, Faye A. Briggs
1981 A* conf
Efficient Interprocessor Communications for MIMD Multiprocessor Systems.
ISCA
Michel Dubois, Faye A. Briggs
1981 A* conf
Performance of Cache-Based Multiprocessors.
SIGMETRICS
Faye A. Briggs, Michel Dubois
1981 A* conf
Throughout Analysis and Configuration Design of a Shared-Resource Multiprocessor System: PUMPS.
ISCA
Faye A. Briggs, Michel Dubois, Kai Hwang