Michalis D. Galanis

58 papers A 8B 2C 3Misc 2Journal 23Unranked 20
YearRankTypeTitle / Venue / Authors
2009 J jnl
Compiler assisted architectural exploration framework for coarse grained reconfigurable arrays.
J. Supercomput.
Grigoris Dimitroulakos, Nikos Kostaras, Michalis D. Galanis, Costas E. Goutis
2009 J jnl
Resource aware mapping on coarse grained reconfigurable arrays.
Microprocess. Microsystems
Grigoris Dimitroulakos, Stavros Georgiopoulos, Michalis D. Galanis, Costas E. Goutis
2008 J jnl
Novel Hardware Implementation of the Cipher Message Authentication Code.
J. Comput. Networks Commun.
Harris E. Michail, Georgios N. Selimis, Michalis D. Galanis, Dimitrios M. Schinianakis, Constantinos E. Goutis
2008 J jnl
Performance and Energy Consumption Improvements in Microprocessor Systems Utilizing a Coprocessor Data-Path.
J. Signal Process. Syst.
Michalis D. Galanis, Gregory Dimitroulakos, Costas E. Goutis
2008 J jnl
Speedups from extending embedded processors with a high-performance coarse-grained reconfigurable data-path.
J. Syst. Archit.
Michalis D. Galanis, Costas E. Goutis
2007 J jnl
A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable Platforms
CoRR
Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis
2007 — conf
A unified evaluation framework for coarse grained reconfigurable array architectures.
Conf. Computing Frontiers
Grigoris Dimitroulakos, Michalis D. Galanis, Nikos Kostaras, Costas E. Goutis
2007 J jnl
Automated framework for partitioning DSP applications in hybrid reconfigurable platforms.
Microprocess. Microsystems
Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis
2007 — conf
Compiler assisted architectural exploration for coarse grained reconfigurable arrays.
ACM Great Lakes Symposium on VLSI
Grigoris Dimitroulakos, Nikos Kostaras, Michalis D. Galanis, Costas E. Goutis
2007 J jnl
Design space exploration of an optimized compiler approach for a generic reconfigurable array architecture.
J. Supercomput.
Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis
2007 J jnl
Exploring the speedups of embedded microprocessor systems utilizing a high-performance coprocessor data-path.
J. Supercomput.
Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis
2007 — conf
Improving performance and energy consumption in embedded microprocessor platforms with a flexible custom coprocessor data-path.
ACM Great Lakes Symposium on VLSI
Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis
2007 — conf
Performance Optimization of Embedded Applications in a Hybrid Reconfigurable Platform.
PATMOS
Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis
2007 J jnl
Speedups and Energy Reductions From Mapping DSP Applications on an Embedded Reconfigurable System.
IEEE Trans. Very Large Scale Integr. Syst.
Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis
2007 A conf
Speedups and Energy Savings of Microprocessor Platforms with a Coarse-Grained Reconfigurable Data-Path.
IPDPS
Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis
2007 J jnl
Speedups in embedded systems with a high-performance coprocessor datapath.
ACM Trans. Design Autom. Electr. Syst.
Michalis D. Galanis, Gregory Dimitroulakos, Spyros Tragoudas, Costas E. Goutis
2006 J jnl
A design flow for speeding-up dsp applications in heterogeneous reconfigurable systems.
Microelectron. J.
Michalis D. Galanis, Athanasios Milidonis, Athanasios Kakarountas, Costas E. Goutis
2006 J jnl
A high-performance data path for synthesizing DSP kernels.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Constantinos E. Goutis
2006 J jnl
Architectures and FPGA Implementations of the 64-Bit MISTY1 Block Cipher.
J. Circuits Syst. Comput.
Paris Kitsos, Michalis D. Galanis, Odysseas G. Koufopavlou
2006 A conf
Design flow for optimizing performance in processor systems with on-chip coarse-grain reconfigurable logic.
IPDPS
Michalis D. Galanis, Grigoris Dimitroulakos, Constantinos E. Goutis
2006 A conf
Exploring the design space of an optimized compiler approach for mesh-like coarse-grained reconfigurable architectures.
IPDPS
Grigoris Dimitroulakos, Michalis D. Galanis, Constantinos E. Goutis
2006 A conf
Mapping DSP applications on processor systems with coarse-grain reconfigurable hardware.
IPDPS
Michalis D. Galanis, Grigoris Dimitroulakos, Constantinos E. Goutis
2006 C conf
Mapping DSP applications on processor/coarse-grain reconfigurable array architectures.
ISCAS
Michalis D. Galanis, Grigoris Dimitroulakos, Constantinos E. Goutis
2006 J jnl
Partitioning Methodology for Heterogeneous Reconfigurable Functional Units.
J. Supercomput.
Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis
2006 J jnl
Performance Improvements from Partitioning Applications to FPGA Hardware in Embedded SoCs.
J. Supercomput.
Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis
2006 — conf
Performance Improvements in Microprocessor Systems Utilizing a Copressor Data-Path.
ICSAMOS
Michalis D. Galanis, Gregory Dimitroulakos, Costas E. Goutis
2006 C conf
Resource constrained modulo scheduling for coarse-grained reconfigurable arrays.
ISCAS
Grigoris Dimitroulakos, Michalis D. Galanis, Constantinos E. Goutis
2005 A conf
A Compiler Method for Memory-Conscious Mapping of Applications on Coarse-Grained Reconfigurable Architectures.
IPDPS
Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis
2005 A conf
A Framework for Partitioning Computational Intensive Applications in Hybrid Reconfigurable Platforms.
IPDPS
Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis
2005 — conf
A RAM-based FPGA implementation of the 64-bit MISTY1 block cipher.
ISCAS (5)
Paris Kitsos, Michalis D. Galanis, Odysseas G. Koufopavlou
2005 J jnl
A Reconfigurable Coarse-grain Data-path for Accelerating Computational Intensive Kernels.
J. Circuits Syst. Comput.
Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Constantinos E. Goutis
2005 — conf
A high-throughput and memory efficient 2D discrete wavelet transform hardware architecture for JPEG2000 standard.
ISCAS (1)
Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis, Athanasios Milidonis
2005 J jnl
A high-throughput, memory efficient architecture for computing the tile-based 2D discrete wavelet transform for the JPEG2000.
Integr.
Grigoris Dimitroulakos, Michalis D. Galanis, Athanasios Milidonis, Constantinos E. Goutis
2005 J jnl
A method for partitioning applications in hybrid reconfigurable architectures.
Des. Autom. Embed. Syst.
Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Costas E. Goutis
2005 — conf
A methodology for partitioning DSP applications in hybrid reconfigurable systems.
ISCAS (2)
Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis
2005 Misc conf
Accelerating Applications by Mapping Critical Kernels on Coarse-Grain Reconfigurable Hardware in Hybrid Systems.
FCCM
Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis
2005 — conf
Alleviating the Data Memory Bandwidth Bottleneck in Coarse-Grained Reconfigurable Arrays.
ASAP
Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis
2005 J jnl
An Fpga Implementation of the Gprs Encryption Algorithm 3 (gea3).
J. Circuits Syst. Comput.
Paris Kitsos, Michalis D. Galanis, Odysseas G. Koufopavlou
2005 — conf
An automated methodology for memory-conscious mapping of DSP applications on coarse-grain reconfigurable arrays.
ISCAS (4)
Michalis D. Galanis, Gregory Dimitroulakos, Constantinos E. Goutis
2005 J jnl
Comparison of the Hardware Implementation of Stream Ciphers.
Int. Arab J. Inf. Technol.
Michalis D. Galanis, Paris Kitsos, Giorgos Kostopoulos, Nicolas Sklavos, Constantinos E. Goutis
2005 — conf
Partitioning DSP applications to different granularity reconfigurable hardware.
ICECS
Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis
2005 — conf
Performance Gains from Partitioning Embedded Applications in Processor-FPGA SoCs.
PATMOS
Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis
2005 B conf
Performance Improvements using Coarse-Grain Reconfigurable Logic in Embedded SoCs.
FPL
Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis
2005 — conf
Speedups from Partitioning Critical Software Parts to Coarse-Grain Reconfigurable Hardware.
ASAP
Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis
2004 J jnl
64-bit Block ciphers: hardware implementations and comparison analysis.
Comput. Electr. Eng.
Paris Kitsos, Nicolas Sklavos, Michalis D. Galanis, Odysseas G. Koufopavlou
2004 J jnl
A Framework for Data Partitioning for C++ Data-Intensive Applications.
Des. Autom. Embed. Syst.
Athanasios Milidonis, Gregory Dimitroulakos, Michalis D. Galanis, Athanasios P. Kakarountas, George Theodoridis, Constantinos E. Goutis, Francky Catthoor
2004 — conf
A Novel Data-Path for Accelerating DSP Kernels.
SAMOS
Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Costas E. Goutis
2004 A conf
A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable Platforms.
DATE
Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis
2004 — conf
A high performance data-path to accelerate DSP kernels.
ICECS
Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Costas E. Goutis
2004 A conf
A novel coarse-grain reconfigurable data-path for accelerating DSP kernels.
FPGA
Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Constantinos E. Goutis
2004 Misc conf
Accelerating DSP Applications on a Mixed Granularity Platform with a New Reconfigurable Coarse-Grain Data-Path.
FCCM
Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Constantinos E. Goutis
2004 C conf
An Automated C++ Code and Data Partitioning Framework for Data Management of Data-Intensive Applications.
SCOPES
Athanasios Milidonis, Grigoris Dimitroulakos, Michalis D. Galanis, George Theodoridis, Constantinos E. Goutis, Francky Catthoor
2004 — conf
Comparison of the hardware architectures and FPGA implementations of stream ciphers.
ICECS
Michalis D. Galanis, Paris Kitsos, Giorgos Kostopoulos, Nicolas Sklavos, Odysseas G. Koufopavlou, Costas E. Goutis
2004 — conf
High-speed hardware implementations of the KASUMI block cipher.
ISCAS (2)
Paris Kitsos, Michalis D. Galanis, Odysseas G. Koufopavlou
2004 — conf
Mapping Computational Intensive Applications to a New Coarse-Grained Reconfigurable Data-Path.
PATMOS
Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Constantinos E. Goutis
2004 B conf
Mapping DSP Applications to a High-Performance Reconfigurable Coarse-Grain Data-Path.
FPL
Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Constantinos E. Goutis
2003 — conf
Power aware data type refinement on the HIPERLAN/2.
ICECS
Gregory Dimitroulakos, Athanasios Milidonis, Michalis D. Galanis, George Theodoridis, Costas E. Goutis, Francky Catthoor
2002 — conf
A DSP course for real-time systems design and implementation based on the TMS320C6211 DSK.
DSP
Michalis D. Galanis, Arhanassios Papazacharias, Evangelos Zigouris