Michal Rimon

15 papers A* 4A 1C 1Journal 4Unranked 5
YearRankTypeTitle / Venue / Authors
2015 J jnl
Solutions to IBM POWER8 verification challenges.
IBM J. Res. Dev.
Klaus-Dieter Schubert, John M. Ludden, Salma Ayub, J. Behrend, Bishop Brock, Fady Copty, S. M. German, Oz Hershkovitz, H. Horbach, Jonathan R. Jackson, K. Keuerleber, J. Koesters, Larry S. Leitner, G. B. Meil, Charles Meissner, Ronny Morad, Amir Nahir, Viresh Paruthi, Richard D. Peterson, Randall R. Pratt, Michal Rimon, John Schumann
2012 — conf
A Novel Approach for Implementing Microarchitectural Verification Plans in Processor Designs.
Haifa Verification Conference
Yoav Katz, Michal Rimon, Avi Ziv
2012 A conf
Generating instruction streams using abstract CSP.
DATE
Yoav Katz, Michal Rimon, Avi Ziv
2011 A* conf
Learning microarchitectural behaviors to improve stimuli generation quality.
DAC
Yoav Katz, Michal Rimon, Avi Ziv, Gai Shaked
2010 — conf
Advances in Simultaneous Multithreading Testcase Generation Methods.
Haifa Verification Conference
John M. Ludden, Michal Rimon, Bryan G. Hickerson, Allon Adir
2010 C conf
Ontology-Based Tools in the Service of Hardware Verification.
SEKE
Eyal Bin, Alaa Ghanayim, Karen Holtz, Eitan Marcus, Ronny Morad, Ofer Peled, Michal Rimon, Gil Shurek, Elena Tsanko
2007 J jnl
Constraint-Based Random Stimuli Generation for Hardware Verification.
AI Mag.
Yehuda Naveh, Michal Rimon, Itai Jaeger, Yoav Katz, Michael Vinov, Eitan Marcus, Gil Shurek
2006 — conf
Addressing Test Generation Challenges for Configurable Processor Verification.
HLDVT
Michal Rimon, Yossi Lichtenstein, Allon Adir, Itai Jaeger, Michael Vinov, S. Johnson, D. Jani
2006 A* conf
Constraint-Based Random Stimuli Generation for Hardware Verification.
AAAI
Yehuda Naveh, Michal Rimon, Itai Jaeger, Yoav Katz, Michael Vinov, Eitan Marcus, Gil Shurek
2005 A* conf
VLIW: a case study of parallelism verification.
DAC
Allon Adir, Yaron Arbetman, Bella Dubrov, Yossi Lichtenstein, Michal Rimon, Michael Vinov, Massimo A. Calligaro, Andrew Cofler, Gabriel Duffy
2004 J jnl
Genesys-Pro: Innovations in Test Program Generation for Functional Processor Verification.
IEEE Des. Test Comput.
Allon Adir, Eli Almog, Laurent Fournier, Eitan Marcus, Michal Rimon, Michael Vinov, Avi Ziv
2004 A* conf
Industrial experience with test generation languages for processor verification.
DAC
Michael L. Behm, John M. Ludden, Yossi Lichtenstein, Michal Rimon, Michael Vinov
2001 — conf
Improving test quality through resource reallocation.
HLDVT
Allon Adir, Eitan Marcus, Michal Rimon, Amir Voskoboynik
1994 J jnl
A knowledge-based prototyping environment for construction of scientific modeling software.
Autom. Softw. Eng.
Richard M. Keller, Michal Rimon, Aseem Das
1992 — conf
A knowledge-based software development environment for scientific model-building.
KBSE
Richard M. Keller, Michal Rimon