Michael Zelikson

11 papers A* 1A 1C 1Journal 2Unranked 6

Year	Rank	Type	Title / Venue / Authors
2023	—	`conf`	A Digital Low-Dropout (LDO) Linear Regulator with Adaptive Transfer Function Featuring 125A/mm ISSCC Michael Zelikson, Kosta Luria, Lior Gil, Yuval Brown, Vadim Goldenbeg, Dor Kasif, Elias Hlees, Alex Vinichuk
2023	—	`conf`	A Monolithic 26A/mm ISSCC Nicolas Butzen, Harish Krishnamurthy, Zakir K. Ahmed, Sheldon Weng, Krishnan Ravichandran, Michael Zelikson, James W. Tschanz, Jonathan Douglas
2016	—	`conf`	4.1 14nm 6th-generation Core processor SoC with low power consumption and improved performance. ISSCC Eyal Fayneh, Marcelo Yuffe, Ernest Knoll, Michael Zelikson, Muhammad Abozaed, Yair Talker, Ziv Shmuely, Saher Abu Rahme
2016	J	`jnl`	Dual-Mode Low-Drop-Out Regulator/Power Gate With Linear and On-Off Conduction for Microprocessor Core On-Die Supply Voltages in 14 nm. IEEE J. Solid State Circuits Kosta Luria, Joseph Shor, Michael Zelikson, Alex Lyakhov
2015	—	`conf`	8.7 Dual-use low-drop-out regulator/power gate with linear and on-off conduction modes for microprocessor on-die supply voltages in 14nm. ISSCC Kosta Luria, Joseph Shor, Michael Zelikson, Alex Lyakhov
2012	J	`jnl`	A Fully Integrated Multi-CPU, Processor Graphics, and Memory Controller 32-nm Processor. IEEE J. Solid State Circuits Marcelo Yuffe, Moty Mehalel, Ernest Knoll, Joseph Shor, Tsvika Kurts, Eran Altshuler, Eyal Fayneh, Kosta Luria, Michael Zelikson
2010	—	`conf`	Efficiency optimization of integrated DC-DC buck converters. ICECS Gregory Sizikov, Avinoam Kolodny, Eby G. Friedman, Michael Zelikson
2004	—	`conf`	Two novel cross-cascode differential amplifiers. ICECS Yuri Bruck, Michael Zelikson
2003	A*	`conf`	On-chip interconnect-aware design and modeling methodology, based on high bandwidth transmission line devices. DAC David Goren, Michael Zelikson, Rachel Gordin, Israel A. Wagner, Anastasia Barger, Alon Amir, Betty Livshitz, Anatoly Sherman, Youri Tretiakov, Robert A. Groves, J. Park, Donald L. Jordan, Sue E. Strang, Raminderpal Singh, Carl E. Dickey, David L. Harame
2002	A	`conf`	An Interconnect-Aware Methodology for Analog and Mixed Signal Design, Based on High Bandwidth (Over 40 Ghz) On-Chip Transmission Line Approach . DATE David Goren, Michael Zelikson, Tiberiu C. Galambos, Rachel Gordin, Betty Livshitz, Alon Amir, Anatoly Sherman, Israel A. Wagner
2000	C	`conf`	Novel design technique for highly linear current mode amplifiers. Analysis, design, simulations. ISCAS Yuri Bruck, Michael Zelikson, Gennady Burdo