Michael Rogenmoser

23 papers A* 1B 2Journal 18Unranked 2
YearRankTypeTitle / Venue / Authors
2026 J jnl
Who Checks the Checker? Enhancing Component-level Architectural SEU Fault Tolerance for End-to-End SoC Protection.
CoRR
Michael Rogenmoser, Philippe Sauter, Chen Wu, Angelo Garofalo, Luca Benini
2025 J jnl
A Direct Memory Access Controller (DMAC) for Irregular Data Transfers on RISC-V Linux Systems.
CoRR
Thomas Benz, Axel Vanoni, Michael Rogenmoser, Luca Benini
2025 J jnl
A Reliable, Time-Predictable Heterogeneous SoC for AI-Enhanced Mixed-Criticality Edge Applications.
CoRR
Angelo Garofalo, Alessandro Ottaviano, Matteo Perotti, Thomas Benz, Yvan Tortorella, Robert Balas, Michael Rogenmoser, Chi Zhang, Luca Bertaccini, Nils Wistoff, Maicol Ciani, Cyril Koenig, Mattia Sinigaglia, Luca Valente, Paul Scheffler, Manuel Eggimann, Matheus A. Cavalcante, Francesco Restuccia, Alessandro Biondi, Francesco Conti, Frank K. Gürkaynak, Davide Rossi, Luca Benini
2025 J jnl
A Reliable, Time-Predictable Heterogeneous SoC for AI-Enhanced Mixed-Criticality Edge Applications.
IEEE Trans. Circuits Syst. II Express Briefs
Angelo Garofalo, Alessandro Ottaviano, Matteo Perotti, Thomas Benz, Yvan Tortorella, Robert Balas, Michael Rogenmoser, Chi Zhang, Luca Bertaccini, Nils Wistoff, Maicol Ciani, Cyril Koenig, Mattia Sinigaglia, Luca Valente, Paul Scheffler, Manuel Eggimann, Matheus A. Cavalcante, Francesco Restuccia, Alessandro Biondi, Francesco Conti, Frank K. Gürkaynak, Davide Rossi, Luca Benini
2025 J jnl
FlooNoC: A 645-Gb/s/link 0.15-pJ/B/hop Open-Source NoC With Wide Physical Links and End-to-End AXI4 Parallel Multistream Support.
IEEE Trans. Very Large Scale Integr. Syst.
Tim Fischer, Michael Rogenmoser, Thomas Benz, Frank K. Gürkaynak, Luca Benini
2025 J jnl
Hybrid Modular Redundancy: Exploring Modular Redundancy Approaches in RISC-V Multi-core Computing Clusters for Reliable Processing in Space.
ACM Trans. Cyber Phys. Syst.
Michael Rogenmoser, Yvan Tortorella, Davide Rossi, Francesco Conti, Luca Benini
2025 J jnl
relOBI: A Reliable Low-latency Interconnect for Tightly-Coupled On-chip Communication.
CoRR
Michael Rogenmoser, Angelo Garofalo, Luca Benini
2024 J jnl
A High-Performance, Energy-Efficient Modular DMA Engine Architecture.
IEEE Trans. Computers
Thomas Benz, Michael Rogenmoser, Paul Scheffler, Samuel Riedel, Alessandro Ottaviano, Andreas Kurth, Torsten Hoefler, Luca Benini
2024 J jnl
Design and Experimental Investigation of Trikarenos: A Fault-Tolerant 28nm RISC-V-based SoC.
CoRR
Michael Rogenmoser, Philip Wiese, Bruno E. Forlin, Frank K. Gürkaynak, Paolo Rech, Alessandra Menicucci, Marco Ottavi, Luca Benini
2024 J jnl
FlooNoC: A 645 Gbps/link 0.15 pJ/B/hop Open-Source NoC with Wide Physical Links and End-to-End AXI4 Parallel Multi-Stream Support.
CoRR
Tim Fischer, Michael Rogenmoser, Thomas Benz, Frank K. Gürkaynak, Luca Benini
2024 J jnl
SentryCore: A RISC-V Co-Processor System for Safe, Real-Time Control Applications.
CoRR
Michael Rogenmoser, Alessandro Ottaviano, Thomas Benz, Robert Balas, Matteo Perotti, Angelo Garofalo, Luca Benini
2023 J jnl
A High-performance, Energy-efficient Modular DMA Engine Architecture.
CoRR
Thomas Benz, Michael Rogenmoser, Paul Scheffler, Samuel Riedel, Alessandro Ottaviano, Andreas Kurth, Torsten Hoefler, Luca Benini
2023 J jnl
FlooNoC: A Multi-Tb/s Wide NoC for Heterogeneous AXI4 Traffic.
IEEE Des. Test
Tim Fischer, Michael Rogenmoser, Matheus A. Cavalcante, Frank K. Gürkaynak, Luca Benini
2023 J jnl
FlooNoC: A Multi-Tbps Wide NoC for Heterogeneous AXI4 Traffic.
CoRR
Tim Fischer, Michael Rogenmoser, Matheus A. Cavalcante, Frank K. Gürkaynak, Luca Benini
2023 J jnl
Hybrid Modular Redundancy: Exploring Modular Redundancy Approaches in RISC-V Multi-Core Computing Clusters for Reliable Processing in Space.
CoRR
Michael Rogenmoser, Yvan Tortorella, Davide Rossi, Francesco Conti, Luca Benini
2023 A* conf
PATRONoC: Parallel AXI Transport Reducing Overhead for Networks-on-Chip targeting Multi-Accelerator DNN Platforms at the Edge.
DAC
Vikram Jain, Matheus A. Cavalcante, Nazareno Bruschi, Michael Rogenmoser, Thomas Benz, Andreas Kurth, Davide Rossi, Luca Benini, Marian Verhelst
2023 J jnl
PATRONoC: Parallel AXI Transport Reducing Overhead for Networks-on-Chip targeting Multi-Accelerator DNN Platforms at the Edge.
CoRR
Vikram Jain, Matheus A. Cavalcante, Nazareno Bruschi, Michael Rogenmoser, Thomas Benz, Andreas Kurth, Davide Rossi, Luca Benini, Marian Verhelst
2023 B conf
PULP Fiction No More - Dependable PULP Systems for Space.
ETS
Markus Ulbricht, Yvan Tortorella, Michael Rogenmoser, Li Lu, Junchao Chen, Francesco Conti, Milos Krstic, Luca Benini
2023 — conf
Trikarenos: A Fault-Tolerant RISC-V-based Microcontroller for CubeSats in 28nm.
ICECS
Michael Rogenmoser, Luca Benini
2023 J jnl
Trikarenos: A Fault-Tolerant RISC-V-based Microcontroller for CubeSats in 28nm.
CoRR
Michael Rogenmoser, Luca Benini
2022 — conf
On-Demand Redundancy Grouping: Selectable Soft-Error Tolerance for a Multicore Cluster.
ISVLSI
Michael Rogenmoser, Nils Wistoff, Pirmin Vogel, Frank K. Gürkaynak, Luca Benini
2022 J jnl
On-Demand Redundancy Grouping: Selectable Soft-Error Tolerance for a Multicore Cluster.
CoRR
Michael Rogenmoser, Nils Wistoff, Pirmin Vogel, Frank K. Gürkaynak, Luca Benini
2022 B conf
WideVision: A Low-Power, Multi-Protocol Wireless Vision Platform for Distributed Surveillance.
WiMob
Moritz Scherer, Fabian Sidler, Michael Rogenmoser, Michele Magno, Luca Benini