Michael Laurenzano

21 papers A 3B 1C 1Journal 6Unranked 9
YearRankTypeTitle / Venue / Authors
2019 J jnl
Caliper: Interference Estimator for Multi-tenant Environments Sharing Architectural Resources.
ACM Trans. Archit. Code Optim.
Ram Srivatsa Kannan, Michael Laurenzano, Jeongseob Ahn, Jason Mars, Lingjia Tang
2018 J jnl
Rethinking Numerical Representations for Deep Neural Networks.
CoRR
Parker Hill, Babak Zamirai, Shengshuo Lu, Yu-Wei Chao, Michael Laurenzano, Mehrzad Samadi, Marios C. Papaefthymiou, Scott A. Mahlke, Thomas F. Wenisch, Jia Deng, Lingjia Tang, Jason Mars
2016 — —
Low-overhead Online Code Transformations.
Michael Laurenzano
2016 J jnl
PMaC's green queue: a framework for selecting energy optimal DVFS configurations in large scale MPI applications.
Concurr. Comput. Pract. Exp.
Joshua Peraza, Ananta Tiwari, Michael Laurenzano, Laura Carrington, Allan Snavely
2016 J jnl
The case for colocation of high performance computing workloads.
Concurr. Comput. Pract. Exp.
Alex D. Breslow, Leo Porter, Ananta Tiwari, Michael Laurenzano, Laura Carrington, Dean M. Tullsen, Allan Snavely
2015 — conf
Performance and energy efficiency analysis of 64-bit ARM using GAMESS.
Co-HPC@SC
Ananta Tiwari, Kristopher Keipert, Adam Jundt, Joshua Peraza, Sarom S. Leang, Michael Laurenzano, Mark S. Gordon, Laura Carrington
2013 J jnl
Characterizing Large-Scale HPC Applications through Trace extrapolation.
Parallel Process. Lett.
Laura Carrington, Michael Laurenzano, Ananta Tiwari
2013 — conf
Inferring Large-Scale Computation Behavior via Trace Extrapolation.
IPDPS Workshops
Laura Carrington, Michael Laurenzano, Ananta Tiwari
2013 C conf
Understanding the performance of stencil computations on Intel's Xeon Phi.
CLUSTER
Joshua Peraza, Ananta Tiwari, Michael Laurenzano, Laura Carrington, William A. Ward Jr., Roy L. Campbell
2012 — conf
A Static Binary Instrumentation Threading Model for Fast Memory Trace Collection.
SC Companion
Michael Laurenzano, Joshua Peraza, Laura Carrington, Ananta Tiwari, William A. Ward Jr., Roy L. Campbell
2012 — conf
Efficient HPC Data Motion via Scratchpad Memory.
SC Companion
Kayla O. Seager, Ananta Tiwari, Michael Laurenzano, Joshua Peraza, Pietro Cicotti, Laura Carrington
2012 — conf
Green Queue: Customized Large-Scale Clock Frequency Scaling.
CGC
Ananta Tiwari, Michael Laurenzano, Joshua Peraza, Laura Carrington, Allan Snavely
2012 — conf
Modeling Power and Energy Usage of HPC Kernels.
IPDPS Workshops
Ananta Tiwari, Michael Laurenzano, Laura Carrington, Allan Snavely
2011 A conf
An idiom-finding tool for increasing productivity of accelerators.
ICS
Laura Carrington, Mustafa M. Tikir, Catherine Olschanowsky, Michael Laurenzano, Joshua Peraza, Allan Snavely, Stephen Poole
2011 — conf
Auto-tuning for Energy Usage in Scientific Applications.
Euro-Par Workshops (2)
Ananta Tiwari, Michael Laurenzano, Laura Carrington, Allan Snavely
2011 — conf
Reducing Energy Usage with Memory and Computation-Aware Dynamic Frequency Scaling.
Euro-Par (1)
Michael Laurenzano, Mitesh R. Meswani, Laura Carrington, Allan Snavely, Mustafa M. Tikir, Stephen Poole
2010 B conf
PEBIL: Efficient static binary instrumentation for Linux.
ISPASS
Michael Laurenzano, Mustafa M. Tikir, Laura Carrington, Allan Snavely
2009 — conf
PSINS: An Open Source Event Tracer and Execution Simulator for MPI Applications.
Euro-Par
Mustafa M. Tikir, Michael Laurenzano, Laura Carrington, Allan Snavely
2008 A conf
High-frequency simulations of global seismic wave propagation using SPECFEM3D_GLOBE on 62K processors.
SC
Laura Carrington, Dimitri Komatitsch, Michael Laurenzano, Mustafa M. Tikir, David Michéa, Nicolas Le Goff, Allan Snavely, Jeroen Tromp
2005 A conf
How Well Can Simple Metrics Represent the Performance of HPC Applications?
SC
Laura Carrington, Michael Laurenzano, Allan Snavely, Roy L. Campbell, Larry P. Davis
2005 J jnl
Low cost trace-driven memory simulation using SimPoint.
SIGARCH Comput. Archit. News
Michael Laurenzano, Beth Simon, Allan Snavely, Meghan Gunn