Michael Hübner

295 papers A* 1A 19B 25C 16Misc 2Journal 59Unranked 158

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	DART: Input-Difficulty-AwaRe Adaptive Threshold for Early-Exit DNNs. CoRR Parth Patne, Mahdi Taheri, Christian Herglotz, Maksim Jenihhin, Milos Krstic, Michael Hübner
2026	J	`jnl`	Integrating an open-source soft-GPU overlay with RISC-V control and high-bandwidth memory. J. Syst. Archit. Hector Gerardo Muñoz Hernandez, Mahdi Taheri, Muhammad Ali, Keyvan Shahin, Alireza Syavashi, Diana Göhringer, Marc Reichenbach, Christian Herglotz, Michael Hübner
2026	J	`jnl`	Mix-and-Match Pruning: Globally Guided Layer-Wise Sparsification of DNNs. CoRR Danial Monachan, Samira Nazari, Mahdi Taheri, Ali Azarpeyvand, Milos Krstic, Michael Hübner, Christian Herglotz
2026	J	`jnl`	RESQ: A Unified Framework for REliability- and Security Enhancement of Quantized Deep Neural Networks. CoRR Ali Soltan Mohammadi, Samira Nazari, Ali Azarpeyvand, Mahdi Taheri, Milos Krstic, Michael Hübner, Christian Herglotz, Tara Ghasempouri
2026	—	`conf`	RESQ: A Unified Framework for ReLiability- and SEcurity Enhancement of Quantized Deep Neural Networks. LATS Ali Soltan Mohammadi, Samira Nazari, Ali Azarpeyvand, Mahdi Taheri, Milos Krstic, Michael Hübner, Christian Herglotz, Tara Ghasempouri
2025	—	`conf`	A Width-Configurable Hardware Approach for Accelerating Fixed-Point Simulation. ISVLSI Keyvan Shahin, Michael Hübner, Christian Herglotz
2025	—	`conf`	AI for Processors, Processors for AI: Going New Ways for Processor Architectures. MIXDES Michael Hübner
2025	—	`conf`	Towards Complete Open-Source Environments: FPGA-Based GPU Overlay Controlled by RISC-V. ARCS Hector Gerardo Muñoz Hernandez, Muhammad Ali, Keyvan Shahin, Alireza Siyavashi, Diana Göhringer, Marc Reichenbach, Christian Herglotz, Michael Hübner
2024	—	`conf`	A Novel System Simulation Framework for HBM2 FPGA Platforms. SAMOS Hector Gerardo Muñoz Hernandez, Veronia Iskandar, Lukas Steiner, Philipp Holzinger, Matthias Jung, Diana Göhringer, Michael Hübner, Norbert Wehn, Marc Reichenbach
2024	—	`conf`	DeepTest: Using Machine Learning for Generating new Testsequences. MECO Jens Bielefeldt, Kai-Uwe Basener, Roman Krajewski, Hans-Werner Wiesbrock, Marc Reichenbach, Michael Hübner
2024	—	`conf`	Embedded Multi-Core Code Generation with Cross-Layer Parallelization. PARMA-DITAM Oliver Oey, Michael Hübner, Timo Stripf, Jürgen Becker
2023	—	`conf`	A Design-Space Exploration Framework for Application-Specific Machine Learning Targeting Reconfigurable Computing. ARC Safdar Mahmood, Michael Hübner, Marc Reichenbach
2023	J	`jnl`	A New Chaos-Based PRNG Hardware Architecture Using the HUB Fixed-Point Format. IEEE Trans. Instrum. Meas. Samuel Souza Da Silva, Matheus B. R. Cardoso, Lucas Giovanni Nardo, Erivelton Geraldo Nepomuceno, Michael Hübner, Janier Arias-Garcia
2022	—	`conf`	A distributed Embedded Systems IoT platform and Associated services Supporting Shopping Cart for Disabled People. SBCCI Konstantinos Antonopoulos, Dimitris Karadimas, Alexandros Spournias, Christos Panagiotou, Ignantios Fwtiou, Ioannis Symeonidis, Christos P. Antonopoulos, Michael Hübner, Nikolaos S. Voros
2022	J	`jnl`	Artificial Intelligence for Mass Spectrometry and Nuclear Magnetic Resonance Spectroscopy Using a Novel Data Augmentation Method. IEEE Trans. Emerg. Top. Comput. Florian Fricke, Marcelo Brandalero, Sascha Liehr, Simon Kern, Klas Meyer, Stefan Kowarik, Robin Hierzegger, Stephan Westerdick, Michael Maiwald, Michael Hübner
2022	—	`conf`	Detecting Improvised Land-mines using Deep Neural Networks on GPR Image Dataset targeting FPGAs. NorCAS Safdar Mahmood, Stefan Scharoba, Jonas Schorlemer, Christian Schulz, Michael Hübner, Marc Reichenbach
2022	—	`conf`	Edge GPU based on an FPGA Overlay Architecture using PYNQ. SBCCI Hector Gerardo Muñoz Hernandez, Florian Fricke, Muhammed Al Kadi, Marc Reichenbach, Michael Hübner
2022	A	`conf`	Health Monitoring of Milling Tools under Distinct Operating Conditions by a Deep Convolutional Neural Network model. DATE Priscile Suawa Fogou, Michael Hübner
2022	J	`jnl`	InjectMeAI - Software Module of an Autonomous Injection Humanoid. Sensors Kwame Owusu Ampadu, Florian Rokohl, Safdar Mahmood, Marc Reichenbach, Michael Hübner
2022	J	`jnl`	Modeling and Fault Detection of Brushless Direct Current Motor by Deep Learning Sensor Data Fusion. Sensors Priscile Suawa, Tenia Meisel, Marcel Jongmanns, Michael Hübner, Marc Reichenbach
2022	J	`jnl`	Reduced Precision DWC: An Efficient Hardening Strategy for Mixed-Precision Architectures. IEEE Trans. Computers Fernando Fernandes dos Santos, Marcelo Brandalero, Michael B. Sullivan, Pedro Martins Basso, Michael Hübner, Luigi Carro, Paolo Rech
2022	J	`jnl`	STAP: An Architecture and Design Tool for Automata Processing on Memristor TCAMs. ACM J. Emerg. Technol. Comput. Syst. João Paulo Cardoso de Lima, Marcelo Brandalero, Michael Hübner, Luigi Carro
2021	J	`jnl`	A Manycore Vision Processor for Real-Time Smart Cameras. Sensors Bruno Almeida da Silva, Arthur Mendes Lima, Janier Arias-Garcia, Michael Hübner, Jones Yudi Mori
2021	B	`conf`	AITIA: Embedded AI Techniques for Industrial Applications. FPL Marcelo Brandalero, Mitko Veleski, Hector Gerardo Muñoz Hernandez, Muhammad Ali, Laurens Le Jeune, Toon Goedemé, Nele Mentens, Jurgen Vandendriessche, Lancelot Lhoest, Bruno da Silva, Abdellah Touhafi, Diana Goehringer, Michael Hübner
2021	—	`conf`	Accelerating Convolutional Neural Networks in FPGA-based SoCs using a Soft-Core GPU. ARC Hector Gerardo Muñoz Hernandez, Mitko Veleski, Marcelo Brandalero, Michael Hübner
2021	B	`conf`	Accelerating Fixed-Point Simulations Using Width Reconfigurable Hardware Architectures. FPL Keyvan Shahin, Michael Hübner
2021	J	`jnl`	Aging-Aware Parallel Execution. IEEE Embed. Syst. Lett. Thiarles S. Medeiros, Gustavo P. Berned, Antoni C. Navarro, Fábio D. Rossi, Marcelo Caggiani Luizelli, Marcelo Brandalero, Michael Hübner, Antonio Carlos Schneider Beck, Arthur Francisco Lorenzon
2021	A	`conf`	Artificial Intelligence for Mass Spectrometry and Nuclear Magnetic Resonance Spectroscopy. DATE Florian Fricke, Safdar Mahmood, Javier Hoffmann, Marcelo Brandalero, Sascha Liehr, Simon Kern, Klas Meyer, Stefan Kowarik, Stephan Westerdick, Michael Maiwald, Michael Hübner
2021	—	`conf`	Deep Learning in Signal Linearization for Harmonic Imaging Application. ISBI Mariam M. Fouad, Georg Schmitz, Michael Hübner, Mohamed A. Abd El Ghany
2021	—	`conf`	DeepTest: How Machine Learning Can Improve the Test of Embedded Systems. MECO Jens Bielefeldt, Kai-Uwe Basener, Siddique Reza Khan, Mozhdeh Massah, Hans-Werner Wiesbrock, Stefan Scharoba, Michael Hübner
2021	C	`conf`	Design and Implementation Strategy of Adaptive Processor-Based Systems for Error Resilient and Power-Efficient Operation. DDECS Mitko Veleski, Michael Hübner, Milos Krstic, Rolf Kraemer
2021	—	`conf`	Einsatz von Deep Learning für den Test Eingebetteter Systeme. GI-Jahrestagung Jens Bielefeldt, Kai-Uwe Basener, Siddique Reza Khan, Mozhdeh Massah, Hans-Werner Wiesbrock, Stefan Scharoba, Michael Hübner
2021	—	`conf`	Performance analysis of application-specific instruction-set routers in networks-on-chip. NoCArc@MICRO Jens Rettkowski, Julian Haase, Sven Primus, Michael Hübner, Diana Göhringer
2021	B	`conf`	The SMART4ALL High Performance Computing Infrastructure: Sharing high-end hardware resources via cloud-based microservices. FPL Angelos S. Voros, Christos Panagiotou, Stavros Zogas, Georgios Keramidas, Christos P. Antonopoulos, Michael Hübner, Nikolaos S. Voros
2021	C	`conf`	Towards Error Resilient and Power-Efficient Adaptive Multiprocessor System using Highly Configurable and Flexible Cross-Layer Framework. IOLTS Mitko Veleski, Michael Hübner, Milos Krstic, Rolf Kraemer
2021	C	`conf`	Towards Machine Learning Support for Embedded System Tests. DSD Stefan Scharoba, Kai-Uwe Basener, Jens Bielefeldt, Hans-Werner Wiesbrock, Michael Hübner
2020	—	`conf`	(Special Topic Submission) Enabling Domain-Specific Architectures with an Open-Source Soft-Core GPGPU. IPDPS Workshops Marcelo Brandalero, Hector Gerardo Muñoz Hernandez, Mitko Veleski, Muhammed Al Kadi, Paolo Rech, Michael Hübner
2020	J	`jnl`	A Machine Learning Methodology for Cache Memory Design Based on Dynamic Instructions. ACM Trans. Embed. Comput. Syst. Osvaldo Navarro, Jones Yudi Mori, Javier Hoffmann, Hector Gerardo Muñoz Hernandez, Michael Hübner
2020	—	`conf`	A Management Technique for Concurrent Access to a Reconfigurable Accelerator. SBCCI Raul Silveira Silva, Guilherme Korol, Michael Guilherme Jordan, Marcelo Brandalero, Michael Hübner, Monica Magalhães Pereira, Mateus Beck Rutzig, Antonio Carlos Schneider Beck
2020	—	`conf`	A Modular Software Library for Effective High Level Synthesis of Convolutional Neural Networks. ARC Hector Gerardo Muñoz Hernandez, Safdar Mahmood, Marcelo Brandalero, Michael Hübner
2020	—	`conf`	A Survey on Machine Learning Approaches to ECG Processing. SPA Javier Hoffmann, Safdar Mahmood, Priscile Suawa Fogou, Nevin George, Solaiman Raha, Sabur Safi, Kurt J. G. Schmailzl, Marcelo Brandalero, Michael Hübner
2020	—	`conf`	AITIA: Embedded AI Techniques for Embedded Industrial Applications. COINS Marcelo Brandalero, Muhammad Ali, Laurens Le Jeune, Hector Gerardo Muñoz Hernandez, Mitko Veleski, Bruno da Silva, Jan Lemeire, Kristof Van Beeck, Abdellah Touhafi, Toon Goedemé, Nele Mentens, Diana Göhringer, Michael Hübner
2020	B	`conf`	Deep Learning Utilization in Beamforming Enhancement for Medical Ultrasound. COMPSAC Mariam M. Fouad, Yousef Metwally, Georg Schmitz, Michael Hübner, Mohamed A. Abd El Ghany
2020	—	`conf`	Flexible hardware architectures for robust Cyberphysical systems. SPA Michael Hübner
2020	J	`jnl`	Guest Editorial Note: Special Issue on Applied Reconfigurable Computing. J. Signal Process. Syst. Georgios Keramidas, Nikolaos S. Voros, Michael Hübner, Diana Goehringer
2020	J	`jnl`	Guest Editors' Introduction: SBCCI 2018. IEEE Des. Test Michael Hübner, José Luís Güntzel
2020	C	`conf`	Highly Configurable Framework for Adaptive Low Power and Error-Resilient System-On-Chip. DSD Mitko Veleski, Michael Hübner, Milos Krstic, Rolf Kraemer
2020	—	`conf`	Investigating Floating-Point Implementations in a Softcore GPU under Radiation-Induced Faults. ICECS Marcio M. Gonçalves, Fabio Benevenuti, Hector Gerardo Muñoz Hernandez, Marcelo Brandalero, Michael Hübner, Fernanda Lima Kastensmidt, José Rodrigo Azambuja
2020	B	`conf`	MCEA: A Resource-Aware Multicore CGRA Architecture for the Edge. FPL Guilherme Korol, Michael Guilherme Jordan, Marcelo Brandalero, Michael Hübner, Mateus Beck Rutzig, Antonio Carlos Schneider Beck
2020	A*	`conf`	Proactive Aging Mitigation in CGRAs through Utilization-Aware Allocation. DAC Marcelo Brandalero, Bernardo Neuhaus Lignati, Antonio Carlos Schneider Beck, Muhammad Shafique, Michael Hübner
2020	J	`jnl`	Proactive Aging Mitigation in CGRAs through Utilization-Aware Allocation. CoRR Marcelo Brandalero, Bernardo Neuhaus Lignati, Antonio Carlos Schneider Beck, Muhammad Shafique, Michael Hübner
2020	A	`conf`	RESCUE: Interdependent Challenges of Reliability, Security and Quality in Nanoelectronic Systems. DATE Maksim Jenihhin, Said Hamdioui, Matteo Sonza Reorda, Milos Krstic, Peter Langendörfer, Christian Sauer, Anton Klotz, Michael Hübner, Jörg Nolte, Heinrich Theodor Vierhaus, Georgios N. Selimis, Dan Alexandrescu, Mottaqiallah Taouil, Geert Jan Schrijen, Jaan Raik, Luca Sterpone, Giovanni Squillero, Zoya Dyka
2020	C	`conf`	Reduced-Precision DWC for Mixed-Precision GPUs. IOLTS Fernando Fernandes dos Santos, Marcelo Brandalero, Pedro Martins Basso, Michael Hübner, Luigi Carro, Paolo Rech
2020	—	`conf`	Run-time Hardware Reconfiguration of Functional Units to Support Mixed-Critical Applications. LATS Raphael Segabinazzi Ferreira, Jörg Nolte, Fabian Vargas, Nevin George, Michael Hübner
2020	J	`jnl`	Soft Error Hardened Asymmetric 10T SRAM Cell for Aerospace Applications. J. Electron. Test. Ambika Prasad Shah, Santosh Kumar Vishvakarma, Michael Hübner
2020	—	`conf`	TIRUB: A Safety and Energy-Aware Scheduling Algorithm. SPA Javier Hoffmann, Marcelo Brandalero, Michael Hübner
2020	J	`jnl`	Toward an ICT-Based Service Oriented Health Care Paradigm. IEEE Consumer Electron. Mag. Christos P. Antonopoulos, Georgios Keramidas, Nikolaos S. Voros, Michael Hübner, Fynn Schwiegelshohn, Diana Goehringer, Maria Dagioglou, Georgios Stavrinos, Stasinos Konstantopoulos, Vangelis Karkaletsis
2020	J	`jnl`	VLSI for Next Generation CE. IEEE Consumer Electron. Mag. Nikolaos S. Voros, Mircea Stan, Michael Hübner, Georgios Keramidas
2019	J	`jnl`	An Integrated on-Silicon Verification Method for FPGA Overlays. J. Electron. Test. Alexandra Kourfali, Florian Fricke, Michael Hübner, Dirk Stroobandt
2019	—	`conf`	Automatic Tool-Flow for Mapping Applications to an Application-Specific CGRA Architecture. IPDPS Workshops Florian Fricke, André Werner, Keyvan Shahin, Florian Werner, Michael Hübner
2019	—	`conf`	Automatic Toolflow for VCGRA Generation to Enable CGRA Evaluation for Arithmetic Algorithms. ARC André Werner, Florian Fricke, Keyvan Shahin, Florian Werner, Michael Hübner
2019	J	`jnl`	Guest Editorial: Special Issue on Reconfigurable Computing and FPGA Technology. J. Parallel Distributed Comput. René Cumplido, Maya B. Gokhale, Claudia Feregrino, Michael Hübner
2019	—	`conf`	IP Core Identification in FPGA Configuration Files using Machine Learning Techniques. ICCE-Berlin Safdar Mahmood, Jens Rettkowski, Arij Shallufa, Michael Hübner, Diana Göhringer
2019	—	`conf`	Inspection of Partial Bitstreams for FPGAs Using Artificial Neural Networks. IPDPS Workshops Jens Rettkowski, Safdar Mahmood, Arij Shallufa, Michael Hübner, Diana Göhringer
2019	J	`jnl`	RESCUE: Interdependent Challenges of Reliability, Security and Quality in Nanoelectronic Systems. CoRR Maksim Jenihhin, Said Hamdioui, Matteo Sonza Reorda, Milos Krstic, Peter Langendörfer, Christian Sauer, Anton Klotz, Michael Hübner, Jörg Nolte, Heinrich Theodor Vierhaus, Georgios N. Selimis, Dan Alexandrescu, Mottaqiallah Taouil, Geert Jan Schrijen, Jaan Raik, Luca Sterpone, Giovanni Squillero, Zoya Dyka
2018	—	`conf`	A Dynamic Partial Reconfigurable Overlay Framework for Python. ARC Benedikt Janßen, Florian Kästner, Tim Wingender, Michael Hübner
2018	—	`conf`	A Parallel-Pipelined OFDM Baseband Modulator with Dynamic Frequency Scaling for 5G Systems. ARC Mário Lopes Ferreira, João Canas Ferreira, Michael Hübner
2018	J	`jnl`	A Scalable Approach for Hardware Semiformal Verification. CoRR Tomás Grimm, Djones Lettnin, Michael Hübner
2018	—	`conf`	ARCHVerifyr: An Embedded Software-Driven Approach for Architecture Verification. ISVLSI Tomás Grimm, Djones Lettnin, Michael Hübner
2018	—	`conf`	An Application Specific Framework for HLS-based FPGA Design of Articulated Robot Inverse Kinematics. ReConFig Safdar Mahmood, Pavel Shydlouski, Michael Hübner
2018	—	`ed.`	Applied Reconfigurable Computing. Architectures, Tools, and Applications - 14th International Symposium, ARC 2018, Santorini, Greece, May 2-4, 2018, Proceedings ARC Nikolaos S. Voros, Michael Hübner, Georgios Keramidas, Diana Goehringer, Christos P. Antonopoulos, Pedro C. Diniz
2018	—	`conf`	CGRA Tool Flow for Fast Run-Time Reconfiguration. ARC Florian Fricke, André Werner, Keyvan Shahin, Michael Hübner
2018	—	`conf`	Design and Open Source Implementation of a Reconfigurable Hardware Model Predicitive Controller Using Online Optimization. DASIP Florian Kästner, Florian Werner, Erman Seydioglu, Michael Hübner
2018	—	`conf`	Design of an efficient Communication Architecture for Cyber-Physical Production Systems. CASE Florian Kästner, Dirk Kuschnerus, Christoph Spiegel, Benedikt Janßen, Michael Hübner
2018	J	`jnl`	General-Purpose Computing with Soft GPUs on FPGAs. ACM Trans. Reconfigurable Technol. Syst. Muhammed Al Kadi, Benedikt Janßen, Jones Yudi Mori, Michael Hübner
2018	J	`jnl`	Guest Editorial Circuit and System Design Automation for Internet of Things. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Saraju P. Mohanty, Michael Hübner, Chun Jason Xue, Xin Li, Hai Li
2018	—	`conf`	Hardware/Software Codesign for Convolutional Neural Networks Exploiting Dynamic Partial Reconfiguration on PYNQ. IPDPS Workshops Florian Kastner, Benedikt Janßen, Frederik Kautz, Michael Hübner, Giulio Corradi
2018	—	`conf`	Robots in Assisted Living Environments as an Unobtrusive, Efficient, Reliable and Modular Solution for Independent Ageing: The RADIO Experience. ARC Christos P. Antonopoulos, Georgios Keramidas, Nikolaos S. Voros, Michael Hübner, Fynn Schwiegelshohn, Diana Goehringer, Maria Dagioglou, Georgios Stavrinos, Stasinos Konstantopoulos, Vangelis Karkaletsis
2018	—	`conf`	Runtime Adaptive Cache for the LEON3 Processor. ARC Osvaldo Navarro, Michael Hübner
2018	J	`jnl`	Special issue: Design and architectures for real-time signal and image processing. J. Real Time Image Process. Michael Hübner
2018	—	`conf`	Towards a Safety and Energy Aware protocol for Wireless Communication. ReCoSoC Javier Hoffmann, Dirk Kuschnerus, Trevor Jones, Michael Hübner
2017	—	`conf`	A CAD Open Platform for High Performance Reconfigurable Systems in the EXTRA Project. ISVLSI Marco Rabozzi, Rolando Brondolin, Giuseppe Natale, Emanuele Del Sozzo, Michael Hübner, Andreas Brokalakis, Catalin Bogdan Ciobanu, Dirk Stroobandt, Marco Domenico Santambrogio
2017	—	`conf`	A Machine Learning Methodology for Cache Recommendation. ARC Osvaldo Navarro, Jones Yudi Mori, Javier Hoffmann, Fabian Stuckmann, Michael Hübner
2017	B	`conf`	A dynamic partial reconfigurable overlay concept for PYNQ. FPL Benedikt Janßen, Pascal Zimprich, Michael Hübner
2017	—	`conf`	A rapid control prototyping platform methodology for decentralized automation. DASIP Florian Kastner, Benedikt Janßen, Sebastian Schwanewilms, Michael Hübner
2017	—	`conf`	Access Network Generation for Efficient Debugging of FPGAs. HEART Habib ul Hasan Khan, Thomas Grimm, Michael Hübner, Diana Göhringer
2017	A	`conf`	An open reconfigurable research platform as stepping stone to exascale high-performance computing. DATE Dirk Stroobandt, Catalin Bogdan Ciobanu, Marco D. Santambrogio, Gabriel Figueiredo, Andreas Brokalakis, Dionisios N. Pnevmatikatos, Michael Hübner, Tobias Becker, Alex J. W. Thom
2017	—	`conf`	Floating-Point Arithmetic Using GPGPU on FPGAs. ISVLSI Muhammed Al Kadi, Benedikt Janßen, Michael Hübner
2017	—	`conf`	Hardware Accelerator Framework Approach for Dynamic Partial Reconfigurable Overlays on Xilinx PYNQ. GI-Jahrestagung Benedikt Janßen, Tim Wingender, Michael Hübner
2017	J	`jnl`	Pixie: A heterogeneous Virtual Coarse-Grained Reconfigurable Array for high performance image processing applications. CoRR Amit Kulkarni, Dirk Stroobandt, André Werner, Florian Fricke, Michael Hübner
2017	—	`ed.`	Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, HEART 2017, Bochum, Germany, June 7-9, 2017 HEART Diana Göhringer, Michael Hübner
2017	—	`conf`	Semiformal Verification of Software-Controlled Connections. ISVLSI Tomás Grimm, Djones Lettnin, Michael Hübner
2017	J	`jnl`	System-level design space identification for Many-Core Vision Processors. Microprocess. Microsystems Jones Yudi Mori, Carlos H. Llanos, Michael Hübner
2017	J	`jnl`	Tackling The New Health-Care Paradigm Through Service Robotics: Unobtrusive, efficient, reliable, and modular solutions for assisted-living environments. IEEE Consumer Electron. Mag. Fynn Schwiegelshohn, Michael Hübner, Philipp Wehner, Diana Göhringer
2017	—	`conf`	Tool flow for automatic generation of architectures and test-cases to enable the evaluation of CGRAs in the context of HPC applications. DASIP Florian Fricke, André Werner, Michael Hübner
2017	—	`conf`	Towards a type 0 hypervisor for dynamic reconfigurable systems. ReConFig Benedikt Janßen, Fatih Korkmaz, Halil Derya, Michael Hübner, Mário Lopes Ferreira, João Canas Ferreira
2017	—	`conf`	Towards adaptive and efficient bottling plants in a cyber physical production system environment. AHS Florian Kastner, Michael Hübner, Jochen Ohrem, Ludwig Cliisserath
2016	—	`conf`	A Design Methodology for the Next Generation Real-Time Vision Processors. ARC Jones Yudi Mori, André Werner, Arij Shallufa, Florian Fricke, Michael Hübner
2016	J	`jnl`	A Dynamically Reconfigurable Multi-ASIP Architecture for Multistandard and Multimode Turbo Decoding. IEEE Trans. Very Large Scale Integr. Syst. Vianney Lapotre, Purushotham Murugappa, Guy Gogniat, Amer Baghdadi, Michael Hübner, Jean-Philippe Diguet
2016	—	`conf`	A Hardware/Software Co-Design Approach for Control Applications with Static Real-Time Reallocation. IPDPS Workshops Benedikt Janßen, Moataz Naserddin, Michael Hübner
2016	—	`conf`	A Rapid Prototyping Method to Reduce the Design Time in Commercial High-Level Synthesis Tools. IPDPS Workshops Jones Yudi Mori, André Werner, Florian Fricke, Michael Hübner
2016	—	`conf`	A dynamic cache reconfiguration platform for soft real-time systems. ICECS Osvaldo Navarro, Tim Leiding, Michael Hübner
2016	J	`jnl`	A resampling method for parallel particle filter architectures. Microprocess. Microsystems Fynn Schwiegelshohn, Eugen Ossovski, Michael Hübner
2016	C	`conf`	AutoReloc: Automated Design Flow for Bitstream Relocation on Xilinx FPGAs. DSD André Lalevee, Pierre-Henri Horrein, Matthieu Arzel, Michael Hübner, Sandrine Vaton
2016	—	`conf`	Automatic generation of RTL connectivity checkers from SystemC TLM and IP-XACT descriptions. NORCAS Tomás Grimm, Djones Lettnin, Michael Hübner
2016	A	`conf`	Computation and communication challenges to deploy robots in assisted living environments. DATE Georgios Keramidas, Christos P. Antonopoulos, Nikolaos S. Voros, Fynn Schwiegelshohn, Philipp Wehner, Jens Rettkowski, Diana Göhringer, Michael Hübner, Stasinos Konstantopoulos, Theodoros Giannakopoulos, Vangelis Karkaletsis, Vaggelis Mariatos
2016	—	`conf`	Development of advanced driver assistance systems using LabVIEW and a car simulator. WESE Benedikt Janßen, Philipp Wehner, Diana Göhringer, Michael Hübner
2016	—	`conf`	EXTRA: Towards the exploitation of eXascale technology for reconfigurable architectures. ReCoSoC Dirk Stroobandt, Ana Lucia Varbanescu, Catalin Bogdan Ciobanu, Muhammed Al Kadi, Andreas Brokalakis, George Charitopoulos, Tim Todman, Xinyu Niu, Dionisios N. Pnevmatikatos, Amit Kulkarni, Elias Vansteenkiste, Wayne Luk, Marco D. Santambrogio, Donatella Sciuto, Michael Hübner, Tobias Becker, Georgi Gaydadjiev, Antonis Nikitakis, Alex J. W. Thom
2016	—	`conf`	Efficient Camera Input System and Memory Partition for a Vision Soft-Processor. ARC Jones Yudi Mori, Frederik Kautz, Michael Hübner
2016	—	`conf`	Enabling Dynamic Reconfiguration of Numerical Methods for the Robotic Motion Control Task. IPDPS Workshops Fynn Schwiegelshohn, Florian Kastner, Michael Hübner
2016	—	`conf`	Enabling indoor object localization through Bluetooth beacons on the RADIO robot platform. SAMOS Fynn Schwiegelshohn, Philipp Wehner, Florian Werner, Diana Göhringer, Michael Hübner
2016	A	`conf`	FGPU: An SIMT-Architecture for FPGAs. FPGA Muhammed Al Kadi, Benedikt Janßen, Michael Hübner
2016	J	`jnl`	Information Fusion of Conflicting Input Data. Sensors Uwe Mönks, Helene Dörksen, Volker Lohweg, Michael Hübner
2016	—	`conf`	Integer computations with soft GPGPU on FPGAs. FPT Muhammed Al Kadi, Michael Hübner
2016	J	`jnl`	Introduction to the special section on FPGAs Technology and Applications. Comput. Electr. Eng. René Cumplido, Michael Hübner, Michael J. Wirthlin
2016	—	`conf`	Multi-level parallelism analysis and system-level simulation for many-core Vision processor design. MECO Jones Yudi Mori, Michael Hübner
2016	—	`book`	Near Threshold Computing, Technology, Methods and Applications. Michael Hübner, Cristina Silvano
2016	—	`ed.`	Proceedings of the 1st International Workshop on RESource Awareness and Application Auto-tuning in Adaptive and heterogeNeous compuTing co-located with 19th International Conference on Design, Automation And Test In Europe (DATE 2016), Dresden, Germany, March 18th, 2016. RES4ANT@DATE Cristina Silvano, Walter Stechele, Stephan Wong, Jerónimo Castrillón, Michael Hübner, Amir Hossein Ashouri
2016	—	`ed.`	Proceedings of the 7th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and the 5th Workshop on Design Tools and Architectures For Multicore Embedded Computing Platforms, PARMA-DITAM 2016, Prague, Czech Republic, January 18, 2016 PARMA-DITAM@HiPEAC Cristina Silvano, João M. P. Cardoso, Giovanni Agosta, Michael Hübner
2016	—	`conf`	Redesign of an educational robot platform using web-based programming. WESE Florian Fricke, André Werner, Benedikt Janßen, Michael Hübner, Clemens Ribbe, Cengizhan Inac
2015	C	`conf`	A Framework to the Design and Programming of Many-Core Focal-Plane Vision Processors. EUC Jones Yudi Mori, Carlos H. Llanos, Michael Hübner
2015	—	`conf`	A Fully Parallel Particle Filter Architecture for FPGAs. ARC Fynn Schwiegelshohn, Eugen Ossovski, Michael Hübner
2015	C	`conf`	A Holistic Approach for Advancing Robots in Ambient Assisted Living Environments. EUC Fynn Schwiegelshohn, Philipp Wehner, Jens Rettkowski, Diana Göhringer, Michael Hübner, Georgios Keramidas, Christos P. Antonopoulos, Nikolaos S. Voros
2015	—	`conf`	Adaptive computing in real-time applications. NEWCAS Benedikt Janßen, Fynn Schwiegelshohn, Michael Hübner
2015	—	`ed.`	Applied Reconfigurable Computing - 11th International Symposium, ARC 2015, Bochum, Germany, April 13-17, 2015, Proceedings ARC Kentaro Sano, Dimitrios Soudris, Michael Hübner, Pedro C. Diniz
2015	—	`conf`	Configurable cache tuning with a victim cache. ReCoSoC Osvaldo Navarro, Tim Leiding, Michael Hübner
2015	—	`conf`	Designing applications for heterogeneous many-core architectures with the FlexTiles Platform. SAMOS Benedikt Janßen, Fynn Schwiegelshohn, Martijn Koedam, François Duhem, Leonard Masing, Stephan Werner, Christophe Huriaux, Antoine Courtay, Emilie Wheatley, Kees Goossens, Fabrice Lemonnier, Philippe Millet, Jürgen Becker, Olivier Sentieys, Michael Hübner
2015	—	`conf`	DynamIA: Dynamic Hardware Reconfiguration in Industrial Applications. ARC Nele Mentens, Jochen Vandorpe, Jo Vliegen, An Braeken, Bruno da Silva, Abdellah Touhafi, Alois Kern, Stephan Knappmann, Jens Rettkowski, Muhammed Al Kadi, Diana Göhringer, Michael Hübner
2015	—	`conf`	EXTRA: Towards an Efficient Open Platform for Reconfigurable High Performance Computing. CSE Catalin Bogdan Ciobanu, Ana Lucia Varbanescu, Dionisios N. Pnevmatikatos, George Charitopoulos, Xinyu Niu, Wayne Luk, Marco D. Santambrogio, Donatella Sciuto, Muhammed Al Kadi, Michael Hübner, Tobias Becker, Georgi Gaydadjiev, Andreas Brokalakis, Antonis Nikitakis, Alex J. W. Thom, Elias Vansteenkiste, Dirk Stroobandt
2015	—	`conf`	FPGA based traffic sign detection for automotive camera systems. ReCoSoC Fynn Schwiegelshohn, Lars Gierke, Michael Hübner
2015	—	`ed.`	International Conference on ReConFigurable Computing and FPGAs, ReConFig 2015, Riviera Maya, Mexico, December 7-9, 2015 ReConFig Michael Hübner, Maya B. Gokhale, René Cumplido
2015	—	`conf`	Message from chairs. ReConFig Maya B. Gokhale, Michael Hübner, René Cumplido
2015	J	`jnl`	Precise Navigation of Small Agricultural Robots in Sensitive Areas with a Smart Plant Camera. J. Imaging Volker Dworak, Michael Hübner, Jörn Selbeck
2015	—	`ed.`	Proceedings of the 6th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and the 4th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, PARMA-DITAM 2015, Amsterdam, Netherlands, January 21, 2015 PARMA-DITAM@HiPEAC Giovanni Agosta, Cristina Silvano, João M. P. Cardoso, Michael Hübner
2015	—	`conf`	Robots in Assisted Living Environments as an Unobtrusive, Efficient, Reliable and Modular Solution for Independent Ageing: The RADIO Perspective. ARC Christos P. Antonopoulos, Georgios Keramidas, Nikolaos S. Voros, Michael Hübner, Diana Göhringer, Maria Dagioglou, Theodoros Giannakopoulos, Stasinos Konstantopoulos, Vangelis Karkaletsis
2015	—	`conf`	Scalable modular hardware platform for FPGA based industrial radar flowmeters. ReConFig Timo Jaeschke, Patrick Imberg, Michael Zapke, Michael Hübner, Nils Pohl
2015	C	`conf`	The value of FPGAs as reconfigurable hardware enabling Cyber-Physical Systems. ETFA Tomás Grimm, Benedikt Janßen, Osvaldo Navarro, Michael Hübner
2015	—	`conf`	ViPES 2015 - Preface. SAMOS Diana Göhringer, Michael Hübner, Jerónimo Castrillón, Cristina Silvano
2014	—	`conf`	A Framework for Customizing Virtual 3-D Reconfigurable Platforms at Run-Time. IPDPS Workshops Kostas Siozios, Dimitrios Soudris, Michael Hübner
2014	J	`jnl`	A Framework for Supporting Adaptive Fault-Tolerant Solutions. ACM Trans. Embed. Comput. Syst. Kostas Siozios, Dimitrios Soudris, Michael Hübner
2014	—	`conf`	A high-level analysis of a multi-core vision processor using SystemC and TLM2.0. ReConFig Jones Yudi Mori, Michael Hübner
2014	—	`conf`	An AXI compatible cypress EZ-USB FX3 interface for USB-3.0 SuperSpeed. ReConFig Benedikt Janßen, Michael Hübner, Timo Jaeschke
2014	—	`conf`	An adaptive victim cache scheme. ReConFig Osvaldo Navarro, Michael Hübner
2014	—	`conf`	An application scenario for dynamically reconfigurable FPGAs. ReCoSoC Fynn Schwiegelshohn, Michael Hübner
2014	—	`conf`	Considering reconfiguration overhead in scheduling of dependent tasks on 2D reconfigurable FPGA. AHS Quang-Hai Khuat, Daniel Chillet, Michael Hübner
2014	—	`conf`	Design of an attention detection system on the Zynq-7000 SoC. ReConFig Fynn Schwiegelshohn, Michael Hübner
2014	—	`conf`	Development of driver assistance systems using virtual hardware-in-the-loop. ISIC Philipp Wehner, Fynn Schwiegelshohn, Diana Göhringer, Michael Hübner
2014	—	`conf`	Dynamic run-time hardware/software scheduling for 3D reconfigurable SoC. ReConFig Quang-Hai Khuat, Daniel Chillet, Michael Hübner
2014	C	`conf`	Future Trends on Adaptive Processing Systems. ISPA Benedikt Janßen, Jones Yudi Mori, Osvaldo Navarro, Diana Göhringer, Michael Hübner
2014	—	`conf`	Instruction Set Optimization for Application Specific Processors. ARC Max Ferger, Michael Hübner
2014	B	`conf`	Multi-FPGA reconfigurable system for accelerating MATLAB simulations. FPL Muhammed Al Kadi, Max Ferger, Volker Stegemann, Michael Hübner
2014	J	`jnl`	OFDM/WDM PON With Laserless, Colorless 1 Gb/s ONUs Based on Si-PIC and Slow IC. JOCN Amos Agmon, Moshe Nazarathy, Dan M. Marom, Shalva Ben-Ezra, Alex Tolmachev, Robert I. Killey, Polina Bayvel, Lukas Meder, Michael Hübner, W. Meredith, G. Vickers, Philipp C. Schindler, René Schmogrow, David Hillerkuss, Wolfgang Freude, Christian Koos, Juerg Leuthold
2014	—	`ed.`	Proceedings of the 5th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and the 3rd Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, PARMA-DITAM 2014, Vienna, Austria, January 20, 2014 PARMA-DITAM@HiPEAC Cristina Silvano, João M. P. Cardoso, Michael Hübner
2014	J	`jnl`	Special issue on design and architectures of real-time image processing in embedded systems. J. Real Time Image Process. Daniel Chillet, Michael Hübner
2013	—	`conf`	A reconfigurable multi-standard ASIP-based turbo decoder for an efficient dynamic reconfiguration in a multi-ASIP context. ISVLSI Vianney Lapotre, Purushotham Murugappa, Guy Gogniat, Amer Baghdadi, Jean-Philippe Diguet, Jean-Noel Bazin, Michael Hübner
2013	—	`conf`	An efficient on-chip configuration infrastructure for a flexible multi-ASIP turbo decoder architecture. ReCoSoC Vianney Lapotre, Michael Hübner, Guy Gogniat, Purushotham Murugappa, Amer Baghdadi, Jean-Philippe Diguet
2013	—	`conf`	Bi-directional ultra-dense polarization-diverse OFDM/WDM PON with laserless colorless 1Gb/s ONUs based on Si PICs and <417 MHz mixed-signal ICs. OFC/NFOEC Amos Agmon, Moshe Nazarathy, Dan M. Marom, Shalva Ben-Ezra, Alex Tolmachev, Robert I. Killey, Polina Bayvel, Lukas Meder, Michael Hübner, W. Meredith, G. Vickers, Philipp C. Schindler, René Schmogrow, David Hillerkuss, Wolfgang Freude, Juerg Leuthold
2013	—	`conf`	Dynamic and partial reconfiguration of Zynq 7000 under Linux. ReConFig Muhammed Al Kadi, Patrick Rudolph, Diana Göhringer, Michael Hübner
2013	J	`jnl`	Introduction to the special section on multiprocessor system-on-chip for cyber-physical systems. ACM Trans. Embed. Comput. Syst. Michael Hübner, Andreas Herkersdorf
2013	J	`jnl`	JITPR: A framework for supporting fast application's implementation onto FPGAs. ACM Trans. Reconfigurable Technol. Syst. Harry Sidiropoulos, Kostas Siozios, Peter Figuli, Dimitrios Soudris, Michael Hübner, Jürgen Becker
2013	J	`jnl`	MORPHEUS: A heterogeneous dynamically reconfigurable platform for designing highly complex embedded systems. ACM Trans. Embed. Comput. Syst. Nikolaos S. Voros, Michael Hübner, Jürgen Becker, Matthias Kühnle, Florian Thoma, Arnaud Grasset, Paul Brelet, Philippe Bonnot, Fabio Campi, Eberhard Schüler, Henning Sahlbach, Sean Whitty, Rolf Ernst, Enrico Billich, Claudia Tischendorf, Ulrich Heinkel, Frank Ieromnimon, Dimitrios Kritharidis, Axel Schneider, Joachim Knäblein, Wolfram Putzke-Röming
2013	—	`conf`	On Supporting Adaptive Fault Tolerant at Run-Time with Virtual FPGAs. IPDPS Workshops Kostas Siozios, Dimitrios Soudris, Michael Hübner
2013	C	`conf`	Optimizations for an efficient reconfiguration of an ASIP-based turbo decoder. ISCAS Vianney Lapotre, Purushotham Murugappa, Guy Gogniat, Amer Baghdadi, Jean-Philippe Diguet, Jean-Noel Bazin, Michael Hübner
2013	—	`conf`	Rapid prototyping of a portable HW/SW co-design on the virtual zynq platform using SystemC. SoCC Philipp Wehner, Max Ferger, Diana Göhringer, Michael Hübner
2013	—	`conf`	Simplify: A Framework for Enabling Fast Functional/Behavioral Validation of Multiprocessor Architectures in the Cloud. IPDPS Workshops Gabriel Marchesan Almeida, Oliver Bellaver Longhi, Thomas Bruckschlögl, Michael Hübner, Fabiano Hessel, Jürgen Becker
2013	C	`conf`	Stopping-Free Dynamic Configuration of a Multi-ASIP Turbo Decoder. DSD Vianney Lapotre, Purushotham Murugappa, Guy Gogniat, Amer Baghdadi, Michael Hübner, Jean-Philippe Diguet
2013	—	`conf`	ViPES Introduction. IPDPS Workshops Michael Hübner
2012	—	`conf`	A Framework for exploration of parallel SystemC simulation on the single-chip cloud computer. SimuTools Christoph Roth, Simon Reder, Oliver Sander, Michael Hübner, Jürgen Becker
2012	—	`conf`	A flexible approach for compiling scilab to reconfigurable multi-core embedded systems. ReCoSoC Timo Stripf, Oliver Oey, Thomas Bruckschlögl, Ralf König, Michael Hübner, Jürgen Becker, Gerard K. Rauwerda, Kim Sunesen, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Dimitrios Kritharidis, Nikolaos Mitas, George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Steven Derrien, Daniel Ménard, Olivier Sentieys, Diana Göhringer, Thomas Perschke
2012	J	`jnl`	Adaptive Multiclient Network-on-Chip Memory Core: Hardware Architecture, Software Abstraction Layer, and Application Exploration. Int. J. Reconfigurable Comput. Diana Göhringer, Lukas Meder, Stephan Werner, Oliver Oey, Jürgen Becker, Michael Hübner
2012	—	`conf`	Adaptive processor architecture - invited paper. ICSAMOS Michael Hübner, Diana Göhringer, Carsten Tradowsky, Jörg Henkel, Jürgen Becker
2012	—	`conf`	Analysis of error detection schemes: Toolchain support and hardware/software implications. AHS Ali Azarian, João Canas Ferreira, Stephan Werner, Zlatko Petrov, João M. P. Cardoso, Michael Hübner
2012	—	`conf`	Determination of on-chip temperature gradients on reconfigurable hardware. ReConFig Carsten Tradowsky, Enrique Cordero, Thorsten Deuser, Michael Hübner, Jürgen Becker
2012	—	`conf`	FPGA system-on-chip solution for a field oriented hybrid stepper motor control. SSD Nadine Dahm, Michael Hübner, Jürgen Becker
2012	C	`conf`	From Scilab to High Performance Embedded Multicore Systems: The ALMA Approach. DSD Jürgen Becker, Timo Stripf, Oliver Oey, Michael Hübner, Steven Derrien, Daniel Ménard, Olivier Sentieys, Gerard K. Rauwerda, Kim Sunesen, Nikolaos Kavvadias, Kostas Masselos, George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Dimitrios Kritharidis, Nikolaos Mitas, Diana Göhringer
2012	—	`conf`	From Scilab to multicore embedded systems: Algorithms and methodologies. ICSAMOS George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Christos Valouxis, Christos Gogos, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Diana Göhringer, Steven Derrien, Daniel Ménard, Olivier Sentieys, Michael Hübner, Timo Stripf, Oliver Oey, Jürgen Becker, Gerard K. Rauwerda, Kim Sunesen, Dimitrios Kritharidis, Nikolaos Mitas
2012	—	`conf`	Hardware / Software Virtualization for the Reconfigurable Multicore Platform. CSE Max Ferger, Muhammed Al Kadi, Michael Hübner, Martijn Koedam, Shubhendu Sinha, Kees Goossens, Gabriel Marchesan Almeida, José Rodrigo Azambuja, Jürgen Becker
2012	J	`jnl`	Introduction to the Special Issue on ReCoSoC 2011. ACM Trans. Reconfigurable Technol. Syst. Michael Hübner
2012	—	`conf`	Invasive manycore architectures. ASP-DAC Jörg Henkel, Andreas Herkersdorf, Lars Bauer, Thomas Wild, Michael Hübner, Ravi Kumar Pujari, Artjom Grudnitsky, Jan Heisswolf, Aurang Zaib, Benjamin Vogel, Vahid Lari, Sebastian Kobbe
2012	—	`conf`	Invited paper: On-chip monitoring for adaptive heterogeneous multicore systems. ReCoSoC Diana Göhringer, Mounir Chemaou, Michael Hübner
2012	—	`conf`	LISPARC: Using an architecture description language approach for modelling an adaptive processor microarchitecture. SIES Carsten Tradowsky, Florian Thoma, Michael Hübner, Jürgen Becker
2012	—	`conf`	On Dynamic Run-time Processor Pipeline Reconfiguration. IPDPS Workshops Carsten Tradowsky, Florian Thoma, Michael Hübner, Jürgen Becker
2012	—	`conf`	On Supporting Efficient Partial Reconfiguration with Just-In-Time Compilation. IPDPS Workshops Harry Sidiropoulos, Kostas Siozios, Peter Figuli, Dimitrios Soudris, Michael Hübner
2012	—	`conf`	RAW Introduction. IPDPS Workshops Jürgen Becker, Jinian Bian, Christophe Bobda, René Cumplido, Michael Hübner
2012	—	`conf`	Realtime PCI Express monitoring for self adaptive reconfigurable systems. SSD Michael Rückauer, Joachim Meyer, Thorsten Schubert, Michael Hübner, Dieter Scheurer, Jürgen Becker
2012	J	`jnl`	Single-Laser 325 Tbit/s Nyquist WDM Transmission. JOCN David Hillerkuss, René Schmogrow, Matthias Meyer, Stefan Wolf, Meinert Jordan, Philipp Kleinow, Nicole Lindenmann, Philipp C. Schindler, Argishti Melikyan, Xin Yang, Shalva Ben-Ezra, Bernd Nebendahl, Michael Dreschmann, Joachim Meyer, Francesca Parmigiani, Periklis Petropoulos, Bojan Resan, Andreas Oehler, Kurt Weingarten, Lars Altenhain, Tobias Ellermeyer, Michael Möller, Michael Hübner, Jürgen Becker, Christian Koos, Wolfgang Freude, Juerg Leuthold
2012	J	`jnl`	Single-laser 32.5 Tbit/s Nyquist WDM transmission CoRR David Hillerkuss, René Schmogrow, Matthias Meyer, Stefan Wolf, Meinert Jordan, Philipp Kleinow, Nicole Lindenmann, Philipp C. Schindler, Argishti Melikyan, Xin Yang, Shalva Ben-Ezra, Bernd Nebendahl, Michael Dreschmann, Joachim Meyer, Francesca Parmigiani, Periklis Petropoulos, Bojan Resan, Andreas Oehler, Kurt Weingarten, Lars Altenhain, Tobias Ellermeyer, Matthias Moeller, Michael Hübner, Jürgen Becker, Christian Koos, Wolfgang Freude, Juerg Leuthold
2012	Misc	`conf`	Time and frequency synchronization for ultra-high speed OFDM systems. ICNC Michael Dreschmann, Joachim Meyer, Michael Hübner, René Schmogrow, David Hillerkuss, Jürgen Becker, Juerg Leuthold, Wolfgang Freude
2012	—	`conf`	Towards future adaptive multiprocessor systems-on-chip: An innovative approach for flexible architectures. ICSAMOS Fabrice Lemonnier, Philippe Millet, Gabriel Marchesan Almeida, Michael Hübner, Jürgen Becker, Sébastien Pillement, Olivier Sentieys, Martijn Koedam, Shubhendu Sinha, Kees Goossens, Christian Piguet, Marc-Nicolas Morgan, Romain Lemaire
2012	—	`conf`	Virtualization of heterogeneous and adaptive multi-core/multi-board systems. DASIP Oliver Oey, Stephan Werner, Diana Göhringer, Andreas Stuckert, Jürgen Becker, Michael Hübner
2012	A	`conf`	Virtualized on-chip distributed computing for heterogeneous reconfigurable multi-core systems. DATE Stephan Werner, Oliver Oey, Diana Göhringer, Michael Hübner, Jürgen Becker
2011	—	`ed.`	3rd Many-core Applications Research Community (MARC) Symposium. Proceedings of the 3rd MARC Symposium, Ettlingen, Germany, July 5-6, 2011 MARC Symposium Diana Göhringer, Michael Hübner, Jürgen Becker
2011	C	`conf`	A FPGA based fast runtime reconfigurable real-time Multi-Object-Tracker. ISCAS Matthias Rümmele-Werner, Thomas Perschke, Lars Braun, Michael Hübner, Jürgen Becker
2011	—	`conf`	A Heterogeneous Multicore System on Chip with Run-Time Reconfigurable Virtual FPGA Architecture. IPDPS Workshops Michael Hübner, Peter Figuli, Romuald Girardey, Dimitrios Soudris, Kostas Siozios, Jürgen Becker
2011	—	`conf`	A heterogeneous SoC architecture with embedded virtual FPGA cores and runtime Core Fusion. AHS Peter Figuli, Michael Hübner, Romuald Girardey, Falco Bapp, Thomas Bruckschlögl, Florian Thoma, Jörg Henkel, Jürgen Becker
2011	—	`conf`	Acceleration of image reconstruction in 3D ultrasound computer tomography: An evaluation of CPU, GPU and FPGA computing. DASIP Matthias Birk, Alexander Guth, Michael Zapf, Matthias Norbert Balzer, Nicole V. Ruiter, Michael Hübner, Jürgen Becker
2011	—	`conf`	Adaptive Multi-client Network-on-Chip Memory. ReConFig Diana Göhringer, Lukas Meder, Michael Hübner, Jürgen Becker
2011	—	`ch.`	Adaptive Multiprocessor System-on-Chip Architecture: New Degrees of Freedom in System Design and Runtime Support. Multiprocessor System-on-Chip Diana Göhringer, Michael Hübner, Jürgen Becker
2011	—	`conf`	Approach of an FPGA based adaptive stepper motor control system. ReCoSoC Nadine Dahm, Michael Hübner, Jürgen Becker
2011	—	`conf`	Development of a method for image-based motion estimation of a VTOL-MAV on FPGA. DASIP Natalie Frietsch, I. Pashkovskiy, Gert F. Trommer, Lars Braun, Matthias Birk, Michael Hübner, Jürgen Becker
2011	—	`conf`	Dynamic Processor Reconfiguration. ReConFig Michael Hübner, Carsten Tradowsky, Diana Göhringer, Lars Braun, Florian Thoma, Jörg Henkel, Jürgen Becker
2011	B	`conf`	Embedded Systems Start-Up under Timing Constraints on Modern FPGAs. FPL Joachim Meyer, Juanjo Noguera, Michael Hübner, Rodney Stewart, Jürgen Becker
2011	J	`jnl`	Evaluation of the Reconfiguration of the Data Acquisition System for 3D USCT. Int. J. Reconfigurable Comput. Matthias Birk, Clemens Hagner, Matthias Norbert Balzer, Nicole V. Ruiter, Michael Hübner, Jürgen Becker
2011	J	`jnl`	Exploration of the Power-Performance Tradeoff through Parameterization of FPGA-Based Multiprocessor Systems. Int. J. Reconfigurable Comput. Diana Göhringer, Jonathan Obie, André L. S. Braga, Michael Hübner, Carlos H. Llanos, Jürgen Becker
2011	A	`conf`	Fast Start-up for Spartan-6 FPGAs using Dynamic Partial Reconfiguration. DATE Joachim Meyer, Juanjo Noguera, Michael Hübner, Lars Braun, Oliver Sander, R. M. Gil, Rodney Stewart, Jürgen Becker
2011	—	`conf`	Heterogeneous and runtime parameterizable Star-Wheels Network-on-Chip. ICSAMOS Diana Göhringer, Oliver Oey, Michael Hübner, Jürgen Becker
2011	—	`book`	Multiprocessor System-on-Chip - Hardware Design and Tool Integration. Multiprocessor System-on-Chip Michael Hübner, Jürgen Becker
2011	—	`conf`	Online Routing of FPGA Clock Networks for Module Relocation in Partial Reconfigurable Multi Clock Designs. IPDPS Workshops Christian Schuck, Bastian Haetzer, Michael Hübner, Jürgen Becker
2011	J	`jnl`	Operating System for Runtime Reconfigurable Multiprocessor Systems. Int. J. Reconfigurable Comput. Diana Göhringer, Michael Hübner, Etienne Nguepi Zeutebouo, Jürgen Becker
2011	—	`conf`	Power and performance optimization through MPI supported dynamic voltage and frequency scaling. MARC Symposium Florian Thoma, Michael Hübner, Diana Göhringer, Hasan Ümitcan Yilmaz, Jürgen Becker
2011	B	`conf`	RAMPSoCVM: Runtime Support and Hardware Virtualization for a Runtime Adaptive MPSoC. FPL Diana Göhringer, Stephan Werner, Michael Hübner, Jürgen Becker
2011	—	`conf`	Run-time resource instantiation for fault tolerance in FPGAs. AHS Monica Magalhães Pereira, Lars Braun, Michael Hübner, Jürgen Becker, Luigi Carro
2011	J	`jnl`	Selected Papers from the International Workshop on Reconfigurable Communication-Centric Systems on Chips (ReCoSoC' 2010). Int. J. Reconfigurable Comput. Michael Hübner, Jürgen Becker, Loïc Lagadec, Gilles Sassatelli
2011	J	`jnl`	The MORPHEUS Heterogeneous Dynamically Reconfigurable Platform. Int. J. Parallel Program. Arnaud Grasset, Philippe Millet, Philippe Bonnot, Sami Yehia, Wolfram Putzke-Röming, Fabio Campi, Alberto Rosti, Michael Hübner, Nikolaos S. Voros, Davide Rossi, Henning Sahlbach, Rolf Ernst
2011	—	`conf`	Using dynamic partial reconfiguration to detect sees in microprocessors through non-intrusive hybrid technique. SBCCI José Rodrigo Azambuja, Samuel Pagliarini, Maurício Altieri, Fernanda Lima Kastensmidt, Michael Hübner, Jürgen Becker
2011	—	`ed.`	VLSI 2010 Annual Symposium - Selected papers ISVLSI (Selected papers) Nikolaos S. Voros, Amar Mukherjee, Nicolas Sklavos, Konstantinos Masselos, Michael Hübner
2010	Misc	`conf`	A Design Methodology for Application Partitioning and Architecture Development of Reconfigurable Multiprocessor Systems-on-Chip. FCCM Diana Göhringer, Michael Hübner, Michael Benz, Jürgen Becker
2010	A	`conf`	A semi-automatic toolchain for reconfigurable multiprocessor systems-on-chip: architecture development and application partitioning (abstract only). FPGA Diana Göhringer, Michael Hübner, Michael Benz, Jürgen Becker
2010	—	`ch.`	Adaptive Runtime System with Intelligent Allocation of Dynamically Reconfigurable Function Model and Optimized Interface Topologies. Dynamically Reconfigurable Systems Lars Braun, Tobias Schwalb, Philipp Graf, Michael Hübner, Michael Ullmann, Klaus D. Müller-Glaser, Jürgen Becker
2010	—	`conf`	CAP-OS: Operating system for runtime scheduling, task mapping and resource management on reconfigurable multiprocessor architectures. IPDPS Workshops Diana Göhringer, Michael Hübner, Etienne Nguepi Zeutebouo, Jürgen Becker
2010	J	`jnl`	Design Assurance Strategy and Toolset for Partially Reconfigurable FPGA Systems. ACM Trans. Reconfigurable Technol. Syst. Krzysztof Kepa, Fearghal Morgan, Krzysztof Kosciuszkiewicz, Lars Braun, Michael Hübner, Jürgen Becker
2010	—	`conf`	FPGA Startup Through Sequential Partial and Dynamic Reconfiguration. ISVLSI (Selected papers) Joachim Meyer, Michael Hübner, Lars Braun, Oliver Sander, Juanjo Noguera, Rodney Stewart, Jürgen Becker
2010	—	`conf`	Fast Sequential FPGA Startup Based on Partial and Dynamic Reconfiguration. ISVLSI Michael Hübner, Joachim Meyer, Oliver Sander, Lars Braun, Jürgen Becker, Juanjo Noguera, Rodney Stewart
2010	—	`conf`	Fast dynamic and partial reconfiguration data path with low hardware overhead on Xilinx FPGAs. IPDPS Workshops Michael Hübner, Diana Göhringer, Juanjo Noguera, Jürgen Becker
2010	—	`conf`	First Evaluation of FPGA Reconfiguration for 3D Ultrasound Computer Tomography. ReCoSoC Matthias Birk, Clemens Hagner, Matthias Norbert Balzer, Nicole V. Ruiter, Michael Hübner, Jürgen Becker
2010	—	`conf`	High Performance Architectures and Compilers. Euro-Par (1) Pedro C. Diniz, Marco Danelutto, Denis Barthou, Marc Gonzales, Michael Hübner
2010	—	`conf`	Impact of Task Distribution, Processor Configurations and Dynamic Clock Frequency Scaling on the Power Consumption of FPGA-based Multiprocessors. ReCoSoC Diana Goehringer, Jonathan Obie, Michael Hübner, Jürgen Becker
2010	—	`conf`	Message Passing Interface support for the runtime adaptive multi-processor system-on-chip RAMPSoC. ICSAMOS Diana Göhringer, Michael Hübner, Laure Hugot-Derville, Jürgen Becker
2010	—	`conf`	Mixed-Signal Diverse Redundant System for Safety Critical Applications in FPGA. ISVLSI Romuald Girardey, Michael Hübner, Jürgen Becker
2010	B	`conf`	Network Bandwidth Optimization of Ethernet-Based Streaming Applications in Automotive Embedded Systems. ICCCN Andreas Kern, Christoph Schmutzler, Thilo Streichert, Michael Hübner, Jürgen Teich
2010	—	`conf`	Performance, accuracy, power consumption and resource utilization analysis for hardware / software realized Artificial Neural Networks. BIC-TA André L. S. Braga, Carlos H. Llanos, Diana Göhringer, Jonathan Obie, Jürgen Becker, Michael Hübner
2010	—	`ed.`	Proceedings of the 5th International Workshop on Reconfigurable Communication-centric Systems on Chip, ReCoSoC 2010, Karlsruhe, Germany, May 17-19, 2010 ReCoSoC Michael Hübner, Loïc Lagadec, Oliver Sander, Jürgen Becker
2010	B	`conf`	Reconfigurable Hardware for Power-over-Fiber Applications. FPL Michael Dreschmann, Michael Hübner, Moritz Röger, Oliver Sander, Christos Klamouris, Jürgen Becker, Wolfgang Freude, Juerg Leuthold
2010	—	`conf`	Reliability Analysis and Improvement in Nano Scale Design. ISVLSI Mahtab Niknahad, Michael Hübner, Jürgen Becker
2010	—	`conf`	Safety Aware Place and Route for On-Chip Redundancy in Safety Critical Applications. ISVLSI Romuald Girardey, Michael Hübner, Jürgen Becker
2009	J	`jnl`	A Taxonomy of Reconfigurable Single-/Multiprocessor Systems-on-Chip. Int. J. Reconfigurable Comput. Diana Göhringer, Thomas Perschke, Michael Hübner, Jürgen Becker
2009	—	`conf`	A multi-core signal processor for heterogeneous reconfigurable computing. SoC Davide Rossi, Fabio Campi, Antonio Deledda, Claudio Mucci, Stefano Pucillo, Sean Whitty, Rolf Ernst, Stéphane Chevobbe, Stéphane Guyetant, Matthias Kühnle, Michael Hübner, Jürgen Becker, Wolfram Putzke-Röming
2009	J	`jnl`	Adaptive real-time image processing exploiting two dimensional reconfigurable architecture. J. Real Time Image Process. Lars Braun, Diana Göhringer, Thomas Perschke, Volker Schatz, Michael Hübner, Jürgen Becker
2009	—	`conf`	BRICK: a multi-context expression grained reconfigurable architecture. SBCCI Juan Fernando Eusse Giraldo, Michael Hübner, Ricardo Pezzuol Jacobi
2009	J	`jnl`	Dynamic power optimization by exploiting self-reconfiguration in Xilinx Spartan 3-based systems. Microprocess. Microsystems Katarina Paulsson, Michael Hübner, Jürgen Becker
2009	B	`conf`	Dynamic reconfigurable mixed-signal architecture for safety critical applications. FPL Romuald Girardey, Michael Hübner, Jürgen Becker
2009	—	`conf`	FPGA Analysis Tool: High-Level Flows for Low-Level Design Analysis in Reconfigurable Computing. ARC Krzysztof Kepa, Fearghal Morgan, Krzysztof Kosciuszkiewicz, Lars Braun, Michael Hübner, Jürgen Becker
2009	—	`conf`	Method for improving performance in online routing of reconfigurable nano architectures. SoCC Mahtab Niknahad, Michael Hübner, Jürgen Becker
2009	—	`conf`	RTL-to-layout implementation of an embedded coarse grained architecture for dynamically reconfigurable computing in systems-on-chip. SoC Fabio Campi, Ralf König, Michael Dreschmann, M. Neukirchner, Damien Picard, M. Jüttner, Eberhard Schüler, Antonio Deledda, Davide Rossi, Alberto Pasini, Michael Hübner, Jürgen Becker, Roberto Guerrieri
2009	J	`jnl`	Selected Papers from ReCoSoC 2008. Int. J. Reconfigurable Comput. Michael Hübner, Juan Manuel Moreno, Gilles Sassatelli, Peter Zipf
2009	B	`conf`	Star-Wheels Network-on-Chip featuring a self-adaptive mixed topology and a synergy of a circuit - and a packet-switching communication protocol. FPL Diana Göhringer, Bin Liu, Michael Hübner, Jürgen Becker
2008	A	`conf`	A framework for dynamic 2D placement on FPGAs. IPDPS Christian Schuck, Matthias Kühnle, Michael Hübner, Jürgen Becker
2008	B	`conf`	A multi-platform controller allowing for maximum Dynamic Partial Reconfiguration throughput. FPL Christopher Claus, Bin Zhang, Walter Stechele, Lars Braun, Michael Hübner, Jürgen Becker
2008	J	`jnl`	An Interconnect Strategy for a Heterogeneous, Reconfigurable SoC. IEEE Des. Test Comput. Matthias Kühnle, Michael Hübner, Jürgen Becker, Antonio Deledda, Claudio Mucci, Florian Ries, Marcello Coppola, Lorenzo Pieralisi, Riccardo Locatelli, Giuseppe Maruccia, Tommaso DeMarco, Fabio Campi
2008	A	`conf`	Cost-and Power Optimized FPGA based System Integration: Methodologies and Integration of a Low-Power Capacity-based Measurement Application on Xilinx FPGAs. DATE Katarina Paulsson, Michael Hübner, Jürgen Becker
2008	J	`jnl`	Current Trends on Reconfigurable Computing. Int. J. Reconfigurable Comput. Jürgen Becker, Michael Hübner, Roger F. Woods, Philip Heng Wai Leong, Robert Esser, Lionel Torres
2008	B	`conf`	Data path driven waveform-like reconfiguration. FPL Lars Braun, Katarina Paulsson, Herrmann Krömer, Michael Hübner, Jürgen Becker
2008	—	`conf`	Data reallocation by exploiting FPGA configuration mechanisms. ARC Oliver Sander, Lars Braun, Michael Hübner, Jürgen Becker
2008	A	`conf`	Design Flows, Communication Based Design and Architectures in Automotive Electronic Systems. DATE Jürgen Becker, Michael Hübner, Robert Esser, Andreas Herkersdorf, Walter Stechele, Vera Lauer
2008	A	`conf`	Design of a HW/SW Communication Infrastructure for a Heterogeneous Reconfigurable Processor. DATE Antonio Deledda, Claudio Mucci, Arseni Vitkovski, Philippe Bonnot, Arnaud Grasset, Philippe Millet, Matthias Kühnle, Florian Ries, Michael Hübner, Jürgen Becker, Massimo Coppola, Lorenzo Pieralisi, Riccardo Locatelli, Giuseppe Maruccia, Fabio Campi, Tommaso DeMarco
2008	B	`conf`	Exploitation of dynamic and partial hardware reconfiguration for on-line power/performance optimization. FPL Katarina Paulsson, Michael Hübner, Jürgen Becker
2008	—	`conf`	Exploitation of the External JTAG Interface for Internally Controlled Configuration Readback and Self-Reconfiguration of Spartan 3 FPGAs. ISVLSI Katarina Paulsson, Ulrich Viereck, Michael Hübner, Jürgen Becker
2008	B	`conf`	Fine grain reconfigurable architectures. FPL Josef Angermeier, Mateusz Majer, Jürgen Teich, Lars Braun, Tobias Schwalb, Philipp Graf, Michael Hübner, Jürgen Becker, Enno Lübbers, Marco Platzner, Christopher Claus, Walter Stechele, Andreas Herkersdorf, Markus Rullmann, Renate Merker
2008	B	`conf`	New dimensions for multiprocessor architectures: Ondemand heterogeneity, infrastructure and performance through reconfigurability - the RAMPSoC approach. FPL Diana Göhringer, Michael Hübner, Thomas Perschke, Jürgen Becker
2008	—	`conf`	Reducing latency times by accelerated routing mechanisms for an FPGA gateway in the automotive domain. FPT Oliver Sander, Michael Hübner, Jürgen Becker, Matthias Traub
2008	A	`conf`	Run-time reconfigurable adaptive multilayer network-on-chip for FPGA-based systems. IPDPS Michael Hübner, Lars Braun, Diana Göhringer, Jürgen Becker
2008	A	`conf`	Runtime adaptive multi-processor system-on-chip: RAMPSoC. IPDPS Diana Göhringer, Michael Hübner, Volker Schatz, Jürgen Becker
2008	—	`conf`	Towards Novel Approaches in Design Automation for FPGA Power Optimization. PATMOS Juanjo Noguera, Robert Esser, Katarina Paulsson, Michael Hübner, Jürgen Becker
2007	B	`conf`	A Graphical Model-Level Debugger for Heterogenous Reconfigurable Architectures. FPL Philipp Graf, Michael Hübner, Klaus D. Müller-Glaser, Jürgen Becker
2007	B	`conf`	Circuit Switched Run-Time Adaptive Network-on-Chip for Image Processing Applications. FPL Lars Braun, Michael Hübner, Jürgen Becker, Thomas Perschke, Volker Schatz, Stefan Bach
2007	A	`conf`	Communication Architectures for Dynamically Reconfigurable FPGA Designs. IPDPS Thilo Pionteck, Carsten Albrecht, Roman Koch, Erik Maehle, Michael Hübner, Jürgen Becker
2007	J	`jnl`	Dynamic and Partial FPGA Exploitation. Proc. IEEE Jürgen Becker, Michael Hübner, Gerhard Hettich, Rainer Constapel, Joachim Eisenmann, Jürgen Luka
2007	—	`conf`	Exploitation of Run-Time Partial Reconfiguration for Dynamic Power Management in Xilinx Spartan III-based Systems. ReCoSoC Katarina Paulsson, Michael Hübner, Salih Bayar, Jürgen Becker
2007	B	`conf`	Implementation of a Virtual Internal Configuration Access Port (JCAP) for Enabling Partial Self-Reconfiguration on Xilinx Spartan III FPGAs. FPL Katarina Paulsson, Michael Hübner, Günther Auer, Michael Dreschmann, Jürgen Becker
2007	—	`conf`	Modelling and Simulation of Dynamic and Partially Reconfigurable Systems using SystemC. ISVLSI Alisson Vasconcelos de Brito, Matthias Kühnle, Michael Hübner, Jürgen Becker, Elmar U. K. Melcher
2007	C	`conf`	New tool support and architectures in adaptive reconfigurable computing. VLSI-SoC Jürgen Becker, Adam Donlin, Michael Hübner
2007	B	`conf`	On-line Routing of Reconfigurable Functions for Future Self-Adaptive Systems - Investigations within the ÆTHER Project. FPL Katarina Paulsson, Michael Hübner, Jürgen Becker, Jean-Marc Philippe, Christian Gamrat
2007	—	`conf`	Physical Configuration On-Line Visualization of Xilinx Virtex-II FPGAs. ISVLSI Michael Hübner, Lars Braun, Jürgen Becker, Christopher Claus, Walter Stechele
2006	A	`conf`	Elementary block based 2-dimensional dynamic and partial reconfiguration for Virtex-II FPGAs. IPDPS Michael Hübner, Christian Schuck, Jürgen Becker
2006	—	`conf`	Exploiting dynamic and partial reconfiguration for FPGAs: toolflow, architecture and system integration. SBCCI Michael Hübner, Jürgen Becker
2006	—	`conf`	Methods for Run-time Failure Recognition and Recovery in dynamic and partial Reconfigurable Systems Based on Xilinx Virtex-II Pro FPGAs. ISVLSI Katarina Paulsson, Michael Hübner, Markus Jung, Jürgen Becker
2006	—	`conf`	New 2-Dimensional Partial Dynamic Reconfiguration Techniques for Real-time Adaptive Microelectronic Circuits. ISVLSI Michael Hübner, Christian Schuck, Matthias Kühnle, Jürgen Becker
2006	—	`conf`	On-line optimization of FPGA power-dissipation by exploiting run-time adaption of communication primitives. SBCCI Katarina Paulsson, Michael Hübner, Jürgen Becker
2006	—	`conf`	Physical 2D Morphware and Power Reduction Methods for Everyone. Dynamically Reconfigurable Architectures Jürgen Becker, Michael Hübner, Katarina Paulsson
2006	—	`conf`	Run-time reconfigurabilility and other future trends. SBCCI Jürgen Becker, Michael Hübner
2006	—	`conf`	Strategies to On- Line Failure Recovery in Self- Adaptive Systems based on Dynamic and Partial Reconfiguration. AHS Katarina Paulsson, Michael Hübner, Jürgen Becker
2005	—	`conf`	Dynamic Reconfiguration On-Demand: Real-time Adaptivity in Next Generation Microelectronics. ReCoSoC Jürgen Becker, Michael Hübner, Katarina Paulsson, Alexander Thomas
2005	—	`conf`	I Models and Tools for the Dynamic Reconfiguration of FPGAs. SoCC Adam Donlin, Jürgen Becker, Michael Hübner
2005	—	`conf`	Novel Seamless Design-Flow for Partial and Dynamic Reconfigurable Systems with Customized Communication Structures based on Xilinx Virtex-II FPGAs. ARCS Workshops Michael Hübner, Katarina Paulsson, Marcus Stitz, Jürgen Becker
2005	J	`jnl`	On-demand FPGA run-time system for flexible and dynamical reconfiguration. Int. J. Embed. Syst. Michael Ullmann, Michael Hübner, Jürgen Becker
2005	A	`conf`	Parallel and Flexible Multiprocessor System-On-Chip for Adaptive Automotive Applications based on Xilinx MicroBlaze Soft-Cores. IPDPS Michael Hübner, Katarina Paulsson, Jürgen Becker
2005	J	`jnl`	Realtime configuration code decompression for dynamic FPGA self reconfiguration: evaluation and implementation. Int. J. Embed. Syst. Michael Hübner, Michael Ullmann, Jürgen Becker
2004	A	`conf`	An FPGA Run-Time System for Dynamical On-Demand Reconfiguration. IPDPS Michael Ullmann, Michael Hübner, Björn Grimm, Jürgen Becker
2004	B	`conf`	On-Demand FPGA Run-Time System for Dynamical Reconfiguration with Adaptive Priorities. FPL Michael Ullmann, Michael Hübner, Björn Grimm, Jürgen Becker
2004	B	`conf`	Partial and Dynamically Reconfiguration of Xilinx Virtex-II FPGAs. FPL Brandon Blodget, Christophe Bobda, Michael Hübner, Adronis Niyonkuru
2004	—	`conf`	Real-time LUT-based network topologies for dynamic and partial FPGA self-reconfiguration. SBCCI Michael Hübner, Tobias Becker, Jürgen Becker
2004	B	`conf`	Scalable Application-Dependent Network on Chip Adaptivity for Dynamical Reconfigurable Real-Time Systems. FPL Michael Hübner, Michael Ullmann, Lars Braun, A. Klausmann, Jürgen Becker
2003	—	`conf`	Power Estimation and Power Measurement of Xilinx Virtex FPGAs: Trade-Offs and Limitations. SBCCI Jürgen Becker, Michael Hübner, Michael Ullmann
2003	C	`conf`	Real-Time Dynamically Run-Time Reconfiguration for Power-/Cost-optimized Virtex FPGA Realizations. VLSI-SOC Jürgen Becker, Michael Hübner, Michael Ullmann
2003	—	`conf`	Run-Time FPGA Reconfiguration for Power-/Cost-Optimized Real-time Systems. VLSI-SoC (Selected Papers) Jürgen Becker, Michael Hübner, Michael Ullmann