Michael Chu

37 papers A 3B 4C 1Misc 1Journal 20Unranked 8
YearRankTypeTitle / Venue / Authors
2024 J jnl
UnCLe: Unsupervised Continual Learning of Depth Completion.
CoRR
Suchisrit Gangopadhyay, Xien Chen, Michael Chu, Patrick Rim, Hyoungseob Park, Alex Wong
2023 J jnl
Automated Detection of Under-Constrained Circuits in Zero-Knowledge Proofs.
Proc. ACM Program. Lang.
Shankara Pailoor, Yanju Chen, Franklyn Wang, Clara Rodríguez-Núñez, Jacob Van Geffen, Jason Morton, Michael Chu, Brian Gu, Yu Feng, Isil Dillig
2023 J jnl
Automated Detection of Underconstrained Circuits for Zero-Knowledge Proofs.
IACR Cryptol. ePrint Arch.
Shankara Pailoor, Yanju Chen, Franklyn Wang, Clara Rodríguez-Núñez, Jacob Van Gaffen, Jason Morton, Michael Chu, Brian Gu, Yu Feng, Isil Dillig
2019 J jnl
Respiration rate and volume measurements using wearable strain sensors.
npj Digit. Medicine
Michael Chu, Thao Nguyen, Vaibhav Pandey, Yongxiao Zhou, Hoang N. Pham, Ronen Bar-Yoseph, Shlomit Radom-Aizik, Ramesh C. Jain, Dan M. Cooper, Michelle Khine
2015 J jnl
High-Speed Reconfigurable Circuits for Multirate Systems in SiGe HBT Technology.
Proc. IEEE
Mitchell R. LeRoy, Srikumar Raman, Michael Chu, Jin Woo Kim, Jong-Ru Guo, Kuan Zhou, Chao You, Ryan Clarke, Bryan S. Goda, John F. McDonald
2014 J jnl
Design of BiCMOS SRAMs for high-speed SiGe applications.
IET Circuits Devices Syst.
Xuelian Liu, Mitchell R. LeRoy, Ryan Clarke, Michael Chu, H. O. Aquino, Srikumar Raman, Aamir Zia, Russell P. Kraft, John F. McDonald
2014 J jnl
Design of High-Speed Register Files Using SiGe HBT BiCMOS Technology.
IEEE Trans. Circuits Syst. II Express Briefs
Xuelian Liu, Srikumar Raman, Ryan Clarke, Mitchell R. LeRoy, Okan Erdogan, Michael Chu, Alexey Gutin, Russell P. Kraft, John F. McDonald
2011 J jnl
Carry Chains for Ultra High-Speed SiGe HBT Adders.
IEEE Trans. Circuits Syst. I Regul. Pap.
Alexey Gutin, Philip Jacob, Michael Chu, Paul M. Belemjian, Mitchell R. LeRoy, Russell P. Kraft, John F. McDonald
2011 J jnl
Reconfigurable 40 GHz BiCMOS uniform delay crossbar switch for broadband and wide tuning range narrowband applications.
IET Circuits Devices Syst.
Jin Woo Kim, Michael Chu, Philip Jacob, Aamir Zia, Russell P. Kraft, John F. McDonald
2010 J jnl
A 3-D Cache With Ultra-Wide Data Bus for 3-D Processor-Memory Integration.
IEEE Trans. Very Large Scale Integr. Syst.
Aamir Zia, Philip Jacob, Jin Woo Kim, Michael Chu, Russell P. Kraft, John F. McDonald
2010 J jnl
A 40 Gs/s Time Interleaved ADC Using SiGe BiCMOS Technology.
IEEE J. Solid State Circuits
Michael Chu, Philip Jacob, Jin Woo Kim, Mitchell R. LeRoy, Russell P. Kraft, John F. McDonald
2010 J jnl
Correction to "A 40 GS/s Time Interleaved ADC Using SiGe BiCMOS Technology".
IEEE J. Solid State Circuits
Michael Chu, Philip Jacob, Jin Woo Kim, Mitchell R. LeRoy, Russell P. Kraft, John F. McDonald
2009 J jnl
Mitigating Memory Wall Effects in High-Clock-Rate and Multicore CMOS 3-D Processor Memory Stacks.
Proc. IEEE
Philip Jacob, Aamir Zia, Okan Erdogan, Paul M. Belemjian, Jin Woo Kim, Michael Chu, Russell P. Kraft, John F. McDonald, Kerry Bernstein
2009 J jnl
Scientific and Engineering Computing Using ATI Stream Technology.
Comput. Sci. Eng.
Amr M. Bayoumi, Michael Chu, Yasser Y. Hanafy, Patricia Harrell, Gamal Refai-Ahmed
2009 — conf
Thermal analysis for a SiGe HBT 40 watt 32 GHz clock 3D memory processor chip stack using diamond heat spreader layers.
3DIC
John F. McDonald, Okan Erdogan, Philip Jacob, Paul M. Belemjian, Alexey Gutin, Aamir Zia, Michael Chu, Jin Woo Kim, Ryan Clarke, Nate DeSimone, Sherry Liu, Russell P. Kraft
2007 J jnl
52 Gb/s 16: 1 transmitter in 0.13 μm SiGe BiCMOS technology.
IET Circuits Devices Syst.
Young Uk Yim, Peter F. Curran, Michael Chu, John F. McDonald, Russell P. Kraft
2007 J jnl
A 12-Gb/s DEMUX Implemented With SiGe High-Speed FPGA Circuits.
IEEE Trans. Very Large Scale Integr. Syst.
Chao You, Jong-Ru Guo, Russell P. Kraft, Michael Chu, Bryan S. Goda, John F. McDonald
2007 C conf
Amdahl's figure of merit, SiGe HBT BiCMOS, and 3D chip stacking.
ICCD
Philip Jacob, Aamir Zia, Okan Erdogan, Paul M. Belemjian, Peng Jin, Jin Woo Kim, Michael Chu, Russell P. Kraft, John F. McDonald
2006 B conf
Hybrid transactional memory.
PPoPP
Sanjeev Kumar, Michael Chu, Christopher J. Hughes, Partha Kundu, Anthony D. Nguyen
2006 J jnl
Stream computations organized for reconfigurable execution.
Microprocess. Microsystems
André DeHon, Yury Markovsky, Eylon Caspi, Michael Chu, Randy Huang, Stylianos Perissakis, Laura Pozzi, Joseph Yeh, John Wawrzynek
2005 J jnl
A 10 GHz 4: 1 MUX and 1: 4 DEMUX implemented by a Gigahertz SiGe FPGA for fast ADC.
Integr.
Jong-Ru Guo, Chao You, Kuan Zhou, Michael Chu, Peter F. Curran, Jiedong Diao, Bryan S. Goda, Russell P. Kraft, John F. McDonald
2005 B conf
A 11 GHz FPGA with Test Applications.
FPL
Chao You, Jong-Ru Guo, Michael Chu, Russell P. Kraft, Bryan S. Goda, John F. McDonald
2005 J jnl
A 5-10GHz SiGe BiCMOS FPGA with new configurable logic block.
Microprocess. Microsystems
Chao You, Jong-Ru Guo, Russell P. Kraft, Michael Chu, Peter F. Curran, Kuan Zhou, Bryan S. Goda, John F. McDonald
2005 — conf
A High Speed Reconfigurable Gate Array for Gigahertz Applications.
ISVLSI
Jong-Ru Guo, Chao You, Michael Chu, Okan Erdogan, Russell P. Kraft, John F. McDonald
2004 — conf
The 10GHz 4: 1 MUX and 1: 4 DEMUX implemented via the gigahertz SiGe FPGA.
ACM Great Lakes Symposium on VLSI
Jong-Ru Guo, Chao You, Peter F. Curran, Michael Chu, Kuan Zhou, Jiedong Diao, A. George, Russell P. Kraft, John F. McDonald
2004 A conf
The gigahertz FPGA: design consideration and applications.
FPGA
Jong-Ru Guo, Chao You, Michael Chu, Robert W. Heikaus, Kuan Zhou, Okan Erdogan, Jiedong Diao, Bryan S. Goda, Russell P. Kraft, John F. McDonald
2003 — conf
A 5-20 GHz, low power FPGA implemented by SiGe HBT BiCMOS technology.
ACM Great Lakes Symposium on VLSI
Chao You, Jong-Ru Guo, Russell P. Kraft, Kuan Zhou, Michael Chu, John F. McDonald
2003 — conf
A Novel Multi-Speed, Power Saving Architecture for SiGe HBT FPGA.
Engineering of Reconfigurable Systems and Algorithms
Jong-Ru Guo, Chao You, Michael Chu, Kuan Zhou, Young Uk Yim, Robert W. Heikaus, Russell P. Kraft, John F. McDonald
2003 A conf
A four-bit full adder implemented on fast SiGe FPGAs with novel power control scheme.
FPGA
Kuan Zhou, Michael Chu, Chao You, Jong-Ru Guo, Channakeshav, John Mayega, John F. McDonald, Russell P. Kraft, Bryan S. Goda
2003 B conf
Gigahertz FPGA by SiGe BiCMOS Technology for Low Power, High Speed Computing with 3-D Memory.
FPL
Chao You, Jong-Ru Guo, Russell P. Kraft, Michael Chu, Robert W. Heikaus, Okan Erdogan, Peter F. Curran, Bryan S. Goda, Kuan Zhou, John F. McDonald
2002 A conf
Analysis of quasi-static scheduling techniques in a virtualized reconfigurable machine.
FPGA
Yury Markovsky, Eylon Caspi, Randy Huang, Joseph Yeh, Michael Chu, John Wawrzynek, André DeHon
2002 — conf
Gigahertz SiGe BiCMOS FPGAs with new architectures and novel power management schemes.
FPT
Kuan Zhou, Channakeshav, Michael Chu, Jong-Ru Guo, S.-C. Liu, Russell P. Kraft, Chao You, John F. McDonald
2001 J jnl
DataSplash: A Direct Manipulation Environment for Programming Semantic Zoom Visualizations of Tabular Data.
J. Vis. Lang. Comput.
Allison Woodruff, Chris Olston, Alexander Aiken, Michael Chu, Vuk Ercegovac, Mark Lin, Mybrid Spalding, Michael Stonebraker
2000 B conf
Stream Computations Organized for Reconfigurable Execution (SCORE).
FPL
Eylon Caspi, Michael Chu, Randy Huang, Joseph Yeh, John Wawrzynek, André DeHon
1998 — conf
A 6.9 ns, 560 macrocell, in system programmable, CMOS PLD with 3.3-5 volt I/O capability.
CICC
Dirk Reese, Eric Chun, Sammy Cheung, Edmond Lau, Michael Chu, Gwen Liang, Nghia Van Tran, Brad Vest, Richard Smolen, Minchang Liang, Seshan Sekariapuram, Behzad Nouban, Myron Wong, John Costello, John Turner
1998 — conf
DataSplash.
SIGMOD Conference
Chris Olston, Allison Woodruff, Alexander Aiken, Michael Chu, Vuk Ercegovac, Mark Lin, Mybrid Spalding, Michael Stonebraker
1998 Misc conf
Object Oriented Circuit-Generators in Java.
FCCM
Michael Chu, Nicholas Weaver, Kolja Sulimma, André DeHon, John Wawrzynek