Michael C. W. Coln

15 papers Journal 11Unranked 4
YearRankTypeTitle / Venue / Authors
2025 J jnl
A 384-Site Chip Platform for Biochemical Applications With Individual Site Precision Temperature Control.
IEEE J. Solid State Circuits
Michael C. W. Coln, Qingdong Meng, Viorel Bucur, Ramji S. Lakshmanan, Aditya Yadav, David Lloyd, Nicolò Ferri, Mark Bignell, Daniele Di Nuzzo, Phillip Nadeau, Matthew Hayes, Roman Trogan
2019 J jnl
A 1-V 560-nW SAR ADC With 90-dB SNDR for IoT Sensing Applications.
IEEE Trans. Circuits Syst. II Express Briefs
Huajun Zhang, Zhichao Tan, Chao Chu, Baozhen Chen, Hongxing Li, Michael C. W. Coln, Khiem Nguyen
2018 J jnl
A 16-bit 16-MS/s SAR ADC With On-Chip Calibration in 55-nm CMOS.
IEEE J. Solid State Circuits
Junhua Shen, Akira Shikata, Lalinda Fernando, Ned Guthrie, Baozhen Chen, Mark Maddox, Nikhil Mascarenhas, Ron Kapusta, Michael C. W. Coln
2018 — conf
A signal-independent background-calibrating 20b 1MS/S SAR ADC with 0.3ppm INL.
ISSCC
Hongxing Li, Mark Maddox, Michael C. W. Coln, William Buckley, Derek Hummerston, Naveed Naeem
2018 J jnl
Corrections to "Precision Passive-Charge-Sharing SAR ADC: Analysis, Design, and Measurement Results".
IEEE J. Solid State Circuits
Baozhen Chen, Mark Maddox, Michael C. W. Coln, Ye Lu, Junhua Shen, Lalinda D. Fernando
2018 J jnl
Precision Passive-Charge-Sharing SAR ADC: Analysis, Design, and Measurement Results.
IEEE J. Solid State Circuits
Baozhen Chen, Mark Maddox, Michael C. W. Coln, Ye Lu, Junhua Shen, Lalinda Fernando
2016 — conf
A 16 bit linear passive-charge-sharing SAR ADC in 55nm CMOS.
A-SSCC
Mark Maddox, Baozhen Chen, Michael C. W. Coln, Ron Kapusta, Junhua Shen, Lalinda Fernando
2013 J jnl
A 20b Clockless DAC With Sub-ppm INL, 7.5 nV/√Hz Noise and 0.05 ppm/°C Stability.
IEEE J. Solid State Circuits
Roddy C. McLachlan, Alan Gillespie, Michael C. W. Coln, Douglas Chisholm, Denise T. Lee
2013 — conf
A 20b clockless DAC with sub-ppm-linearity 7.5nV/vHz-noise and 0.05ppm/°C-stability.
ISSCC
Roddy C. McLachlan, Alan Gillespie, Michael C. W. Coln, Douglas Chisholm, Denise T. Lee
2013 — conf
Split ADC background self-calibration of a 16-b successive approximation ADC in 180nm CMOS.
I2MTC
John A. McNeill, Christopher L. David, Michael C. W. Coln, Ka Yan Chan, Cody Brenneman
2011 J jnl
All-Digital Background Calibration of a Successive Approximation ADC Using the "Split ADC" Architecture.
IEEE Trans. Circuits Syst. I Regul. Pap.
John A. McNeill, Ka Yan Chan, Michael C. W. Coln, Christopher L. David, Cody Brenneman
2009 J jnl
"Split ADC" Calibration for All-Digital Correction of Time-Interleaved ADC Errors.
IEEE Trans. Circuits Syst. II Express Briefs
John A. McNeill, Christopher L. David, Michael C. W. Coln, Rosa Croughwell
2009 J jnl
Digital Background-Calibration Algorithm for "Split ADC" Architecture.
IEEE Trans. Circuits Syst. I Regul. Pap.
John A. McNeill, Michael C. W. Coln, D. Richard Brown, Brian J. Larivee
2006 J jnl
Comments on 'Split ADC' architecture for deterministic digital background calibration of a 16-bit 1-MS/s ADC".
IEEE J. Solid State Circuits
Jipeng Li, Un-Ku Moon, John A. McNeill, Michael C. W. Coln, Brian J. Larivee
2005 J jnl
"Split ADC" architecture for deterministic digital background calibration of a 16-bit 1-MS/s ADC.
IEEE J. Solid State Circuits
John A. McNeill, Michael C. W. Coln, Brian J. Larivee