Michael Adler - RankMe

24 papers A* 3A 8B 4Misc 1Journal 5Unranked 2

Year	Rank	Type	Title / Venue / Authors
2022	A	`ed.`	FPGA '22: The 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Virtual Event, USA, 27 February 2022 - 1 March 2022 FPGA Michael Adler, Paolo Ienne
2021	A	`ed.`	FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28 - March 2, 2021 FPGA Lesley Shannon, Michael Adler
2020	J	`jnl`	An Ultrasonic Rheometer to Measure Gas Absorption in Ionic Liquids: Design, Calibration and Testing. Sensors Michele Schirru, Michael Adler
2018	—	`conf`	Thermographic Quantification for Archaeological Prospection at Picuris Pueblo, New Mexico. DigitalHERITAGE/VSMM Samuel Levin, May Yuan, Michael Adler
2017	J	`jnl`	(FPL 2015) Scavenger: Automating the Construction of Application-Optimized Memory Hierarchies. ACM Trans. Reconfigurable Technol. Syst. Hsin-Jung Yang, Kermin Fleming, Felix Winterstein, Michael Adler, Joel S. Emer
2017	A	`conf`	Automatic Construction of Program-Optimized FPGA Memory Networks. FPGA Hsin-Jung Yang, Kermin Fleming, Felix Winterstein, Annie I. Chen, Michael Adler, Joel S. Emer
2016	A	`conf`	LMC: Automatic Resource-Aware Program-Optimized Memory Partitioning. FPGA Hsin-Jung Yang, Kermin Fleming, Michael Adler, Felix Winterstein, Joel S. Emer
2016	—	`ch.`	The LEAP FPGA Operating System. FPGAs for Software Programmers Kermin Fleming, Michael Adler
2015	J	`jnl`	Efficient Control and Communication Paradigms for Coarse-Grained Spatial Architectures. ACM Trans. Comput. Syst. Michael Pellauer, Angshuman Parashar, Michael Adler, Bushra Ahsan, Randy L. Allmon, Neal Clayton Crago, Kermin Fleming, Mohit Gambhir, Aamer Jaleel, Tushar Krishna, Daniel Lustig, Stephen Maresh, Vladimir Pavlov, Rachid Rayess, Antonia Zhai, Joel S. Emer
2015	A	`conf`	Growing a Healthy FPGA Ecosystem. FPGA John Lockwood, Michael Adler, Dan Mansur, Derek Chiou, Mike Strickland, Jason Cong, Steve Teig
2015	B	`conf`	Scavenger: Automating the construction of application-optimized memory hierarchies. FPL Hsin-Jung Yang, Kermin Fleming, Michael Adler, Felix Winterstein, Joel S. Emer
2014	J	`jnl`	Efficient Spatial Processing Element Control via Triggered Instructions. IEEE Micro Angshuman Parashar, Michael Pellauer, Michael Adler, Bushra Ahsan, Neal Clayton Crago, Daniel Lustig, Vladimir Pavlov, Antonia Zhai, Mohit Gambhir, Aamer Jaleel, Randy L. Allmon, Rachid Rayess, Stephen Maresh, Joel S. Emer
2014	Misc	`conf`	LEAP Shared Memories: Automating the Construction of FPGA Coherent Memories. FCCM Hsin-Jung Yang, Kermin Fleming, Michael Adler, Joel S. Emer
2014	B	`conf`	The LEAP FPGA operating system. FPL Kermin Fleming, Hsin-Jung Yang, Michael Adler, Joel S. Emer
2013	B	`conf`	Optimizing under abstraction: Using prefetching to improve FPGA performance. FPL Hsin-Jung Yang, Kermin Fleming, Michael Adler, Joel S. Emer
2013	A*	`conf`	Triggered instructions: a control paradigm for spatially-programmed architectures. ISCA Angshuman Parashar, Michael Pellauer, Michael Adler, Bushra Ahsan, Neal Clayton Crago, Daniel Lustig, Vladimir Pavlov, Antonia Zhai, Mohit Gambhir, Aamer Jaleel, Randy L. Allmon, Rachid Rayess, Stephen Maresh, Joel S. Emer
2012	A	`conf`	Leveraging latency-insensitivity to ease multiple FPGA design. FPGA Kermin Elliott Fleming, Michael Adler, Michael Pellauer, Angshuman Parashar, Arvind, Joel S. Emer
2012	—	`conf`	ZIP-IO: Architecture for application-specific compression of Big Data. FPT Sang Woo Jun, Kermin Fleming, Michael Adler, Joel S. Emer
2011	A*	`conf`	HAsim: FPGA-based high-detail multicore simulation using time-division multiplexing. HPCA Michael Pellauer, Michael Adler, Michel A. Kinsy, Angshuman Parashar, Joel S. Emer
2011	A	`conf`	Leap scratchpads: automatic memory and cache management for reconfigurable logic. FPGA Michael Adler, Kermin Fleming, Angshuman Parashar, Michael Pellauer, Joel S. Emer
2009	J	`jnl`	A-Port Networks: Preserving the Timed Behavior of Synchronous Systems for Modeling on FPGAs. ACM Trans. Reconfigurable Technol. Syst. Michael Pellauer, Muralidaran Vijayaraghavan, Michael Adler, Arvind, Joel S. Emer
2009	A*	`conf`	Soft connections: addressing the hardware-design modularity problem. DAC Michael Pellauer, Michael Adler, Derek Chiou, Joel S. Emer
2008	A	`conf`	A-Ports: an efficient abstraction for cycle-accurate performance models on FPGAs. FPGA Michael Pellauer, Muralidaran Vijayaraghavan, Michael Adler, Arvind, Joel S. Emer
2008	B	`conf`	Quick Performance Models Quickly: Closely-Coupled Partitioned Simulation on FPGAs. ISPASS Michael Pellauer, Muralidaran Vijayaraghavan, Michael Adler, Arvind, Joel S. Emer