Mehdi Dehbashi

20 papers B 3C 7Misc 1Journal 3Unranked 5
YearRankTypeTitle / Venue / Authors
2018 C conf
Constraint-Based Pattern Retargeting for Reducing Localized Power Activity During Testing.
DDECS
Harshad Dhotre, Stephan Eggersglüß, Rolf Drechsler, Mehdi Dehbashi, Ulrike Pfannkuchen
2017 — conf
Machine learning based test pattern analysis for localizing critical power activity areas.
DFT
Harshad Dhotre, Stephan Eggersglüß, Mehdi Dehbashi, Ulrike Pfannkuchen, Rolf Drechsler
2016 — conf
Automated Optimization of Scan Chain Structure for Test Compression-Based Designs.
ATS
Harshad Dhotre, Mehdi Dehbashi, Ulrike Pfannkuchen, Klaus Hofmann
2015 J jnl
Transaction-based online debug for NoC-based multiprocessor SoCs.
Microprocess. Microsystems
Mehdi Dehbashi, Görschwin Fey
2014 — conf
Automated formal verification of X propagation with respect to testability issues.
IDT
Mehdi Dehbashi, Daniel Tille, Ulrike Pfannkuchen, Stephan Eggersglüß
2014 Misc conf
Debug Automation for Synchronization Bugs at RTL.
VLSID
Mehdi Dehbashi, Görschwin Fey
2014 — conf
SAT-based speedpath debugging using X traces.
IDT
Mehdi Dehbashi, Görschwin Fey
2014 B conf
Sat-based speedpath debugging using waveforms.
ETS
Mehdi Dehbashi, Görschwin Fey
2014 C conf
Transaction-Based Online Debug for NoC-Based Multiprocessor SoCs.
PDP
Mehdi Dehbashi, Görschwin Fey
2013 J jnl
Automated design debugging in a testbench-based verification environment.
Microprocess. Microsystems
Mehdi Dehbashi, André Sülflow, Görschwin Fey
2013 J jnl
Debug Automation for Logic Circuits Under Timing Variations.
IEEE Des. Test
Mehdi Dehbashi, Görschwin Fey
2013 — —
Debug automation from pre-silicon to post-silicon.
Mehdi Dehbashi
2013 C conf
Efficient automated speedpath debugging.
DDECS
Mehdi Dehbashi, Görschwin Fey
2012 — conf
Automated Post-Silicon Debugging of Failing Speedpaths.
Asian Test Symposium
Mehdi Dehbashi, Görschwin Fey
2012 C conf
Automated debugging from pre-silicon to post-silicon.
DDECS
Mehdi Dehbashi, Görschwin Fey
2012 B conf
Functional analysis of circuits under timing variations.
ETS
Mehdi Dehbashi, Görschwin Fey, Kaushik Roy, Anand Raghunathan
2012 C conf
On Modeling and Evaluation of Logic Circuits under Timing Variations.
DSD
Mehdi Dehbashi, Görschwin Fey, Kaushik Roy, Anand Raghunathan
2011 C conf
Automated Design Debugging in a Testbench-Based Verification Environment.
DSD
Mehdi Dehbashi, André Sülflow, Görschwin Fey
2008 B conf
Fault Effects in FlexRay-Based Networks with Hybrid Topology.
ARES
Mehdi Dehbashi, Vahid Lari, Seyed Ghassem Miremadi, Mohammad Shokrollah-Shirazi
2007 C conf
Assessment of Message Missing Failures in FlexRay-Based Networks.
PRDC
Vahid Lari, Mehdi Dehbashi, Seyed Ghassem Miremadi, Navid Farazmand