Mehdi Alipour - RankMe

21 papers A* 5A 1B 1Journal 8Unranked 5

Year	Rank	Type	Title / Venue / Authors
2026	A*	`conf`	Tempranillo: Non-Speculative Early Register Release. HPCA Carlos Escuin, Paolo Salvatore Galfano, Davide Basilio Bartolini, Leeor Peled, Mehdi Alipour
2022	J	`jnl`	Dependence-aware Slice Execution to Boost MLP in Slice-out-of-order Cores. ACM Trans. Archit. Code Optim. Rakesh Kumar, Mehdi Alipour, David Black-Schaffer
2022	J	`jnl`	Freeway to Memory Level Parallelism in Slice-Out-of-Order Cores. CoRR Rakesh Kumar, Mehdi Alipour, David Black-Schaffer
2020	A*	`conf`	Delay and Bypass: Ready and Criticality Aware Instruction Scheduling in Out-of-Order Processors. HPCA Mehdi Alipour, Stefanos Kaxiras, David Black-Schaffer, Rakesh Kumar
2020	—	`—`	Rethinking Dynamic Instruction Scheduling and Retirement for Efficient Microarchitectures. Mehdi Alipour
2019	A	`conf`	FIFOrder MicroArchitecture: Ready-Aware Instruction Scheduling for OoO Processors. DATE Mehdi Alipour, Rakesh Kumar, Stefanos Kaxiras, David Black-Schaffer
2019	A*	`conf`	Freeway: Maximizing MLP for Slice-Out-of-Order Execution. HPCA Rakesh Kumar, Mehdi Alipour, David Black-Schaffer
2019	—	`conf`	Ghost loads: what is the cost of invisible speculation? CF Christos Sakalis, Mehdi Alipour, Alberto Ros, Alexandra Jimborean, Stefanos Kaxiras, Magnus Själander
2019	J	`jnl`	Maximizing Limited Resources: a Limit-Based Study and Taxonomy of Out-of-Order Commit. J. Signal Process. Syst. Mehdi Alipour, Trevor E. Carlson, David Black-Schaffer, Stefanos Kaxiras
2018	A*	`conf`	Constructing a Weak Memory Model. ISCA Sizhuo Zhang, Muralidaran Vijayaraghavan, Andrew Wright, Mehdi Alipour, Arvind
2018	J	`jnl`	Constructing a Weak Memory Model. CoRR Sizhuo Zhang, Muralidaran Vijayaraghavan, Andrew Wright, Mehdi Alipour, Arvind
2018	J	`jnl`	Non-Speculative Load Reordering in Total Store Ordering. IEEE Micro Stefanos Kaxiras, Trevor E. Carlson, Mehdi Alipour, Alberto Ros
2017	B	`conf`	A taxonomy of out-of-order instruction commit. ISPASS Mehdi Alipour, Trevor E. Carlson, Stefanos Kaxiras
2017	—	`conf`	Exploring the Performance Limits of Out-of-order Commit. Conf. Computing Frontiers Mehdi Alipour, Trevor E. Carlson, Stefanos Kaxiras
2017	A*	`conf`	Non-Speculative Load-Load Reordering in TSO. ISCA Alberto Ros, Trevor E. Carlson, Mehdi Alipour, Stefanos Kaxiras
2012	J	`jnl`	Design Space Exploration to Find the Optimum Cache and Register File Size for Embedded Applications CoRR Mehdi Alipour, Mostafa E. Salehi, Hesamodin Shojaei Baghini
2012	J	`jnl`	Effect of Thread Level Parallelism on the Performance of Optimum Architecture for Embedded Applications CoRR Mehdi Alipour, Hojjat Taghdisi
2012	—	`conf`	Multi objective design space exploration of cache for embedded applications. CCECE Mehdi Alipour, Hojjat Taghdisi, Seyed Hassan Sadeghzadeh
2012	J	`jnl`	Performance-Optimum Superscalar Architecture for Embedded Applications CoRR Mehdi Alipour, Mostafa E. Salehi
2011	—	`conf`	Congestion and track usage improvement of large FPGAs using metro-on-FPGA methodology. ACM Great Lakes Symposium on VLSI Mehdi Alipour, Mohammad Haji Seyed Javadi, Ali Jahanian
2011	—	`conf`	Performance per power optimum cache architecture for embedded applications, a design space exploration. NESEA Mehdi Alipour, Kamran Moshari, Mohammad Reza Bagheri