| Year | Rank | Type | Title / Venue / Authors |
|---|---|---|---|
| 2026 | J | jnl |
Neurocomputing
|
| 2026 | J | jnl |
Eng. Appl. Artif. Intell.
|
| 2025 | J | jnl |
Circuits Syst. Signal Process.
|
| 2025 | J | jnl |
IEEE Access
|
| 2025 | J | jnl |
Digit. Signal Process.
|
| 2025 | J | jnl |
Multim. Tools Appl.
|
| 2024 | J | jnl |
Comput. Electr. Eng.
|
| 2024 | — | conf |
ISQED
|
| 2024 | A | conf |
DATE
|
| 2023 | J | jnl |
Comput.
|
| 2023 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 2023 | A* | conf |
DAC
|
| 2023 | — | conf |
HOST
|
| 2022 | J | jnl |
Multim. Tools Appl.
|
| 2022 | J | jnl |
IEEE Trans. Ind. Informatics
|
| 2022 | J | jnl |
IEEE Trans. Computers
|
| 2021 | J | jnl |
Circuits Syst. Signal Process.
|
| 2021 | A | conf |
ICCAD
|
| 2021 | — | conf |
ISQED
|
| 2021 | J | jnl |
Phys. Commun.
|
| 2021 | J | jnl |
Circuits Syst. Signal Process.
|
| 2021 | J | jnl |
CoRR
|
| 2020 | J | jnl |
AI Soc.
|
| 2020 | C | conf |
ICCD
|
| 2020 | J | jnl |
J. Signal Process. Syst.
|
| 2020 | J | jnl |
Digit. Signal Process.
|
| 2019 | J | jnl |
CoRR
|
| 2019 | J | jnl |
CoRR
|
| 2018 | — | conf |
IOTAIS
|
| 2018 | J | jnl |
IEEE Access
|
| 2017 | J | jnl |
Int. J. Comput. Intell. Appl.
|
| 2016 | J | jnl |
Multim. Tools Appl.
|
| 2015 | J | jnl |
Clust. Comput.
|
| 2015 | J | jnl |
J. Supercomput.
|
| 2015 | J | jnl |
J. Commun. Networks
|
| 2015 | J | jnl |
Clust. Comput.
|
| 2014 | J | jnl |
IEICE Trans. Commun.
|
| 2014 | J | jnl |
Computationally Efficient Implementation of a Hamming Code Decoder using a Graphics Processing Unit.
CoRR
|
| 2013 | — | conf |
MUSIC
|
| 2013 | — | conf |
MUSIC
|