Maurizio Martina

207 papers A* 3A 10B 17C 12Misc 3Journal 97Unranked 60

Year	Rank	Type	Title / Venue / Authors
2026	—	`ed.`	Applications in Electronics Pervading Industry, Environment and Society - APPLEPIES 2025, Turin, Italy, September 11-12, 2025. ApplePies Massimo Ruo Roch, Andrés Gómez, Luca Lazzaroni, Maurizio Martina, Paolo Motto Ros, Nuria Pazos Escudero, Riccardo Berta
2025	—	`conf`	A Deep Dive into Integration Methodologies in RISC-V. CF (Companion) Valeria Piscopo, Alessandra Dolmeta, Mattia Mirigaldi, Maurizio Martina, Guido Masera
2025	A*	`conf`	ARCANE: Adaptive RISC-V Cache Architecture for Near-memory Extensions. DAC Vincenzo Petrolo, Flavia Guella, Michele Caon, Pasquale Davide Schiavone, Guido Masera, Maurizio Martina
2025	J	`jnl`	ARCANE: Adaptive RISC-V Cache Architecture for Near-memory Extensions. CoRR Vincenzo Petrolo, Flavia Guella, Michele Caon, Pasquale Davide Schiavone, Guido Masera, Maurizio Martina
2025	—	`ed.`	Applications in Electronics Pervading Industry, Environment and Society - APPLEPIES 2024, Turin, Italy, 19-20 September 2024. ApplePies Massimo Ruo Roch, Francesco Bellotti, Riccardo Berta, Maurizio Martina, Paolo Motto Ros
2025	—	`conf`	CHIMERA: Cryptographic Hardware for Integrated Multipurpose Engine on RISC-V with ASCON. ISVLSI Alessandra Dolmeta, Valeria Piscopo, Maurizio Martina, Guido Masera
2025	J	`jnl`	HORCRUX - A Lightweight PQC-RISC-V eXtension Architecture. IACR Cryptol. ePrint Arch. Alessandra Dolmeta, Valeria Piscopo, Guido Masera, Maurizio Martina, Michael Hutter
2025	—	`conf`	Just TestIt! An SBST Approach To Automate System-Integration Testing. CF (Companion) Tommaso Terzano, Luigi Giuffrida, Juan Sapriza, Pasquale Davide Schiavone, Guido Masera, David Atienza, Luciano Lavagno, Maurizio Martina
2025	J	`jnl`	Just TestIt! An SBST Approach To Automate System-Integration Testing. CoRR Tommaso Terzano, Luigi Giuffrida, Juan Sapriza, Pasquale Davide Schiavone, Guido Masera, David Atienza, Luciano Lavagno, Maurizio Martina
2025	C	`conf`	RISC-V Based Keccak Co-Processor for NIST Post-Quantum Cryptography Standards. ISCAS Alessandra Dolmeta, Valeria Piscopo, Mattia Mirigaldi, Maurizio Martina, Guido Masera
2025	C	`conf`	Scalability analysis of multi-bank near-memory computing in low-power SoCs. VLSI-SoC Luigi Giuffrida, Pasquale Davide Schiavone, Michele Caon, Guido Masera, Maurizio Martina, David Atienza
2025	J	`jnl`	Scalable and RISC-V Programmable Near-Memory Computing Architectures for Edge Nodes. IEEE Trans. Emerg. Top. Comput. Michele Caon, Clément Choné, Pasquale Davide Schiavone, Alexandre Levisse, Guido Masera, Maurizio Martina, David Atienza
2025	—	`conf`	Stop Wasting your Cache! Bringing Machine Learning into Cache Computing. CF (Companion) Vincenzo Petrolo, Flavia Guella, Michele Caon, Guido Masera, Maurizio Martina
2025	A	`conf`	TYRCA: A RISC-V Tightly-Coupled Accelerator for Code-Based Cryptography. DATE Alessandra Dolmeta, Stefano Di Matteo, Emanuele Valea, Mikael Carmona, Antoine Loiseau, Maurizio Martina, Guido Masera
2025	B	`conf`	TinyCL: An Efficient Hardware Architecture for Continual Learning on Autonomous Systems. IJCNN Eugenio Ressa, Alberto Marchisio, Maurizio Martina, Guido Masera, Muhammad Shafique
2024	—	`conf`	A Case Study on Formal Equivalence Verification Between a C/C++ Model and Its RTL Design. FM (2) Gaetano Raia, Gianluca Rigano, David Vincenzoni, Maurizio Martina
2024	J	`jnl`	ATHOS: A Hybrid Accelerator for PQC CRYSTALS-Algorithms Exploiting New CV-X-IF Interface. IEEE Access Alessandra Dolmeta, Maurizio Martina, Guido Masera
2024	—	`conf`	Exploring the New CV-X-IF Interface to Customize RISC-V Instruction Sets: A Case of Study in Cryptography. ApplePies Alessandra Dolmeta, Maurizio Martina, Guido Masera
2024	—	`conf`	Implementation and integration of NTT/INTT accelerator on RISC-V for CRYSTALS-Kyber. CF (Companion) Alessandra Dolmeta, Emanuele Valpreda, Maurizio Martina, Guido Masera
2024	J	`jnl`	MARLIN: A Co-Design Methodology for Approximate ReconfigurabLe Inference of Neural Networks at the Edge. IEEE Trans. Circuits Syst. I Regul. Pap. Flavia Guella, Emanuele Valpreda, Michele Caon, Guido Masera, Maurizio Martina
2024	—	`conf`	Performance Comparison: Software vs. Hardware Implementation of Novel S-Box Designed to Resist Power Analysis Attack. ApplePies Mattia Mirigaldi, Maurizio Martina, Guido Masera
2024	—	`conf`	Performance evaluation of acceleration of convolutional layers on OpenEdgeCGRA. CF (Companion) Nicolò Carpentieri, Juan Sapriza, Pasquale Davide Schiavone, Daniele Jahier Pagliari, David Atienza, Maurizio Martina, Alessio Burrello
2024	J	`jnl`	Performance evaluation of acceleration of convolutional layers on OpenEdgeCGRA. CoRR Nicolò Carpentieri, Juan Sapriza, Pasquale Davide Schiavone, Daniele Jahier Pagliari, David Atienza, Maurizio Martina, Alessio Burrello
2024	J	`jnl`	Scalable and RISC-V Programmable Near-Memory Computing Architectures for Edge Nodes. CoRR Michele Caon, Clément Choné, Pasquale Davide Schiavone, Alexandre Levisse, Guido Masera, Maurizio Martina, David Atienza
2024	—	`conf`	Seeing Beyond the Order: a LEN5 to Sharpen Edge Microprocessors with Dynamic Scheduling. CF (Companion) Michele Caon, Vincenzo Petrolo, Mattia Mirigaldi, Flavia Guella, Guido Masera, Maurizio Martina
2024	J	`jnl`	TinyCL: An Efficient Hardware Architecture for Continual Learning on Autonomous Systems. CoRR Eugenio Ressa, Alberto Marchisio, Maurizio Martina, Guido Masera, Muhammad Shafique
2024	C	`conf`	VirtLAB-UI: An Open, Platform Independent, Software and Firmware Solution for Remote and Take-Home Labs. EDUCON Massimo Ruo Roch, Maurizio Martina
2023	J	`jnl`	A Flexible NTT-Based Multiplier for Post-Quantum Cryptography. IEEE Access Kristjane Koleci, Paolo Mazzetti, Maurizio Martina, Guido Masera
2023	J	`jnl`	A Homomorphic Encryption Framework for Privacy-Preserving Spiking Neural Networks. CoRR Farzad Nikfam, Raffaele Casaburi, Alberto Marchisio, Maurizio Martina, Muhammad Shafique
2023	J	`jnl`	A Homomorphic Encryption Framework for Privacy-Preserving Spiking Neural Networks. Inf. Farzad Nikfam, Raffaele Casaburi, Alberto Marchisio, Maurizio Martina, Muhammad Shafique
2023	—	`conf`	A Low Cost Open Platform for Development and Performance Evaluation of IoT and IIoT Systems. ApplePies Massimo Ruo Roch, Maurizio Martina
2023	J	`jnl`	Architectural Comparison Model for Area-Efficient PMAP Turbo-Decoders. IEEE Trans. Circuits Syst. II Express Briefs Simone Favero, Maurizio Martina, Guido Masera
2023	J	`jnl`	Comparative Study of Keccak SHA-3 Implementations. Cryptogr. Alessandra Dolmeta, Maurizio Martina, Guido Masera
2023	—	`conf`	ERODE: Error Resilient Object DetEction by Recovering Bounding Box and Class Information. PRIME Emanuele Valpreda, Giuseppe Palumbo, Michele Caon, Guido Masera, Maurizio Martina
2023	—	`conf`	Hardware architecture for CRYSTALS-Kyber post-quantum cryptographic SHA-3 primitives. PRIME Alessandra Dolmeta, Maurizio Martina, Guido Masera
2023	—	`conf`	Implementation and integration of Keccak accelerator on RISC-V for CRYSTALS-Kyber. CF Alessandra Dolmeta, Mattia Mirigaldi, Maurizio Martina, Guido Masera
2023	—	`conf`	LOKI Low-Latency Open-Source Kyber-Accelerator IPs. ApplePies Alessandra Dolmeta, Mattia Mirigaldi, Maurizio Martina, Guido Masera
2023	—	`conf`	RISC-V Processor Technologies for Aerospace Applications in the ISOLDE Project. SAMOS William Fornaciari, Federico Reghenzani, Giovanni Agosta, Davide Zoni, Andrea Galimberti, Francesco Conti, Yvan Tortorella, Emanuele Parisi, Francesco Barchi, Andrea Bartolini, Andrea Acquaviva, Daniele Gregori, Salvatore Cognetta, Carlo Ciancarelli, Antonio Leboffe, Paolo Serri, Alessio Burrello, Daniele Jahier Pagliari, Gianvito Urgese, Maurizio Martina, Guido Masera, Rosario Di Carlo, Antonio Sciarappa
2023	B	`conf`	RobCaps: Evaluating the Robustness of Capsule Networks against Affine Transformations and Adversarial Attacks. IJCNN Alberto Marchisio, Antonio De Marco, Alessio Colucci, Maurizio Martina, Muhammad Shafique
2023	J	`jnl`	RobCaps: Evaluating the Robustness of Capsule Networks against Affine Transformations and Adversarial Attacks. CoRR Alberto Marchisio, Antonio De Marco, Alessio Colucci, Maurizio Martina, Muhammad Shafique
2023	J	`jnl`	SeVuc: A study on the Security Vulnerabilities of Capsule Networks against adversarial attacks. Microprocess. Microsystems Alberto Marchisio, Giorgio Nanfa, Faiq Khalid, Muhammad Abdullah Hanif, Maurizio Martina, Muhammad Shafique
2023	B	`conf`	SwiftTron: An Efficient Hardware Accelerator for Quantized Transformers. IJCNN Alberto Marchisio, Davide Dura, Maurizio Capra, Maurizio Martina, Guido Masera, Muhammad Shafique
2023	J	`jnl`	SwiftTron: An Efficient Hardware Accelerator for Quantized Transformers. CoRR Alberto Marchisio, Davide Dura, Maurizio Capra, Maurizio Martina, Guido Masera, Muhammad Shafique
2023	—	`conf`	TEMET: Truncated REconfigurable Multiplier with Error Tuning. ApplePies Flavia Guella, Emanuele Valpreda, Michele Caon, Guido Masera, Maurizio Martina
2022	—	`conf`	A Side Channel Attack Methodology Applied to Code-Based Post Quantum Cryptography. ApplePies Kristjane Koleci, Lorenzo Cecchetti, Guido Masera, Maurizio Martina, Massimo Ruo Roch
2022	J	`jnl`	AccelAT: A Framework for Accelerating the Adversarial Training of Deep Neural Networks Through Accuracy Gradient. IEEE Access Farzad Nikfam, Alberto Marchisio, Maurizio Martina, Muhammad Shafique
2022	J	`jnl`	AccelAT: A Framework for Accelerating the Adversarial Training of Deep Neural Networks through Accuracy Gradient. CoRR Farzad Nikfam, Alberto Marchisio, Maurizio Martina, Muhammad Shafique
2022	A	`conf`	AnaCoNGA: Analytical HW-CNN Co-Design Using Nested Genetic Algorithms. DATE Nael Fasfous, Manoj Rohit Vemparala, Alexander Frickenstein, Emanuele Valpreda, Driton Salihu, Julian Höfer, Anmol Singh, Naveen Shankar Nagaraja, Hans-Jörg Vögel, Nguyen Anh Vu Doan, Maurizio Martina, Jürgen Becker, Walter Stechele
2022	B	`conf`	CoNLoCNN: Exploiting Correlation and Non-Uniform Quantization for Energy-Efficient Low-precision Deep Convolutional Neural Networks. IJCNN Muhammad Abdullah Hanif, Giuseppe Maria Sarda, Alberto Marchisio, Guido Masera, Maurizio Martina, Muhammad Shafique
2022	J	`jnl`	CoNLoCNN: Exploiting Correlation and Non-Uniform Quantization for Energy-Efficient Low-precision Deep Convolutional Neural Networks. CoRR Muhammad Abdullah Hanif, Giuseppe Maria Sarda, Alberto Marchisio, Guido Masera, Maurizio Martina, Muhammad Shafique
2022	A	`conf`	Enabling Capsule Networks at the Edge through Approximate Softmax and Squash Operations. ISLPED Alberto Marchisio, Beatrice Bussolino, Edoardo Salvati, Maurizio Martina, Guido Masera, Muhammad Shafique
2022	J	`jnl`	Enabling Capsule Networks at the Edge through Approximate Softmax and Squash Operations. CoRR Alberto Marchisio, Beatrice Bussolino, Edoardo Salvati, Maurizio Martina, Guido Masera, Muhammad Shafique
2022	J	`jnl`	HW-Flow: A Multi-Abstraction Level HW-CNN Codesign Pruning Methodology. Leibniz Trans. Embed. Syst. Manoj Rohit Vemparala, Nael Fasfous, Alexander Frickenstein, Emanuele Valpreda, Manfredi Camalleri, Qi Zhao, Christian Unger, Naveen Shankar Nagaraja, Maurizio Martina, Walter Stechele
2022	J	`jnl`	Hand Gestures Recognition for Human-Machine Interfaces: A Low-Power Bio-Inspired Armband. IEEE Trans. Biomed. Circuits Syst. Andrea Mongardi, Fabio Rossi, Andrea Prestia, Paolo Motto Ros, Massimo Ruo Roch, Maurizio Martina, Danilo Demarchi
2022	A	`conf`	LaneSNNs: Spiking Neural Networks for Lane Detection on the Loihi Neuromorphic Processor. IROS Alberto Viale, Alberto Marchisio, Maurizio Martina, Guido Masera, Muhammad Shafique
2022	J	`jnl`	LaneSNNs: Spiking Neural Networks for Lane Detection on the Loihi Neuromorphic Processor. CoRR Alberto Viale, Alberto Marchisio, Maurizio Martina, Guido Masera, Muhammad Shafique
2022	A	`conf`	Mind the Scaling Factors: Resilience Analysis of Quantized Adversarially Robust CNNs. DATE Nael Fasfous, Lukas Frickenstein, Michael Neumeier, Manoj Rohit Vemparala, Alexander Frickenstein, Emanuele Valpreda, Maurizio Martina, Walter Stechele
2022	J	`jnl`	Motion Analysis for Experimental Evaluation of an Event-Driven FES System. IEEE Trans. Biomed. Circuits Syst. Andrea Prestia, Fabio Rossi, Andrea Mongardi, Paolo Motto Ros, Massimo Ruo Roch, Maurizio Martina, Danilo Demarchi
2022	B	`conf`	NLCMAP: A Framework for the Efficient Mapping of Non-Linear Convolutional Neural Networks on FPGA Accelerators. ICIP Giuseppe Aiello, Beatrice Bussolino, Emanuele Valpreda, Massimo Ruo Roch, Guido Masera, Maurizio Martina, Stefano Marsi
2022	J	`jnl`	RoHNAS: A Neural Architecture Search Framework With Conjoint Optimization for Adversarial Robustness and Hardware Efficiency of Convolutional and Capsule Networks. IEEE Access Alberto Marchisio, Vojtech Mrazek, Andrea Massa, Beatrice Bussolino, Maurizio Martina, Muhammad Shafique
2022	J	`jnl`	RoHNAS: A Neural Architecture Search Framework with Conjoint Optimization for Adversarial Robustness and Hardware Efficiency of Convolutional and Capsule Networks. CoRR Alberto Marchisio, Vojtech Mrazek, Andrea Massa, Beatrice Bussolino, Maurizio Martina, Muhammad Shafique
2022	J	`jnl`	VirtLAB: A Low-Cost Platform for Electronics Lab Experiments. Sensors Massimo Ruo Roch, Maurizio Martina
2022	B	`conf`	fakeWeather: Adversarial Attacks for Deep Neural Networks Emulating Weather Conditions on the Camera Lens of Autonomous Systems. IJCNN Alberto Marchisio, Giovanni Caramia, Maurizio Martina, Muhammad Shafique
2022	J	`jnl`	fakeWeather: Adversarial Attacks for Deep Neural Networks Emulating Weather Conditions on the Camera Lens of Autonomous Systems. CoRR Alberto Marchisio, Giovanni Caramia, Maurizio Martina, Muhammad Shafique
2021	—	`conf`	A Low Cost Compact Output Amplifier for Multichannel Muscle Stimulation. ApplePies Massimo Ruo Roch, Maurizio Martina
2021	—	`conf`	A Multi-Precision Bit-Serial Hardware Accelerator IP for Deep Learning Enabled Internet-of-Things. MWSCAS Maurizio Capra, Francesco Conti, Maurizio Martina
2021	C	`conf`	Analysis of in Vivo Plant Stem Impedance Variations in Relation with External Conditions Daily Cycle. ISCAS Umberto Garlando, Lee Bar-On, Paolo Motto Ros, Alessandro Sanginario, Stefano Calvo, Maurizio Martina, Adi Avni, Yosi Shacham-Diamand, Danilo Demarchi
2021	B	`conf`	CarSNN: An Efficient Spiking Neural Network for Event-Based Autonomous Cars on the Loihi Neuromorphic Research Processor. IJCNN Alberto Viale, Alberto Marchisio, Maurizio Martina, Guido Masera, Muhammad Shafique
2021	J	`jnl`	CarSNN: An Efficient Spiking Neural Network for Event-Based Autonomous Cars on the Loihi Neuromorphic Research Processor. CoRR Alberto Viale, Alberto Marchisio, Maurizio Martina, Guido Masera, Muhammad Shafique
2021	B	`conf`	DVS-Attacks: Adversarial Attacks on Dynamic Vision Sensors for Spiking Neural Networks. IJCNN Alberto Marchisio, Giacomo Pira, Maurizio Martina, Guido Masera, Muhammad Shafique
2021	J	`jnl`	DVS-Attacks: Adversarial Attacks on Dynamic Vision Sensors for Spiking Neural Networks. CoRR Alberto Marchisio, Giacomo Pira, Maurizio Martina, Guido Masera, Muhammad Shafique
2021	J	`jnl`	Efficient Hardware Implementation of the LEDAcrypt Decoder. IEEE Access Kristjane Koleci, Paolo Santini, Marco Baldi, Franco Chiaraluce, Maurizio Martina, Guido Masera
2021	J	`jnl`	HW-FlowQ: A Multi-Abstraction Level HW-CNN Co-design Quantization Methodology. ACM Trans. Embed. Comput. Syst. Nael Fasfous, Manoj Rohit Vemparala, Alexander Frickenstein, Emanuele Valpreda, Driton Salihu, Nguyen Anh Vu Doan, Christian Unger, Naveen Shankar Nagaraja, Maurizio Martina, Walter Stechele
2021	C	`conf`	High-Level Synthesis of a Single/Multi-Band Optical and SAR Image Compression and Encryption Hardware Accelerator. IGARSS Paolo Motto Ros, Michele Caon, Tiziano Bianchi, Maurizio Martina, Enrico Magli
2021	—	`conf`	Live Demonstration: Event-Driven Hand Gesture Recognition for Wearable Human-Machine Interface. BioCAS Martina Becchio, Niccoló Voster, Andrea Prestia, Andrea Mongardi, Fabio Rossi, Paolo Motto Ros, Massimo Ruo Roch, Maurizio Martina, Danilo Demarchi
2021	—	`conf`	Low Latency Protocols Investigation for Event-Driven Wireless Body Area Networks. BioCAS Andrea Mongardi, Fabio Rossi, Elia Pellegrino, Paolo Motto Ros, Massimo Ruo Roch, Maurizio Martina
2021	A	`conf`	R-SNN: An Analysis and Design Methodology for Robustifying Spiking Neural Networks against Adversarial Attacks through Noise Filters for Dynamic Vision Sensors. IROS Alberto Marchisio, Giacomo Pira, Maurizio Martina, Guido Masera, Muhammad Shafique
2021	J	`jnl`	R-SNN: An Analysis and Design Methodology for Robustifying Spiking Neural Networks against Adversarial Attacks through Noise Filters for Dynamic Vision Sensors. CoRR Alberto Marchisio, Giacomo Pira, Maurizio Martina, Guido Masera, Muhammad Shafique
2021	J	`jnl`	Real-time implementation of fast discriminative scale space tracking algorithm. J. Real Time Image Process. Walid Walid, Muhammad Awais, Ashfaq Ahmed, Guido Masera, Maurizio Martina
2021	J	`jnl`	Smart Portable Pen for Continuous Monitoring of Anaesthetics in Human Serum With Machine Learning. IEEE Trans. Biomed. Circuits Syst. Simone Aiassa, Paolo Motto Ros, Ivan Ny Hanitra, Davide Tunzi, Maurizio Martina, Sandro Carrara, Danilo Demarchi
2021	C	`conf`	Very Low Latency Architecture for Earth Observation Satellite Onboard Data Handling, Compression, and Encryption. IGARSS Michele Caon, Paolo Motto Ros, Maurizio Martina, Tiziano Bianchi, Enrico Magli, Francisco Membibre, Alexis Ramos, Antonio LaTorre, Murray Kerr, Stefan Wiehle, Helko Breit, Dominik Günzel, Srikanth Mandapati, Ulrich Balss, Björn Tings
2020	Misc	`conf`	A Fast Design Space Exploration Framework for the Deep Learning Accelerators: Work-in-Progress. CODES+ISSS Alessio Colucci, Alberto Marchisio, Beatrice Bussolino, Vojtech Mrazek, Maurizio Martina, Guido Masera, Muhammad Shafique
2020	—	`conf`	A Hardware Implementation for Code-based Post-quantum Asymmetric Cryptography. ITASEC Kristjane Koleci, Marco Baldi, Maurizio Martina, Guido Masera
2020	J	`jnl`	An Area-Efficient Variable-Size Fixed-Point DCT Architecture for HEVC Encoding. IEEE Trans. Circuits Syst. Video Technol. Maurizio Masera, Guido Masera, Maurizio Martina
2020	B	`conf`	An Efficient Spiking Neural Network for Recognizing Gestures with a DVS Camera on the Loihi Neuromorphic Processor. IJCNN Riccardo Massa, Alberto Marchisio, Maurizio Martina, Muhammad Shafique
2020	J	`jnl`	An Efficient Spiking Neural Network for Recognizing Gestures with a DVS Camera on the Loihi Neuromorphic Processor. CoRR Riccardo Massa, Alberto Marchisio, Maurizio Martina, Muhammad Shafique
2020	J	`jnl`	An Updated Survey of Efficient Hardware Architectures for Accelerating Deep Convolutional Neural Networks. Future Internet Maurizio Capra, Beatrice Bussolino, Alberto Marchisio, Muhammad Shafique, Guido Masera, Maurizio Martina
2020	J	`jnl`	Assessing the Feasibility of Augmenting Fall Detection Systems by Relying on UWB-Based Position Tracking and a Home Robot. Sensors Maurizio Capra, Stefano Sapienza, Paolo Motto Ros, Alessio Serrani, Maurizio Martina, Alessandro Puiatti, Paolo Bonato, Danilo Demarchi
2020	B	`conf`	FasTrCaps: An Integrated Framework for Fast yet Accurate Training of Capsule Networks. IJCNN Alberto Marchisio, Beatrice Bussolino, Alessio Colucci, Muhammad Abdullah Hanif, Maurizio Martina, Guido Masera, Muhammad Shafique
2020	J	`jnl`	Guest editorial: Special issue on intelligent embedded systems architectures and applications (INTESA). Microprocess. Microsystems Maurizio Martina, William Fornaciari
2020	J	`jnl`	Hardware and Software Optimizations for Accelerating Deep Neural Networks: Survey of Current Trends, Challenges, and the Road Ahead. IEEE Access Maurizio Capra, Beatrice Bussolino, Alberto Marchisio, Guido Masera, Maurizio Martina, Muhammad Shafique
2020	J	`jnl`	Hardware and Software Optimizations for Accelerating Deep Neural Networks: Survey of Current Trends, Challenges, and the Road Ahead. CoRR Maurizio Capra, Beatrice Bussolino, Alberto Marchisio, Guido Masera, Maurizio Martina, Muhammad Shafique
2020	B	`conf`	Is Spiking Secure? A Comparative Study on the Security Vulnerabilities of Spiking and Deep Neural Networks. IJCNN Alberto Marchisio, Giorgio Nanfa, Faiq Khalid, Muhammad Abdullah Hanif, Maurizio Martina, Muhammad Shafique
2020	J	`jnl`	Low-Complexity Reconfigurable DCT-V Architecture. IEEE Trans. Circuits Syst. Jurgen Kello, Massimo Ruo Roch, Guido Masera, Maurizio Martina
2020	A*	`conf`	NACU: A Non-Linear Arithmetic Unit for Neural Networks. DAC Guido Baccelli, Dimitrios Stathis, Ahmed Hemani, Maurizio Martina
2020	A	`conf`	NASCaps: A Framework for Neural Architecture Search to Optimize the Accuracy and Hardware Efficiency of Convolutional Capsule Networks. ICCAD Alberto Marchisio, Andrea Massa, Vojtech Mrazek, Beatrice Bussolino, Maurizio Martina, Muhammad Shafique
2020	J	`jnl`	NASCaps: A Framework for Neural Architecture Search to Optimize the Accuracy and Hardware Efficiency of Convolutional Capsule Networks. CoRR Alberto Marchisio, Andrea Massa, Vojtech Mrazek, Beatrice Bussolino, Maurizio Martina, Muhammad Shafique
2020	B	`conf`	NeuroAttack: Undermining Spiking Neural Networks Security through Externally Triggered Bit-Flips. IJCNN Valerio Venceslai, Alberto Marchisio, Ihsen Alouani, Maurizio Martina, Muhammad Shafique
2020	J	`jnl`	NeuroAttack: Undermining Spiking Neural Networks Security through Externally Triggered Bit-Flips. CoRR Valerio Venceslai, Alberto Marchisio, Ihsen Alouani, Maurizio Martina, Muhammad Shafique
2020	A*	`conf`	Q-CapsNets: A Specialized Framework for Quantizing Capsule Networks. DAC Alberto Marchisio, Beatrice Bussolino, Alessio Colucci, Maurizio Martina, Guido Masera, Muhammad Shafique
2020	J	`jnl`	Q-CapsNets: A Specialized Framework for Quantizing Capsule Networks. CoRR Alberto Marchisio, Beatrice Bussolino, Alessio Colucci, Maurizio Martina, Guido Masera, Muhammad Shafique
2020	J	`jnl`	Steerable-Discrete-Cosine-Transform (SDCT): Hardware Implementation and Performance Analysis. Sensors Riccardo Peloso, Maurizio Capra, Luigi Sole, Massimo Ruo Roch, Guido Masera, Maurizio Martina
2020	C	`conf`	Towards Optimal Green Plant Irrigation: Watering and Body Electrical Impedance. ISCAS Umberto Garlando, Lee Bar-On, Paolo Motto Ros, Alessandro Sanginario, Sebastian Peradotto, Yosi Shacham-Diamand, Adi Avni, Maurizio Martina, Danilo Demarchi
2020	—	`conf`	vrLab: A Virtual and Remote Low Cost Electronics Lab Platform. ApplePies Massimo Ruo Roch, Maurizio Martina
2019	—	`conf`	3D-HEVC Neighboring Block Based Disparity Vector (NBDV) Derivation Architecture: Complexity and Implementation Analysis. ApplePies Waqar Ahmad, Naveed Khan Baloch, Fawad Hussain, Muhammad Asif Khan, Maurizio Martina
2019	—	`conf`	A Low-Power Embedded System for Real-Time sEMG based Event-Driven Gesture Recognition. ICECS Andrea Mongardi, Paolo Motto Ros, Fabio Rossi, Massimo Ruo Roch, Maurizio Martina, Danilo Demarchi
2019	Misc	`conf`	A Novel Framework for Designing Directional Linear Transforms with Application to Video Compression. ICASSP Maurizio Masera, Giulia Fracastoro, Maurizio Martina, Enrico Magli
2019	J	`jnl`	CapsAttacks: Robust and Imperceptible Adversarial Attacks on Capsule Networks. CoRR Alberto Marchisio, Giorgio Nanfa, Faiq Khalid, Muhammad Abdullah Hanif, Maurizio Martina, Muhammad Shafique
2019	J	`jnl`	Edge Computing: A Survey On the Hardware Requirements in the Internet of Things World. Future Internet Maurizio Capra, Riccardo Peloso, Guido Masera, Massimo Ruo Roch, Maurizio Martina
2019	—	`ed.`	INTESA 2019 Proceedings - INTelligent Embedded Systems Architectures and Applications Workshop, New York, NY, USA, October 13-18, 2019 INTESA Maurizio Martina, William Fornaciari, Federico Reghenzani
2019	—	`conf`	Impulse-Based Asynchronous Serial Communication Protocol on Optical Fiber Link for AER Systems. ICECS Andrea De Marcellis, Guido Di Patrizio Stanchieri, Paolo Motto Ros, Maurizio Martina, Danilo Demarchi, Chiara Bartolozzi, Marco Faccio, Elia Palange
2019	C	`conf`	Live Demonstration: Event-Driven Serial Communication on Optical Fiber. ISCAS Andrea De Marcellis, Guido Di Patrizio Stanchieri, Marco Faccio, Elia Palange, Paolo Motto Ros, Maurizio Martina, Danilo Demarchi, Chiara Bartolozzi
2019	—	`conf`	Live Demonstration: Low Power Embedded System for Event-Driven Hand Gesture Recognition. BioCAS Andrea Mongardi, Fabio Rossi, Paolo Motto Ros, Alessandro Sanginario, Massimo Ruo Roch, Maurizio Martina, Danilo Demarchi
2019	J	`jnl`	On the Effect of Approximate-Computing in Motion Estimation. J. Low Power Electron. Alberto Paltrinieri, Riccardo Peloso, Guido Masera, Muhammad Shafique, Maurizio Martina
2019	J	`jnl`	SNN under Attack: are Spiking Deep Belief Networks vulnerable to Adversarial Examples? CoRR Alberto Marchisio, Giorgio Nanfa, Faiq Khalid, Muhammad Abdullah Hanif, Maurizio Martina, Muhammad Shafique
2019	—	`conf`	VLSI Architectures for the Steerable-Discrete-Cosine-Transform (SDCT). ApplePies Luigi Sole, Riccardo Peloso, Maurizio Capra, Massimo Ruo Roch, Guido Masera, Maurizio Martina
2019	J	`jnl`	X-TrainCaps: Accelerated Training of Capsule Nets through Lightweight Software Optimizations. CoRR Alberto Marchisio, Beatrice Bussolino, Alessio Colucci, Muhammad Abdullah Hanif, Maurizio Martina, Guido Masera, Muhammad Shafique
2018	—	`conf`	A Low Cost ALS and VLC Circuit for Solid State Lighting. ApplePies Massimo Ruo Roch, Maurizio Martina
2018	J	`jnl`	A Methodology for Automatic Selection of Activation Functions to Design Hybrid Deep Neural Networks. CoRR Alberto Marchisio, Muhammad Abdullah Hanif, Semeen Rehman, Maurizio Martina, Muhammad Shafique
2018	—	`conf`	An Optimized Partial-Distortion-Elimination Based Sum-of-Absolute-Differences Architecture for High-Efficiency-Video-Coding. ApplePies Paolo Selvo, Maurizio Masera, Riccardo Peloso, Guido Masera, Muhammad Shafique, Maurizio Martina
2018	—	`conf`	Approximate-Computing Architectures for Motion Estimation in HEVC. NGCAS Alberto Paltrinieri, Riccardo Peloso, Guido Masera, Muhammad Shafique, Maurizio Martina
2018	J	`jnl`	Guest EditorialSpecial Issue on Selected Papers From IEEE BioCAS 2017. IEEE Trans. Biomed. Circuits Syst. Maurizio Martina, Fernando Corinto, Sandro Carrara
2018	C	`conf`	Live Demonstration: Tactile Events from Off-The-Shelf Sensors in a Robotic Skin. ISCAS Chiara Bartolozzi, Paolo Motto Ros, Riccardo Peloso, Francesco Diotalevi, Marco Crepaldi, Maurizio Martina, Danilo Demarchi
2018	—	`ed.`	Proceedings of the Workshop on INTelligent Embedded Systems Architectures and Applications, INTESA@ESWEEK 2018, Turin, Italy, October 04-04, 2018 INTESA@ESWEEK Maurizio Martina, William Fornaciari
2018	B	`conf`	PruNet: Class-Blind Pruning Method For Deep Neural Networks. IJCNN Alberto Marchisio, Muhammad Abdullah Hanif, Maurizio Martina, Muhammad Shafique
2018	J	`jnl`	Selected Articles from the NGCAS 2017 Conference. J. Low Power Electron. Maurizio Valle, Ali Ibrahim, Maurizio Martina, Michele Magno
2017	—	`conf`	A low power architecture for AER event-processing microcontroller. BioCAS Simone Aiassa, Paolo Motto Ros, Guido Masera, Maurizio Martina
2017	J	`jnl`	Adaptive Approximated DCT Architectures for HEVC. IEEE Trans. Circuits Syst. Video Technol. Maurizio Masera, Maurizio Martina, Guido Masera
2017	J	`jnl`	Analysis of HEVC transform throughput requirements for hardware implementations. Signal Process. Image Commun. Maurizio Masera, Lorenzo Re Fiorentin, Enrico Masala, Guido Masera, Maurizio Martina
2017	—	`conf`	Approximate Arai DCT Architecture for HEVC. NGCAS Giovanni Renda, Maurizio Masera, Maurizio Martina, Guido Masera
2017	—	`conf`	Low-Power Hardware Accelerator for Sparse Matrix Convolution in Deep Neural Network. IIH-MSP (1) Erik Anzalone, Maurizio Capra, Riccardo Peloso, Maurizio Martina, Guido Masera
2017	—	`conf`	Odd type DCT/DST for video coding: Relationships and low-complexity implementations. SiPS Maurizio Masera, Maurizio Martina, Guido Masera
2016	—	`conf`	Comparison between HEVC and Thor based on objective and subjective assessments. IWSSIP Lorenzo Re Fiorentin, Maurizio Masera, Sabino Mantovano, Paola Sunna, Guido Masera, Maurizio Martina
2016	J	`jnl`	FPGA Accelerator of Algebraic Quasi Cyclic LDPC Codes for nand Flash Memories. IEEE Des. Test Syed Azhar Ali Zaidi, Abuduwaili Tuoheti, Maurizio Martina, Guido Masera
2016	—	`conf`	High Level Synthesis based FPGA Implementation of H.264/AVC Sub-Pixel Luma Interpolation Filters. EMS Waqar Ahmad, Javed Iqbal, Maurizio Martina, Guido Masera
2015	A	`conf`	An all-digital spike-based ultra-low-power IR-UWB dynamic average threshold crossing scheme for muscle force wireless transmission. DATE Masoud Shahshahani Amirhossein, Paolo Motto Ros, Alberto Bonanno, Marco Crepaldi, Maurizio Martina, Danilo Demarchi, Guido Masera
2015	J	`jnl`	Comments on "Bitwise Log-Likelihood Ratios for Quadrature Amplitude Modulations". IEEE Commun. Lett. Stylianos Papaharalabos, P. Takis Mathiopoulos, Maurizio Martina, Guido Masera
2015	—	`conf`	Complexity and implementation analysis of synthesized view distortion estimation architecture in 3D High Efficiency Video Coding. IC3D Waqar Ahmad, Maurizio Martina, Guido Masera
2015	J	`jnl`	Exploiting generalized de-Bruijn/Kautz topologies for flexible iterative channel code decoder architectures. Integr. Carlo Condo, Maurizio Martina, Massimo Ruo Roch, Guido Masera
2015	—	`conf`	Optimizing the transform complexity-quality tradeoff for hardware-accelerated HEVC video coding. DASIP Maurizio Masera, Lorenzo Re Fiorentin, Maurizio Martina, Guido Masera, Enrico Masala
2015	J	`jnl`	Parallel H.264/AVC Fast Rate-Distortion Optimized Motion Estimation by Using a Graphics Processing Unit and Dedicated Hardware. IEEE Trans. Circuits Syst. Video Technol. Muhammad Usman Shahid, Ashfaq Ahmed, Maurizio Martina, Guido Masera, Enrico Magli
2015	J	`jnl`	Result-Biased Distributed-Arithmetic-Based Filter Architectures for Approximately Computing the DWT. IEEE Trans. Circuits Syst. I Regul. Pap. Maurizio Martina, Guido Masera, Massimo Ruo Roch, Gianluca Piccinini
2015	—	`conf`	Using Information Centric Networking for Mobile Devices Cooperation at the Network Edge. VTC Spring Fabio Malabocchia, Romeo Corgiolu, Maurizio Martina, Andrea Detti, Bruno Ricci, Nicola Blefari-Melazzi
2014	J	`jnl`	A Joint Source/Channel Approach to Strengthen Embedded Programmable Devices against Flash Memory Errors. IEEE Embed. Syst. Lett. Maurizio Martina, Carlo Condo, Guido Masera, Maurizio Zamboni
2014	J	`jnl`	A Parallel Radix-Sort-Based VLSI Architecture for Finding the First W Maximum/Minimum Values. IEEE Trans. Circuits Syst. II Express Briefs Guoping Xiao, Maurizio Martina, Guido Masera, Gianluca Piccinini
2014	—	`conf`	Implementation of a Spread-Spectrum-Based Smart Lighting System on an Embedded Platform. ApplePies Maurizio Martina, Massimo Ruo Roch, Flavio Ghirardi
2014	C	`conf`	Rediscovering Logarithmic Diameter Topologies for Low Latency Network-on-Chip-Based Applications. PDP Carlo Condo, Maurizio Martina, Massimo Ruo Roch, Guido Masera
2014	J	`jnl`	Simplified Log-MAP Algorithm for Very Low-Complexity Turbo Decoder Hardware Architectures. IEEE Trans. Instrum. Meas. Maurizio Martina, Stylianos Papaharalabos, P. Takis Mathiopoulos, Guido Masera
2014	J	`jnl`	VLSI Implementation of a Non-Binary Decoder Based on the Analog Digital Belief Propagation. IEEE Trans. Signal Process. Maurizio Awais, Guido Masera, Maurizio Martina, Guido Montorsi
2014	J	`jnl`	Variable Parallelism Cyclic Redundancy Check Circuit for 3GPP-LTE/LTE-Advanced. IEEE Signal Process. Lett. Carlo Condo, Maurizio Martina, Gianluca Piccinini, Guido Masera
2013	—	`conf`	FPGA accelerator of Quasi cyclic EG-LDPC codes decoder for NAND flash memories. DASIP Syed Azhar Ali Zaidi, Muhammad Awais, Carlo Condo, Maurizio Martina, Guido Masera
2013	J	`jnl`	Improving Network-on-Chip-based Turbo Decoder Architectures. J. Signal Process. Syst. Maurizio Martina, Guido Masera
2013	C	`conf`	VLSI Architecture for Low-Complexity Motion Estimation in H.264 Multiview Video Coding. DSD Ashfaq Ahmed, Muhammad Usman Shahid, Maurizio Martina, Enrico Magli, Guido Masera
2013	J	`jnl`	VLSI Implementation of a Multi-Mode Turbo/LDPC Decoder Architecture. IEEE Trans. Circuits Syst. I Regul. Pap. Carlo Condo, Maurizio Martina, Guido Masera
2012	A	`conf`	A Network-on-Chip-based turbo/LDPC decoder architecture. DATE Carlo Condo, Maurizio Martina, Guido Masera
2012	J	`jnl`	An LDPC Decoder Architecture for Wireless Sensor Network Applications. Sensors Andrea Dario Giancarlo Biroli, Maurizio Martina, Guido Masera
2012	J	`jnl`	An application specific instruction set processor based implementation for signal detection in multiple antenna systems. Microprocess. Microsystems M. Tamagnone, Maurizio Martina, Guido Masera
2012	J	`jnl`	High Speed Architectures for Finding the First two Maximum/Minimum Values. IEEE Trans. Very Large Scale Integr. Syst. Luca Gaetano Amarù, Maurizio Martina, Guido Masera
2012	J	`jnl`	Non-recursive max IET Commun. Stylianos Papaharalabos, Panayiotis Takis Mathiopoulos, Guido Masera, Maurizio Martina
2012	J	`jnl`	On Practical Implementation and Generalizations of max IEEE Trans. Instrum. Meas. Maurizio Martina, Guido Masera, Stylianos Papaharalabos, P. Takis Mathiopoulos, Fotios Gioulekas
2012	—	`conf`	Reducing the memory for iteration-exchanged information and border future metrics in the HomePlug AV turbo decoder implementation. ISTC Lorenzo Guerrieri, Paola Bisaglia, Maurizio Martina, Guido Masera
2012	J	`jnl`	VLSI Circuits, Systems, and Architectures for Advanced Image and Video Compression Standards. VLSI Design Maurizio Martina, Muhammad Shafique, Andrey Norkin
2011	J	`jnl`	Improving Network-on-Chip-based turbo decoder architectures CoRR Maurizio Martina, Guido Masera
2011	J	`jnl`	Multiplierless Mumford and Shah Functional Implementation. Circuits Syst. Signal Process. Maurizio Martina, Guido Masera
2011	J	`jnl`	On chip interconnects for multiprocessor turbo decoding architectures. Microprocess. Microsystems Maurizio Martina, Guido Masera, Hazem Moussa, Amer Baghdadi
2011	J	`jnl`	State Metric Compression Techniques for Turbo Decoder Architectures. IEEE Trans. Circuits Syst. I Regul. Pap. Maurizio Martina, Guido Masera
2010	J	`jnl`	Motion estimation and CABAC VLSI co-processors for real-time high-quality H.264/AVC video coding. Microprocess. Microsystems Sergio Saponara, Maurizio Martina, Michele Casula, Luca Fanucci, Guido Masera
2010	J	`jnl`	Scalable low-complexity B-spline discrete wavelet transform architecture. IET Circuits Devices Syst. Maurizio Martina, Guido Masera, Gianluca Piccinini
2010	J	`jnl`	Turbo NOC: A Framework for the Design of Network-on-Chip-Based Turbo Decoder Architectures. IEEE Trans. Circuits Syst. I Regul. Pap. Maurizio Martina, Guido Masera
2010	J	`jnl`	VLSI Architectures for WIMAX Channel Decoders CoRR Maurizio Martina, Guido Masera
2009	J	`jnl`	Efficient Implementation Techniques for Maximum Likelihood-Based Error Correction for JPEG2000. IEEE Trans. Circuits Syst. Video Technol. Simone Zezza, Saeid Nooshabadi, Maurizio Martina, Guido Masera
2009	J	`jnl`	FPGA implementation of time-frequency analysis algorithms for laser welding monitoring. Microprocess. Microsystems Andrea Molino, Maurizio Martina, Fabrizio Vacca, Guido Masera, Andrea Terreno, Giorgio Pasquettaz, Giuseppe D'Angelo
2009	J	`jnl`	On Optimal and Near-Optimal Turbo Decoding Using Generalized max* Operator. IEEE Commun. Lett. Stylianos Papaharalabos, P. Takis Mathiopoulos, Guido Masera, Maurizio Martina
2009	J	`jnl`	Turbo NOC: a framework for the design of Network On Chip based turbo decoder architectures CoRR Maurizio Martina, Guido Masera
2009	J	`jnl`	Vlsi Implementation of WiMAX Convolutional Turbo Code Encoder and Decoder. J. Circuits Syst. Comput. Maurizio Martina, Mario Nicola, Guido Masera
2008	J	`jnl`	A Flexible UMTS-WiMax Turbo Decoder Architecture. IEEE Trans. Circuits Syst. II Express Briefs Maurizio Martina, Mario Nicola, Guido Masera
2008	J	`jnl`	Corrections to "Multiplierless, Folded 9/7-5/3 Wavelet VLSI Architecture" [Sep 07 770-774]. IEEE Trans. Circuits Syst. II Express Briefs Maurizio Martina, Guido Masera
2008	B	`conf`	Error resilient JPEG2000 decoding for wireless applications. ICIP Simone Zezza, Maurizio Martina, Guido Masera, Saeid Nooshabadi
2008	J	`jnl`	Hardware design of a low complexity, parallel interleaver for WiMax duo-binary turbo decoding. IEEE Commun. Lett. Maurizio Martina, Mario Nicola, Guido Masera
2007	—	`conf`	Flexible blocks for high throughput serially concatenated convolutional codes. ACM Great Lakes Symposium on VLSI Maurizio Martina, Guido Masera
2007	J	`jnl`	Multiplierless, Folded 9/7- 5/3 Wavelet VLSI Architecture. IEEE Trans. Circuits Syst. II Express Briefs Maurizio Martina, Guido Masera
2007	—	`conf`	Real-time implementation of a time-frequency analysis scheme. ACM Great Lakes Symposium on VLSI Maurizio Martina, Andrea Terreno, Fabrizio Vacca, Andrea Molino, Guido Masera, Giuseppe D'Angelo, Giorgio Pasquettaz
2006	—	`conf`	A new approach to compress the configuration information of programmable devices. DATE Designers' Forum Maurizio Martina, Guido Masera, Andrea Molino, Fabrizio Vacca, Luca Sterpone, Massimo Violante
2006	—	`conf`	Error correcting arithmetic coding for JPEG 2000: memory and performance analysis. MobiMedia Simone Zezza, Marco Grangetto, Maurizio Martina, Fabrizio Vacca, Guido Masera
2006	—	`conf`	Hardware co-processors for Real-Time and High-Quality H.264/AVC video coding. EUSIPCO Maurizio Martina, Guido Masera, Luca Fanucci, Sergio Saponara
2006	J	`jnl`	Low-Complexity, Efficient 9/7 Wavelet Filters VLSI Implementation. IEEE Trans. Circuits Syst. II Express Briefs Maurizio Martina, Guido Masera
2006	J	`jnl`	Mumford and Shah Functional: VLSI Analysis and Implementation. IEEE Trans. Pattern Anal. Mach. Intell. Maurizio Martina, Guido Masera
2005	—	`conf`	Low-complexity, efficient 9/7 wavelet filters implementation. ICIP (3) Maurizio Martina, Guido Masera
2004	—	`conf`	A statistical model for estimating the effect of process variations on crosstalk noise. SLIP Maurizio Martina, Guido Masera
2004	—	`—`	System on chip. Maurizio Martina
2003	B	`conf`	A Power-Scalable Motion Estimation Architecture for Energy Constrained Applications. FPL Maurizio Martina, Andrea Molino, Federico Quaglio, Fabrizio Vacca
2003	—	`conf`	A power-scalable motion estimation coprocessor for energy constrained applications. ISSPA (2) Maurizio Martina, Andrea Molino, Federico Quaglio, Fabrizio Vacca
2003	—	`conf`	A reconfigurable, power-scalable rake receiver IP for W-CDMA. ASP-DAC A. Bianco, Alberto Dassatti, Maurizio Martina, Andrea Molino, Fabrizio Vacca
2003	B	`conf`	Design of a Power Conscious, Customizable CDMA Receiver. FPL Maurizio Martina, Andrea Molino, Mario Nicola, Fabrizio Vacca
2003	C	`conf`	Dynamic power scheduling system for JPEG2000 delivery over wireless networks. VCIP Maurizio Martina, Fabrizio Vacca
2003	—	`conf`	FPGA implementation of a reconfigurable SPIHT coprocessor. ISSPA (2) Maurizio Martina, Andrea Molino, Andrea Terreno, Fabrizio Vacca
2003	—	`conf`	Implementation of a SPIHT coprocessor: memory issues and hardware implications. ICIP (2) Maurizio Martina, Andrea Molino, Andrea Terreno, Fabrizio Vacca
2003	J	`jnl`	Novel JPEG 2000 Compliant DWT and IWT VLSI Implementations. J. VLSI Signal Process. Maurizio Martina, Guido Masera, Gianluca Piccinini, Maurizio Zamboni
2003	A	`conf`	Wireless sensor networks: a power-scalable motion estimation IP for hybrid video coding. FPGA Federico Quaglio, Maurizio Martina, Fabrizio Vacca, Guido Masera, Andrea Molino, Gianluca Piccinini, Maurizio Zamboni
2002	—	`conf`	Embedded IWT evaluation in reconfigurable wireless sensor network. ICECS Maurizio Martina, Guido Masera, Gianluca Piccinini, Fabrizio Vacca, Maurizio Zamboni
2002	B	`conf`	Energy Evaluation on a Reconfigurable, Multimedia-Oriented Wireless Sensor. FPL Maurizio Martina, Guido Masera, Gianluca Piccinini, Fabrizio Vacca, Maurizio Zamboni
2002	J	`jnl`	Optimization and implementation of the integer wavelet transform for image coding. IEEE Trans. Image Process. Marco Grangetto, Enrico Magli, Maurizio Martina, Gabriella Olmo
2002	Misc	`conf`	Reconfigurable DSP IP for multimedia applications. ICASSP Maurizio Martina, Guido Masera, Gianluca Piccinini, Fabrizio Vacca, Maurizio Zamboni
2002	—	`conf`	Reconfigurable and low power 2D-DCT IP for ubiquitous multimedia streaming. ICME (2) Maurizio Martina, Andrea Molino, Fabrizio Vacca
2002	—	`conf`	System architecture for error-resilient, embedded JPEG2000 wireless delivery. DSP Maurizio Martina, Guido Masera, Gianluca Piccinini, Fabrizio Vacca, Maurizio Zamboni
2001	—	`conf`	JPEG 2000: finite precision representation and hardware implications. ICECS Maurizio Martina, Guido Masera, Gianluca Piccinini, Fabrizio Vacca, Maurizio Zamboni
2001	—	`conf`	Reconfigurable coprocessor based JPEG 2000 implementation. ICECS Maurizio Martina, Guido Masera, Gianluca Piccinini, Fabrizio Vacca, Maurizio Zamboni