Matthew Fojtik

31 papers A* 3A 1C 1Journal 9Unranked 17

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	31.9 Alpha-Vision: A Real-Time Always-on Vision Processor with 787µs Face Detection Latency in <5mW. ISSCC Ben Keller, Rangharajan Venkatesan, Steve Dai, Jason Clemons, Matthew Fojtik, Muya Chang, Thierry Tambe, Nathaniel Ross Pinckney, Stephen G. Tell, Qijing Huang, Shalini De Mello, Brucek Khailany
2023	J	`jnl`	Machine Learning and Algorithms: Let Us Team Up for EDA. IEEE Des. Test Haoxing Ren, Brucek Khailany, Matthew Fojtik, Yanqing Zhang
2023	—	`conf`	NVCell 2: Routability-Driven Standard Cell Layout in Advanced Nodes with Lattice Graph Routability Model. ISPD Chia-Tung Ho, Alvin Ho, Matthew Fojtik, Minsoo Kim, Shang Wei, Yaguang Li, Brucek Khailany, Haoxing Ren
2021	A*	`conf`	Invited- NVCell: Standard Cell Layout in Advanced Technology Nodes with Reinforcement Learning. DAC Haoxing Ren, Matthew Fojtik
2021	J	`jnl`	NVCell: Standard Cell Layout in Advanced Technology Nodes with Reinforcement Learning. CoRR Haoxing Ren, Matthew Fojtik, Brucek Khailany
2021	J	`jnl`	Simba: scaling deep-learning inference with chiplet-based architecture. Commun. ACM Yakun Sophia Shao, Jason Clemons, Rangharajan Venkatesan, Brian Zimmer, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Brucek Khailany, Stephen W. Keckler
2021	—	`conf`	Standard Cell Routing with Reinforcement Learning and Genetic Algorithm in Advanced Technology Nodes. ASP-DAC Haoxing Ren, Matthew Fojtik
2020	J	`jnl`	A 0.32-128 TOPS, Scalable Multi-Chip-Module-Based Deep Neural Network Inference Accelerator With Ground-Referenced Signaling in 16 nm. IEEE J. Solid State Circuits Brian Zimmer, Rangharajan Venkatesan, Yakun Sophia Shao, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany
2019	—	`conf`	A 0.11 PJ/OP, 0.32-128 Tops, Scalable Multi-Chip-Module-Based Deep Neural Network Accelerator Designed with A High-Productivity vlsi Methodology. Hot Chips Symposium Rangharajan Venkatesan, Yakun Sophia Shao, Brian Zimmer, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany
2019	—	`conf`	A 0.11 pJ/Op, 0.32-128 TOPS, Scalable Multi-Chip-Module-based Deep Neural Network Accelerator with Ground-Reference Signaling in 16nm. VLSI Circuits Brian Zimmer, Rangharajan Venkatesan, Yakun Sophia Shao, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany
2019	—	`conf`	A Fine-Grained GALS SoC with Pausible Adaptive Clocking in 16 nm FinFET. ASYNC Matthew Fojtik, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Stephen G. Tell, Brian Zimmer, Tezaswi Raja, Kevin Zhou, William J. Dally, Brucek Khailany
2019	A	`conf`	MAGNet: A Modular Accelerator Generator for Neural Networks. ICCAD Rangharajan Venkatesan, Yakun Sophia Shao, Miaorong Wang, Jason Clemons, Steve Dai, Matthew Fojtik, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Yanqing Zhang, Brian Zimmer, William J. Dally, Joel S. Emer, Stephen W. Keckler, Brucek Khailany
2019	A*	`conf`	Simba: Scaling Deep-Learning Inference with Multi-Chip-Module-Based Architecture. MICRO Yakun Sophia Shao, Jason Clemons, Rangharajan Venkatesan, Brian Zimmer, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Brucek Khailany, Stephen W. Keckler
2018	A*	`conf`	A modular digital VLSI flow for high-productivity SoC design. DAC Brucek Khailany, Evgeni Khmer, Rangharajan Venkatesan, Jason Clemons, Joel S. Emer, Matthew Fojtik, Alicia Klinefelter, Michael Pellauer, Nathaniel Ross Pinckney, Yakun Sophia Shao, Shreesha Srinath, Christopher Torng, Sam Likun Xi, Yanqing Zhang, Brian Zimmer
2018	—	`conf`	Ground-referenced signaling for intra-chip and short-reach chip-to-chip interconnects. CICC Walker J. Turner, John W. Poulton, John M. Wilson, Xi Chen, Stephen G. Tell, Matthew Fojtik, Thomas H. Greer, Brian Zimmer, Sanquan Song, Nikola Nedovic, Sudhir S. Kudva, Sunil R. Sudhakaran, Rizwan Bashirullah, Wenxu Zhao, William J. Dally, C. Thomas Gray
2016	—	`conf`	Modeling and Analysis of Power Supply Noise Tolerance with Fine-Grained GALS Adaptive Clocks. ASYNC Divya Akella Kamakshi, Matthew Fojtik, Brucek Khailany, Sudhir S. Kudva, Yaping Zhou, Benton H. Calhoun
2015	—	`conf`	A Pausible Bisynchronous FIFO for GALS Systems. ASYNC Ben Keller, Matthew Fojtik, Brucek Khailany
2013	J	`jnl`	A Millimeter-Scale Energy-Autonomous Sensor System With Stacked Battery and Solar Cells. IEEE J. Solid State Circuits Matthew Fojtik, Daeyeon Kim, Gregory K. Chen, Yu-Shiang Lin, David Fick, Junsun Park, Mingoo Seok, Mao-Ter Chen, Zhiyoong Foo, David T. Blaauw, Dennis Sylvester
2013	J	`jnl`	Bubble Razor: Eliminating Timing Margins in an ARM Cortex-M3 Processor in 45 nm CMOS Using Architecturally Independent Error Detection and Correction. IEEE J. Solid State Circuits Matthew Fojtik, David Fick, Yejoong Kim, Nathaniel Ross Pinckney, David Money Harris, David T. Blaauw, Dennis Sylvester
2013	J	`jnl`	Centip3De: A 64-Core, 3D Stacked Near-Threshold System. IEEE Micro Ronald G. Dreslinski, David Fick, Bharan Giridhar, Gyouho Kim, Sangwon Seo, Matthew Fojtik, Sudhir Satpathy, Yoonmyung Lee, Daeyeon Kim, Nurrachman Liu, Michael Wieckowski, Gregory K. Chen, Dennis Sylvester, David T. Blaauw, Trevor N. Mudge
2013	J	`jnl`	Centip3De: A Cluster-Based NTC Architecture With 64 ARM Cortex-M3 Cores in 3D Stacked 130 nm CMOS. IEEE J. Solid State Circuits David Fick, Ronald G. Dreslinski, Bharan Giridhar, Gyouho Kim, Sangwon Seo, Matthew Fojtik, Sudhir Satpathy, Yoonmyung Lee, Daeyeon Kim, Nurrachman Liu, Michael Wieckowski, Gregory K. Chen, Trevor N. Mudge, David T. Blaauw, Dennis Sylvester
2013	J	`jnl`	Centip3De: a many-core prototype exploring 3D integration and near-threshold computing. Commun. ACM Ronald G. Dreslinski, David Fick, Bharan Giridhar, Gyouho Kim, Sangwon Seo, Matthew Fojtik, Sudhir Satpathy, Yoonmyung Lee, Daeyeon Kim, Nurrachman Liu, Michael Wieckowski, Gregory K. Chen, Dennis Sylvester, David T. Blaauw, Trevor N. Mudge
2013	—	`conf`	Pulse amplification based dynamic synchronizers with metastability measurement using capacitance de-rating. CICC Bharan Giridhar, Matthew Fojtik, David Fick, Dennis Sylvester, David T. Blaauw
2012	—	`conf`	A 2.98nW bandgap voltage reference using a self-tuning low leakage sample and hold. VLSIC Yen-Po Chen, Matthew Fojtik, David T. Blaauw, Dennis Sylvester
2012	—	`conf`	Bubble Razor: An architecture-independent approach to timing-error detection and correction. ISSCC Matthew Fojtik, David Fick, Yejoong Kim, Nathaniel Ross Pinckney, David Money Harris, David T. Blaauw, Dennis Sylvester
2012	—	`conf`	Centip3De: A 3930DMIPS/W configurable near-threshold 3D stacked system with 64 ARM Cortex-M3 cores. ISSCC David Fick, Ronald G. Dreslinski, Bharan Giridhar, Gyouho Kim, Sangwon Seo, Matthew Fojtik, Sudhir Satpathy, Yoonmyung Lee, Daeyeon Kim, Nurrachman Liu, Michael Wieckowski, Gregory K. Chen, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw
2012	—	`conf`	Centip3De: A 64-core, 3D stacked, near-threshold system. Hot Chips Symposium Ronald G. Dreslinski, David Fick, Bharan Giridhar, Gyouho Kim, Sangwon Seo, Matthew Fojtik, Sudhir Satpathy, Yoonmyung Lee, Daeyeon Kim, Nurrachman Liu, Michael Wieckowski, Gregory K. Chen, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw
2011	C	`conf`	A 1.85fW/bit ultra low leakage 10T SRAM with speed compensation scheme. ISCAS Daeyeon Kim, Gregory K. Chen, Matthew Fojtik, Mingoo Seok, David T. Blaauw, Dennis Sylvester
2010	—	`conf`	Early detection of oxide breakdown through in situ degradation sensing. ISSCC Prashant Singh, Zhiyoong Foo, Michael Wieckowski, Scott Hanson, Matthew Fojtik, David T. Blaauw, Dennis Sylvester
2010	—	`conf`	In situ delay-slack monitor for high-performance processors using an all-digital self-calibrating 5ps resolution time-to-digital converter. ISSCC David Fick, Nurrachman Liu, Zhiyoong Foo, Matthew Fojtik, Jae-sun Seo, Dennis Sylvester, David T. Blaauw
2010	—	`conf`	Millimeter-scale nearly perpetual sensor system with stacked battery and solar cells. ISSCC Gregory K. Chen, Matthew Fojtik, Daeyeon Kim, David Fick, Junsun Park, Mingoo Seok, Mao-Ter Chen, Zhiyoong Foo, Dennis Sylvester, David T. Blaauw