Massimo Violante

181 papers A 15B 14C 34Misc 5Journal 32Unranked 79

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Contactless System for Sleep Prediction in Drivers. IEEE Access Sara Groppo, Michele Guagnano, Valeria Serchi, Gabriel Beltrao, Luigi Pugliese, Massimo Violante
2025	B	`conf`	European Test Symposium Teams: an Anniversary Snapshot. ETS Maksim Jenihhin, Jaan Raik, Artur Jutman, Natalia Cherezova, Raimund Ubar, Liviu Miclea, Szilárd Enyedi, I. Stefan, Ovidiu Stan, Cosmina Corches, Z. Peng, Petru Eles, Rolf Drechsler, S. Eggersglüß, Görschwin Fey, Andreas Glowatz, Daniel Tille, Georges G. E. Gielen, Anthony Coyette, Wim Dobbelaere, Ronny Vanhooren, P.-Y. Chuang, Erik Jan Marinissen, Giorgio Di Natale, M. Barragan, Paolo Maistri, S. Mir, Vatajelu I. Vatajelu, Paolo Bernardi, S. Di Carlo, Paolo Prinetto, Matteo Sonza Reorda, Massimo Violante, Haralampos-G. Stratigopoulos, M. K. Michael, Stelios Neophytou, Stavros Hadjitheophanous, Kyriakos Christou, M. Skitsas, Alberto Bosio, Bastien Deveautour, P. Girard, Marcello Traiola, Arnaud Virazel, F. Fernandes Dos Santos, Angeliki Kritikakou, Gioele Casagranda, Marzio Vallero, Flavio Vella, Paolo Rech, Letícia Maria Bolzani Poehls, Milos Krstic, Marko S. Andjelkovic, F. Vargas, Grigor Tshagharyan, Gurgen Harutyunyan, Valery A. Vardanian, Samvel K. Shoukourian, Yervant Zorian, Jennifer Dworak, Kundan Nepal, Theodore W. Manikas, Mottaqiallah Taouil, Moritz Fieback, Anteneh Gebregiorgis, Rajendra Bishnoi, Said Hamdioui, Abhijit Chatterjee, A. Saha, Suhasini Komarraju, K. Ma, Chandramouli N. Amarnath, Mehdi Baradaran Tahoori, Mahta Mayahinia, Maryam Rajabalipanah, Katayoon Basharkhah, N. Nosrati, Zahra Jahanpeima, Zain Navabi, Hans-Joachim Wunderlich, Sybille Hellebrand
2025	A	`conf`	Improving Software Reliability with Rust: Implementation for Enhanced Control Flow Checking Methods. DATE Jacopo Sini, Mohammadreza Amel Solouki, Massimo Violante, Giorgio Di Natale
2025	—	`conf`	Preliminary Automatic Analysis of Photoplethysmographic and Respiratory Signals for Sleep-Wake Pattern Identification in Young Infants at Risk of SIDS. COINS Sara Groppo, Massimo Violante, Silvia Noce
2025	B	`conf`	Real-Time Driving Risk Assessment Using LSTM-attention and XGBoost with Physiological and Driving Behavior Data. SMC Yecan Wang, Michele Guagnano, Hiroki Taniguchi, Nozomi Nagatani, Hiroshi Ono, Satoru Shinkawa, Sumie Miyamoto, Eriko Hasumi, Katsuhito Fujiu, Madoka Takai, Massimo Violante, Shigenobu Mitsuzawa
2025	C	`conf`	ShapeFuture - Technical Progress After Year 1. DSD Norbert Druml, Martin Gschwandtner, Mayeul Jeannin, Rainer Matischek, Edgars Lielamurs, Maksis Celitans, Kaspars Ozols, Nurullah Demiralay, Besir Tayfur, Ismail Sinan Gulbas, Nadir Kucuk, Isa Kiyat, Yahya Nasolo, Jens Brandt, Noah Christoph Pütz, Thomas Bartz-Beielstein, Jose Isola, Nikola Mandic, Francesca Flamigni, Alexander Kuehhas, Gianluca Brilli, Paolo Burgio, Giacomo Paolieri, Jorge Villagra, Álvaro Flores Cueto, José Antonio Sánchez, Jacopo Sini, Massimo Violante, Lorenzo Giraudi, Paolo Santero, Uwe Kölbel, Moritz Schaffenroth, Panu Sjövall, Jarno Vanne, Morten Larsen, Nergis Gizem Yilmaz, Ziya Uygar Yengin, George Dimitrakopoulos
2024	J	`jnl`	A Novel Approach to Address Random Hardware Failures for Automotive Application Within the ISO26262 and AUTOSAR Frameworks. IEEE Access Jacopo Sini, Kiara Scialabba, Massimo Violante, Francesco Cosimi, Antonio Arena
2024	J	`jnl`	Dependability in Embedded Systems: A Survey of Fault Tolerance Methods and Software-Based Mitigation Techniques. IEEE Access Mohammadreza Amel Solouki, Shaahin Angizi, Massimo Violante
2024	J	`jnl`	Dependability in Embedded Systems: A Survey of Fault Tolerance Methods and Software-Based Mitigation Techniques. CoRR Mohammadreza Amel Solouki, Shaahin Angizi, Massimo Violante
2024	—	`conf`	Enhancing Automotive Embedded Applications: A Comprehensive Evaluation of Control Flow Checking Methods. DTTIS Mohammadreza Amel Solouki, Jacopo Sini, Massimo Violante
2024	C	`conf`	Optimizing Lstm-Based Temperature Prediction Algorithm for Embedded System Deployment. ETFA Pietro d'Agostino, Massimo Violante, Gianpaolo Macario
2024	C	`conf`	WIP: Building an Education Ecosystem for Next Generation Microelectronics Experts in Green and Circular Economy with Digitally-Supported Teaching Methods for Sustainable Chips and Applications (EU Project GreenChips-EDU). FIE Klaus Hofmann, Ferdinand Keil, David Riehl, Alicja Michalowska-Forsyth, Nikolaus Czepl, Sarah Woywod, Dominik Zupan, Mario R. Casu, Carlo Ricciardi, Massimo Violante, Mariagrazia Graziano, Yuri Ardesi, Fabrizio Mo, Dominik Berger, Sabine Sill, Volker Visotschnig, Panagiota Morfouli, Liliana Prejbeanu, Katell Morin-Allory, Cyrille Chavet, Davide Bucci, Skandar Basrour, Jean-Christophe Crebier, Nhu-Huan Nguyen, Ernesto Quisbert-Trujillo, Christian Defélix, Isabelle Corbett-Etchevers, Johannes Sturm, Jens Peter Konrath, Ulla Birnbacher, Thomas Klinger, Wolfgang Werth, Jorge Fernandes, Marcelino B. Santos, Antonio Rubio, Alba Pagès-Zamora, Josep Pegueroles, Jordi Salazar, Beatriz Otero, J. Manuel Moreno, X. Aragones, Israel Martin, Aleix Sole, Dunja Suttnig, Julia Calabro, Floriberto Lima, Eric Jouseau, François Cerisier, Cristian Rivier, Sepp Eisenriegler, Harald Reichl, Miroslav Macan, Dubravko Kruselj, Mladen Puskaric, Mirjana Tatalovic, Vinko Zelenicic, Bernd Deutschmann
2023	—	`conf`	A New Approach to Selectively Control Flow Checking Methods Compliant with ISO 26262. CF Mohammadreza Amel Solouki, Jacopo Sini, Massimo Violante
2023	—	`conf`	A user-extensible solution for deploying fog computing in industrial applications. ISIE Pietro d'Agostino, Massimo Violante, Gianpaolo Macario
2023	—	`conf`	An Embedded Low-Cost Solution for a Fog Computing Device on the Internet of Things. FMEC Pietro d'Agostino, Massimo Violante, Gianpaolo Macario
2023	J	`jnl`	An Experimental Evaluation of Control Flow Checking for Automotive Embedded Applications Compliant With ISO 26262. IEEE Access Mohammadreza Amel Solouki, Jacopo Sini, Massimo Violante
2023	—	`conf`	Guidelines for Implementing Control Flow Checking into Automotive Embedded Applications Developed with C Language. NorCAS Jacopo Sini, Mohammadreza Amel Solouki, Massimo Violante
2023	—	`conf`	Novel Control Flow Checking Implementations for Automotive Software. SMACD Francesco Cosimi, Jacopo Sini, Antonio Arena, Massimo Violante
2023	—	`conf`	Rule-based Sleep-Apnea detection algorithm. IWASI Luigi Pugliese, Michele Guagnano, Sara Groppo, Massimo Violante, Riccardo Groppo
2023	J	`jnl`	Towards In-Cabin Monitoring: A Preliminary Study on Sensors Data Collection and Analysis. CoRR Jacopo Sini, Luigi Pugliese, Sara Groppo, Michele Guagnano, Massimo Violante
2022	J	`jnl`	A Novel Algorithm for Detecting the Drowsiness Onset in Real-Time. IEEE Access Luigi Pugliese, Massimo Violante, Sara Groppo
2022	J	`jnl`	A Novel Redundant Validation IoT System for Affective Learning Based on Facial Expressions and Biological Signals. Sensors Antonio Costantino Marceddu, Luigi Pugliese, Jacopo Sini, Gustavo Ramirez Espinosa, Mohammadreza Amel Solouki, Pietro Chiavassa, Edoardo Giusto, Bartolomeo Montrucchio, Massimo Violante, Francesco De Pace
2022	J	`jnl`	A Simulation-Based Approach to Aid Development of Software-Based Hardware Failure Detection and Mitigation Algorithms of a Mobile Robot System. Sensors Jacopo Sini, Andrea Passarino, Stefano Bonicelli, Massimo Violante
2022	—	`conf`	Effectiveness of Control Flow Checking Algorithms Using a Model-Based Software Design Approach: An Empirical Study. ICECS 2022 Mohammadreza Amel Solouki, Jacopo Sini, Massimo Violante
2022	Misc	`conf`	Use of Facial Expressions to Improve the Social Acceptance of Level 4 and 5 Automated Driving System Equipped Vehicles. SoftCOM Antonio Costantino Marceddu, Jacopo Sini, Bartolomeo Montrucchio, Massimo Violante
2020	—	`conf`	Towards Vehicle-Level Simulator Aided Failure Mode, Effect, and Diagnostic Analysis of Automotive Power Electronics Items. LATS Jacopo Sini, M. D'Auria, Massimo Violante
2019	C	`conf`	A Novel Simulation-Based Approach for ISO 26262 Hazard Analysis and Risk Assessment. IOLTS Jacopo Sini, Massimo Violante, V. Dodde, R. Gnaniah, L. Pecorella
2019	J	`jnl`	RTOS Solution for NoC-Based COTS MPSoC Usage in Mixed-Criticality Systems. J. Electron. Test. Serhiy Avramenko, Massimo Violante
2018	C	`conf`	An Automatic Approach to Perform FMEDA Safety Assessment on Hardware Designs. IOLTS Jacopo Sini, Massimo Violante
2018	—	`conf`	An automatic approach to integration testing for critical automotive software. DTIS Jacopo Sini, A. Mugoni, Massimo Violante, A. Quario, C. Argiri, F. Fusetti
2018	C	`conf`	Computer-Aided Design of Multi-Agent Cyber-Physical Systems. ETFA Jacopo Sini, Massimo Violante, Riccardo Dessì
2018	C	`conf`	Efficient Software-Based Partitioning for Commercial-off-the-Shelf NoC-based MPSoCs for Mixed-Criticality Systems. IOLTS Stefano Esposito, Serhiy Avramenko, Massimo Violante
2018	Misc	`conf`	Innovative practices on quality levels of A/MS devices. VTS Wim Dobbelaere, On Semi, Massimo Violante, Turin Polytechnic, Jeff Rearick
2018	C	`conf`	QoSinNoC: Analysis of QoS-Aware NoC Architectures for Mixed-Criticality Applications. DDECS Serhiy Avramenko, Siavoosh Payandeh Azad, Stefano Esposito, Behrad Niazmand, Massimo Violante, Jaan Raik, Maksim Jenihhin
2018	—	`conf`	RTOS for mixed criticality applications deployed on NoC-based COTS MPSoC. LATS Stefano Esposito, Serhiy Avramenko, Massimo Violante
2018	C	`conf`	Real-Time Validation of Fault-Tolerant Mixed-Criticality Systems. IOLTS Stefano Esposito, Jacopo Sini, Massimo Violante
2018	—	`conf`	Real-time validation of mixed-criticality applications. LATS Stefano Esposito, Jacopo Sini, Massimo Violante
2018	C	`conf`	Towards an automatic approach for hardware verification according to ISO 26262 functional safety standard. IOLTS Jacopo Sini, Matteo Sonza Reorda, Massimo Violante, Peter Sarson
2018	C	`conf`	Upgrading QoSinNoC: Efficient Routing for Mixed-Criticality Applications and Power Analysis. VLSI-SoC Serhiy Avramenko, Siavoosh Payandeh Azad, Behrad Niazmand, Massimo Violante, Jaan Raik, Maksim Jenihhin
2017	J	`jnl`	A High-Level Approach to Analyze the Effects of Soft Errors on Lossless Compression Algorithms. J. Electron. Test. Serhiy Avramenko, Matteo Sonza Reorda, Massimo Violante, Görschwin Fey
2017	J	`jnl`	A Novel Method for Online Detection of Faults Affecting Execution-Time in Multicore-Based Systems. ACM Trans. Embed. Comput. Syst. Stefano Esposito, Massimo Violante, Marco Sozzi, Marco Terrone, Massimo Traversone
2017	—	`conf`	An automatic approach to perform the verification of hardware designs according to the ISO26262 functional safety standard. LATS Enea Bagalini, Jacopo Sini, Matteo Sonza Reorda, Massimo Violante, H. Klimesch, Peter Sarson
2017	C	`conf`	Deterministic network on chip for deploying real time applications on many-core processors. IOLTS Stefano Esposito, Massimo Violante
2017	J	`jnl`	On the Consolidation of Mixed Criticalities Applications on Multicore Architectures. J. Electron. Test. Stefano Esposito, Massimo Violante
2017	—	`conf`	Passengers' Emotions Recognition to Improve Social Acceptance of Autonomous Driving Vehicles. IIH-MSP (1) Jacopo Sini, Antonio Costantino Marceddu, Massimo Violante, Riccardo Dessì
2017	—	`conf`	Towards Making Fault Injection on Abstract Models a More Accurate Tool for Predicting RT-Level Effects. ISVLSI Tino Flenker, Jan Malburg, Görschwin Fey, Serhiy Avramenko, Massimo Violante, Matteo Sonza Reorda
2016	—	`conf`	Analysis of the effects of soft errors on compression algorithms through fault injection inside program variables. LATS Serhiy Avramenko, Matteo Sonza Reorda, Massimo Violante, Görschwin Fey
2016	B	`conf`	Automotive embedded software architecture in the multi-core age. ETS Paolo Gai, Massimo Violante
2016	—	`conf`	On the consolidation of mixed criticalities applications on multicore architectures. LATS Stefano Esposito, Serhiy Avramenko, Massimo Violante
2016	C	`conf`	On the robustness of DCT-based compression algorithms for space applications. IOLTS Serhiy Avramenko, Matteo Sonza Reorda, Massimo Violante, Görschwin Fey, Jan-Gerd Mess, Robert Schmidt
2016	C	`conf`	Online time interference detection in mixed-criticality applications on multicore architectures using performance counters. IOLTS Stefano Esposito, Massimo Violante, Marco Sozzi, Marco Terrone, Massimo Traversone
2015	C	`conf`	An Hybrid Architecture for consolidating mixed criticality applications on multicore systems. IOLTS Serhiy Avramenko, Stefano Esposito, Massimo Violante, Marco Sozzi, Massimo Traversone, Marco Binello, Marco Terrone
2015	J	`jnl`	Designing Autonomous Race Car Models for Learning Advanced Topics in Hard Real-Time System. Int. J. Robotics Appl. Technol. Enea Bagalini, Massimo Violante
2015	—	`conf`	Evaluation of error effects on a biomedical system. EWDTS Enea Bagalini, Massimo Violante, H. Hakobyan
2014	—	`conf`	Early reliability evaluation of a biomédical system. IDT Hakob Hakobyan, Paolo Rech, Matteo Sonza Reorda, Massimo Violante
2013	C	`conf`	A fully-automated flow for ITAR-free rad-hard Atmel FPGAs. IOLTS Nikos Andrikos, Massimo Violante, David Merodio Codinachs
2013	J	`jnl`	Guest Editorial. J. Electron. Test. Prashant D. Joshi, Massimo Violante
2013	—	`conf`	Preface. AHS Khaled Benkrid, Didier Keymeulen, David Merodio, Michael Newell, Rainer Wansch, Umeshkumar D. Patel, Ahmet T. Erdogan, Niels Hadaschik, Luca Sterpone, Jelle Poupaert, Massimo Violante
2012	A	`conf`	An hybrid architecture to detect transient faults in microprocessors: An experimental validation. DATE Salvatore Campagna, Massimo Violante
2012	Misc	`conf`	Embedded Low Power Controller for Autonomous Landing of UAV Using Artificial Neural Network. FIT Ahmad Din, Basilio Bona, Joel Morrissette, Moazzam Hussain, Massimo Violante, M. Fawad Naseem
2012	—	`conf`	High-reliability fault tolerant digital systems in nanometric technologies: Characterization and design methodologies. DFT Cristiana Bolchini, Antonio Miele, Chiara Sandionigi, Marco Ottavi, Salvatore Pontarelli, Adelio Salsano, Cecilia Metra, Martin Omaña, Daniele Rossi, Matteo Sonza Reorda, Luca Sterpone, Massimo Violante, Simone Gerardin, Marta Bagatin, Alessandro Paccagnella
2011	—	`conf`	A Light-Weight Fault Tolerance Framework for Space Computing using COTS Components. ARCS Workshops Salvatore Campagna, Moazzam Hussain, Massimo Violante
2011	J	`jnl`	A Low-Cost Solution for Deploying Processor Cores in Harsh Environments. IEEE Trans. Ind. Electron. Massimo Violante, Cristina Meinhardt, Ricardo Reis, Matteo Sonza Reorda
2011	C	`conf`	A new IP core for fast error detection and fault tolerance in COTS-based solid state mass memories. IOLTS Enrico Costenaro, Massimo Violante, Dan Alexandrescu
2011	J	`jnl`	Coping With the Obsolescence of Safety- or Mission-Critical Embedded Systems Using FPGAs. IEEE Trans. Ind. Electron. Hipólito Guzmán-Miranda, Luca Sterpone, Massimo Violante, Miguel A. Aguirre, Manuel Gutiérrez-Rizo
2011	—	`book`	Reconfigurable Field Programmable Gate Arrays for Mission-Critical Applications. Niccolò Battezzati, Luca Sterpone, Massimo Violante
2010	C	`conf`	A framework to support the design of COTS-based reliable space computers for on-board data handling. IOLTS Salvatore Campagna, Massimo Violante
2010	C	`conf`	A new framework for the automatic insertion of mitigation structures in circuits netlists. IOLTS Niccolò Battezzati, Davide Serrone, Massimo Violante
2010	C	`conf`	A new software tool for static analysis of SET sensitiveness in Flash-based FPGAs. VLSI-SoC Niccolò Battezzati, Luca Sterpone, Massimo Violante, Filomena Decuzzi
2010	B	`conf`	An integrated flow for the design of hardened circuits on SRAM-based FPGAs. ETS Cristiana Bolchini, Antonio Miele, Chiara Sandionigi, Niccolò Battezzati, Luca Sterpone, Massimo Violante
2010	J	`jnl`	Boosting software fault injection for dependability analysis of real-time embedded applications. ACM Trans. Embed. Comput. Syst. Gianpiero Cabodi, Marco Murciano, Massimo Violante
2010	—	`conf`	Hypervisor-Based Virtual Hardware for Fault Tolerance in COTS Processors Targeting Space Applications. DFT Salvatore Campagna, Moazzam Hussain, Massimo Violante
2009	A	`conf`	A low-cost SEE mitigation solution for soft-processors embedded in Systems on Pogrammable Chips. DATE Matteo Sonza Reorda, Massimo Violante, Cristina Meinhardt, Ricardo Reis
2009	C	`conf`	A low-cost solution for developing reliable Linux-based space computers for on-board data handling. IOLTS Massimo Violante, M. L. Esposti
2009	A	`conf`	A study of the Single Event Effects impact on functional mapping within Flash-based FPGAs. DATE Francesco Abate, Luca Sterpone, Massimo Violante, Fernanda Lima Kastensmidt
2009	—	`conf`	An On-board Data-Handling Computer for Deep-Space Exploration Built Using Commercial-Off-the-Shelf SRAM-Based FPGAs. DFT Matteo Sonza Reorda, Massimo Violante, Cristina Meinhardt, Ricardo Reis
2009	—	`conf`	An in-vehicle infotainment software architecture based on google android. SIES Gianpaolo Macario, Marco Torchiano, Massimo Violante
2009	C	`conf`	Application-oriented SEU sensitiveness analysis of Atmel rad-hard FPGAs. IOLTS Niccolò Battezzati, Filomena Decuzzi, Massimo Violante, Michel Briet
2009	—	`conf`	Recovery scheme for hardening system on programmable chips. LATW Cristina Meinhardt, Ricardo Reis, Massimo Violante, Matteo Sonza Reorda
2009	B	`conf`	Soft errors in Flash-based FPGAs: Analysis methodologies and first results. FPL Niccolò Battezzati, Filomena Decuzzi, Luca Sterpone, Massimo Violante
2008	—	`conf`	A new placement algorithm for the optimization of fault tolerant circuits on reconfigurable devices. WREFT@CF Luca Sterpone, Niccolò Battezzati, Massimo Violante
2008	—	`conf`	Coping with Obsolescence of Processor Cores in Critical Applications. DFT Francesco Abate, Massimo Violante
2008	J	`jnl`	Hardware and Software Transparency in the Protection of Programs Against SEUs and SETs. J. Electron. Test. Eduardo Luis Rhod, Carlos Arthur Lang Lisbôa, Luigi Carro, Matteo Sonza Reorda, Massimo Violante
2008	C	`conf`	On the Evaluation of Radiation-Induced Transient Faults in Flash-Based FPGAs. IOLTS Niccolò Battezzati, Simone Gerardin, Andrea Manuzzato, Alessandro Paccagnella, Sana Rezgui, Luca Sterpone, Massimo Violante
2008	J	`jnl`	Software and Hardware Techniques for SEU Detection in IP Processors. J. Electron. Test. Cristiana Bolchini, Antonio Miele, Fabio Rebaudengo, Fabio Salice, Donatella Sciuto, Luca Sterpone, Massimo Violante
2007	—	`conf`	A new decompression system for the configuration process of SRAM-based FPGAS. ACM Great Lakes Symposium on VLSI Luca Sterpone, Massimo Violante
2007	—	`conf`	A new hardware architecture for performing the gridding of DNA microarray images. ACM Great Lakes Symposium on VLSI Luca Sterpone, Massimo Violante
2007	J	`jnl`	Evaluating Different Solutions to Design Fault Tolerant Systems with SRAM-based FPGAs. J. Electron. Test. Luca Sterpone, Matteo Sonza Reorda, Massimo Violante, Fernanda Lima Kastensmidt, Luigi Carro
2007	—	`conf`	Optimization of Self Checking FIR filters by means of Fault Injection Analysis. DFT Salvatore Pontarelli, Luca Sterpone, Gian Carlo Cardarilli, Marco Re, Matteo Sonza Reorda, Adelio Salsano, Massimo Violante
2007	C	`conf`	Self Checking Circuit Optimization by means of Fault Injection Analysis: A Case Study on Reed Solomon Decoders. IOLTS Salvatore Pontarelli, Luca Sterpone, Gian Carlo Cardarilli, Marco Re, Matteo Sonza Reorda, Adelio Salsano, Massimo Violante
2007	—	`conf`	Sensitivity Evaluation of TMR-Hardened Circuits to Multiple SEUs Induced by Alpha Particles in Commercial SRAM-Based FPGAs. DFT Andrea Manuzzato, Paolo Rech, Simone Gerardin, Alessandro Paccagnella, Luca Sterpone, Massimo Violante
2007	B	`conf`	Static and Dynamic Analysis of SEU Effects in SRAM-Based FPGAs. ETS Luca Sterpone, Massimo Violante
2007	—	`conf`	Validating the dependability of embedded systems through fault injection by means of loadable kernel modules. HLDVT Marco Murciano, Massimo Violante
2006	—	`conf`	A Fault Injection Environment for SoPC's Embedded Microprocessors. LATW Marta Portela-García, Luca Sterpone, Celia López-Ongil, Matteo Sonza Reorda, Massimo Violante
2006	—	`conf`	A New Approach to Cope with Single Event Upsets in Processor-based Systems. LATW Massimiliano Schillaci, Matteo Sonza Reorda, Massimo Violante
2006	J	`jnl`	A New Hybrid Fault Detection Technique for Systems-on-a-Chip. IEEE Trans. Computers Paolo Bernardi, Letícia Maria Veiras Bolzani, Maurizio Rebaudengo, Matteo Sonza Reorda, Fabian Vargas, Massimo Violante
2006	J	`jnl`	A New Reliability-Oriented Place and Route Algorithm for SRAM-Based FPGAs. IEEE Trans. Computers Luca Sterpone, Massimo Violante
2006	—	`conf`	A new approach to compress the configuration information of programmable devices. DATE Designers' Forum Maurizio Martina, Guido Masera, Andrea Molino, Fabrizio Vacca, Luca Sterpone, Massimo Violante
2006	—	`conf`	Combined software and hardware techniques for the design of reliable IP processors. DFT Maurizio Rebaudengo, Luca Sterpone, Massimo Violante, Cristiana Bolchini, Antonio Miele, Donatella Sciuto
2006	C	`conf`	Dependability Evaluation of Transient Fault Effects in Reconfigurable Compute Fabric Devices. IOLTS Luca Sterpone, Massimo Violante
2006	J	`jnl`	Early, Accurate Dependability Analysis of CAN-Based Networked Systems. IEEE Des. Test Comput. Julio Pérez Acle, Matteo Sonza Reorda, Massimo Violante
2006	B	`conf`	Fault Injection-based Reliability Evaluation of SoPCs. ETS Matteo Sonza Reorda, Luca Sterpone, Massimo Violante, Marta Portela-García, Celia López-Ongil, Luis Entrena
2006	J	`jnl`	Hardening FPGA-based Systems Against SEUs: A New Design Methodology. J. Comput. Luca Sterpone, Massimo Violante
2006	C	`conf`	Hardware-in-the-Loop-Based Dependability Analysis of Automotive Systems. IOLTS Matteo Sonza Reorda, Massimo Violante
2006	—	`conf`	Online hardening of programs against SEUs and SETs. DFT Carlos Arthur Lang Lisbôa, Luigi Carro, Matteo Sonza Reorda, Massimo Violante
2006	C	`conf`	ReCoM: A New Reconfigurable Compute Fabric Architecture for Computation-Intensive Applications. DDECS Luca Sterpone, Massimo Violante
2006	—	`conf`	Software-Based On-Line Test of Communication Peripherals in Processor-Based Systems for Automotive Applications. MTV Paolo Bernardi, Letícia Maria Veiras Bolzani, Alberto Manzone, Massimo Osella, Massimo Violante, Matteo Sonza Reorda
2006	—	`book`	Software-Implemented Hardware Fault Tolerance. Olga Goloubeva, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2005	—	`conf`	A design flow for protecting FPGA-based systems against single event upsets. DFT Luca Sterpone, Massimo Violante
2005	—	`conf`	An Integrated Approach for Increasing the Soft-Error Detection Capabilities in SoCs processors. DFT Paolo Bernardi, Letícia Maria Veiras Bolzani, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2005	—	`conf`	Automatic generation of test sets for SBST of microprocessor IP cores. SBCCI Ernesto Sánchez, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante
2005	C	`conf`	Efficient Estimation of SEU Effects in SRAM-Based FPGAs. IOLTS Matteo Sonza Reorda, Luca Sterpone, Massimo Violante
2005	B	`conf`	Multiple errors produced by single upsets in FPGA configuration memory: a possible solution. ETS Matteo Sonza Reorda, Luca Sterpone, Massimo Violante
2005	A	`conf`	New evolutionary techniques for test-program generation for complex microprocessor cores. GECCO Ernesto Sánchez, Massimiliano Schillaci, Matteo Sonza Reorda, Giovanni Squillero, Luca Sterpone, Massimo Violante
2005	A	`conf`	On-Line Detection of Control-Flow Errors in SoCs by Means of an Infrastructure IP Core. DSN Paolo Bernardi, Letícia Maria Veiras Bolzani, Maurizio Rebaudengo, Matteo Sonza Reorda, Fabian Vargas, Massimo Violante
2004	J	`jnl`	A New Approach to Software-Implemented Fault Tolerance. J. Electron. Test. Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2004	J	`jnl`	A New Approach to the Analysis of Single Event Transients in VLSI Circuits. J. Electron. Test. Matteo Sonza Reorda, Massimo Violante
2004	B	`conf`	A local analysis of the genotype-fitness mapping in hardware optimization problems. IEEE Congress on Evolutionary Computation Ernesto Sánchez, Giovanni Squillero, Massimo Violante
2004	—	`conf`	A multi-level approach to the dependability analysis of networked systems based on the CAN protocol. SBCCI Fulvio Corno, Julio Pérez Acle, Matteo Sonza Reorda, Massimo Violante
2004	A	`conf`	Automatic Generation of Validation Stimuli for Application-Specific Processors. DATE Olga Goloubeva, Matteo Sonza Reorda, Massimo Violante
2004	J	`jnl`	Efficient analysis of single event transients. J. Syst. Archit. Matteo Sonza Reorda, Massimo Violante
2004	A	`conf`	Evaluating the Effects of SEUs Affecting the Configuration Memory of an SRAM-Based FPGA. DATE M. Bellato, Paolo Bernardi, D. Bortolato, A. Candelori, M. Ceschia, Alessandro Paccagnella, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, P. Zambolin
2004	—	`conf`	Exploiting HW Acceleration for Classifying Complex Test Program Generation Problems. EvoWorkshops Ernesto Sánchez, Giovanni Squillero, Massimo Violante
2004	C	`conf`	Hybrid Soft Error Detection by Means of Infrastructure IP Cores. IOLTS Letícia Maria Veiras Bolzani, Maurizio Rebaudengo, Matteo Sonza Reorda, Fabian Vargas, Massimo Violante
2004	C	`conf`	On the Evaluation of SEU Sensitiveness in SRAM-Based FPGAs. IOLTS Paolo Bernardi, Matteo Sonza Reorda, Luca Sterpone, Massimo Violante
2004	—	`conf`	On-Line Analysis and Perturbation of CAN Networks. DFT Matteo Sonza Reorda, Massimo Violante
2004	—	`conf`	Validation of the dependability of CAN-based networked systems. HLDVT Fulvio Corno, Julio Pérez Acle, Mattia Ramasso, Matteo Sonza Reorda, Massimo Violante
2003	A	`conf`	A P1500-Compatible Programmable BIST Approach for the Test of Embedded Flash Memories. DATE Paolo Bernardi, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2003	J	`jnl`	Accurate Analysis of Single Event Upsets in a Pipelined Microprocessor. J. Electron. Test. Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2003	—	`conf`	Accurate Dependability Analysis of CAN-Based Networked Systems. SBCCI Julio Pérez, Matteo Sonza Reorda, Massimo Violante
2003	C	`conf`	Accurate and Efficient Analysis of Single Event Transients in VLSI Circuits. IOLTS Matteo Sonza Reorda, Massimo Violante
2003	A	`conf`	An Accurate Analysis of the Effects of Soft Errors in the Instruction and Data Caches of a Pipelined Microprocessor. DATE Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2003	C	`conf`	An RT-level Concurrent Error Detection Technique for Data Dominated Systems. IOLTS Olga Goloubeva, Matteo Sonza Reorda, Massimo Violante
2003	C	`conf`	Analyzing SEU Effects in SRAM-based FPGAs. IOLTS Massimo Violante, M. Ceschia, Matteo Sonza Reorda, Alessandro Paccagnella, Paolo Bernardi, Maurizio Rebaudengo, D. Bortolato, M. Bellato, P. Zambolin, A. Candelori
2003	—	`conf`	Dependability Analysis of CAN Networks: An Emulation-Based Approach. DFT Julio Pérez, Matteo Sonza Reorda, Massimo Violante
2003	—	`conf`	Detailed Comparison of Dependability Analyses Performed at RT and Gate Levels. DFT Abdelaziz Ammari, Régis Leveugle, Matteo Sonza Reorda, Massimo Violante
2003	B	`conf`	Emulation-Based Analysis of Soft Errors in Deep Sub-micron Circuits. FPL Matteo Sonza Reorda, Massimo Violante
2003	A	`conf`	Exploiting Programmable BIST For The Diagnosis of Embedded Memory Cores. ITC Davide Appello, Paolo Bernardi, Alessandra Fudoli, Maurizio Rebaudengo, Matteo Sonza Reorda, Vincenzo Tancorre, Massimo Violante
2003	—	`conf`	High-level test generation for hardware testing and software validation. HLDVT Olga Goloubeva, Matteo Sonza Reorda, Massimo Violante
2003	J	`jnl`	New techniques for efficiently assessing reliability of SOCs. Microelectron. J. Pierluigi Civera, Luca Macchiarulo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2003	—	`conf`	Soft-Error Detection Using Control Flow Assertions. DFT Olga Goloubeva, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2002	—	`conf`	A New Approach to Software-Implemented Fault Tolerance. LATW Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2002	—	`conf`	A New Functional Fault Model for FPGA Application-Oriented Testing. DFT Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2002	—	`conf`	A Simplified Gate-Level Fault Model for Crosstalk Effects Analysis. DFT Pierluigi Civera, Luca Macchiarulo, Massimo Violante
2002	—	`conf`	A Software Fault Tolerance Method for Safety-Critical Systems: Effectiveness and Drawbacks. SBCCI Bogdan Nicolescu, Raoul Velazco, Matteo Sonza Reorda, Maurizio Rebaudengo, Massimo Violante
2002	—	`conf`	A hierarchical approach for designing dependable systems. HLDVT Matteo Sonza Reorda, Massimo Violante, Nicola Mazzocca, Salvatore Venticinque, Andrea Bobbio, Giuliana Franceschinis
2002	J	`jnl`	An FPGA-Based Approach for Speeding-Up Fault Injection Campaigns on Safety-Critical Circuits. J. Electron. Test. Pierluigi Civera, Luca Macchiarulo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2002	—	`conf`	Analysis of SEU Effects in a Pipelined Processor. IOLTW Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2002	—	`conf`	Fault List Compaction through Static Timing Analysis for Efficient Fault Injection Experiments. DFT Matteo Sonza Reorda, Massimo Violante
2002	—	`conf`	High-level and hierarchical test sequence generation. HLDVT Gert Jervan, Zebo Peng, Olga Goloubeva, Matteo Sonza Reorda, Massimo Violante
2002	B	`conf`	Simulation-Based Analysis of SEU Effects on SRAM-based FPGAs. FPL Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2001	C	`conf`	A Source-to-Source Compiler for Generating Dependable Software. SCAM Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Marco Torchiano
2001	Misc	`conf`	Early Evaluation Of Bus Interconnects Dependability For System-On-Chip Designs. VLSI Design Marcello Lajolo, Matteo Sonza Reorda, Massimo Violante
2001	—	`conf`	Exploiting FPGA for Accelerating Fault Injection Experiments. IOLTW Pierluigi Civera, Luca Macchiarulo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2001	—	`conf`	Exploiting FPGA-Based Techniques for Fault Injection Campaigns on VLSI Circuits . DFT Pierluigi Civera, Luca Macchiarulo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2001	B	`conf`	FPGA-Based Fault Injection Techniques for Fast Evaluation of Fault Tolerance in VLSI Circuits. FPL Pierluigi Civera, Luca Macchiarulo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2001	—	`conf`	FPGA-Based Fault Injection for Microprocessor Systems. Asian Test Symposium Pierluigi Civera, Luca Macchiarulo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2001	A	`conf`	On the test of microprocessor IP cores. DATE Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante
2001	A	`conf`	System safety through automatic high-level code transformations: an experimental evaluation. DATE Ph. Cheynet, Bogdan Nicolescu, Raoul Velazco, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2000	B	`conf`	A genetic algorithm-based system for generating test programs for microprocessor IP cores. ICTAI Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante
2000	—	`conf`	An Experimental Evaluation of the Effectiveness of Automatic Rule-Based Transformations for Safety-Critical Applications. DFT Maurizio Rebaudengo, Matteo Sonza Reorda, Marco Torchiano, Massimo Violante
2000	—	`conf`	Automatic test bench generation for simulation-based validation. CODES Marcello Lajolo, Luciano Lavagno, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2000	—	`conf`	Behavioral-level test vector generation for system-on-chip designs. HLDVT Marcello Lajolo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Luciano Lavagno
2000	—	`conf`	CA-CSTP: a new BIST architecture for sequential circuits. ETW Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante
2000	—	`conf`	Early Power Estimation for System-on-Chip Designs. PATMOS Marcello Lajolo, Luciano Lavagno, Matteo Sonza Reorda, Massimo Violante
2000	A	`conf`	Evaluating System Dependability in a Co-Design Framework. DATE Marcello Lajolo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Luciano Lavagno
2000	—	`conf`	Evaluating the Effectiveness of a Software Fault-Tolerance Technique on RISC- and CISC-Based Architectures. IOLTW Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Ph. Cheynet, Bogdan Nicolescu, Raoul Velazco
2000	—	`conf`	Hardening the Software with Respect to Transient Errors: a Method and Experimental Results. LATW Ph. Cheynet, Raoul Velazco, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2000	Misc	`conf`	Low Power BIST via Non-Linear Hybrid Cellular Automata. VTS Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante
2000	—	`conf`	New Techniques for Accelerating Fault Injection in VHDL Descriptions. IOLTW B. Parrotta, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2000	—	`conf`	Prediction of Power Requirements for High-Speed Circuits. EvoWorkshops Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2000	B	`conf`	Speeding-Up Fault Injection Campaigns in VHDL Models. SAFECOMP B. Parrotta, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2000	—	`conf`	System-level test bench generation in a co-design framework. ETW Marcello Lajolo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Luciano Lavagno
1999	—	`conf`	A new BIST architecture for low power circuits. ETW Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
1999	—	`conf`	ALPS: A Peak Power Estimation Tool for Sequential Circuits. Great Lakes Symposium on VLSI Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
1999	—	`conf`	Optimal Vector Selection for Low Power BIST. DFT Fulvio Corno, Matteo Sonza Reorda, Maurizio Rebaudengo, Massimo Violante
1999	—	`conf`	Soft-Error Detection through Software Fault-Tolerance Techniques. DFT Maurizio Rebaudengo, Matteo Sonza Reorda, Marco Torchiano, Massimo Violante
1999	J	`jnl`	SymFony: a hybrid topological-symbolic ATPG exploiting RT-level information. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Fulvio Corno, Uwe Gläser, Paolo Prinetto, Matteo Sonza Reorda, Heinrich Theodor Vierhaus, Massimo Violante
1999	—	`conf`	Test Pattern Generation Under Low Power Constraints. EvoWorkshops Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
1998	A	`conf`	Exploiting Symbolic Techniques for Partial Scan Flip Flop Selection. DATE Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda, Massimo Violante
1997	—	`conf`	Exploiting Logic Simulation to Improve Simulation-based Sequential ATPG. Asian Test Symposium Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante