Massimo Poncino

379 papers A* 17A 89B 2C 36Journal 132Unranked 101

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	BlankSkip: Early-exit Object Detection onboard Nano-drones. CoRR Carlo Marra, Beatrice Alessandra Motetti, Alessio Burrello, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari
2025	J	`jnl`	Advancing Electric Vehicle Battery Management: A Data-Driven Digital Twin Approach for Real-Time Monitoring and Performance Enhancement. IEEE Trans. Veh. Technol. Khaled Sidahmed Sidahmed Alamin, Yukai Chen, Enrico Macii, Massimo Poncino, Sara Vinco
2025	C	`conf`	Building Damage Assessment in Conflict Zones: A Deep Learning Approach Using Geospatial Sub-Meter Resolution Data. IPAS Matteo Risso, Alessia Goffi, Beatrice Alessandra Motetti, Alessio Burrello, Jean Baptiste Bove, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari, Giuseppe Maffeis
2025	A	`conf`	Coupling Neural Networks and Physics Equations For Li-Ion Battery State-of-Charge Prediction. DATE Giovanni Pollo, Alessio Burrello, Enrico Macii, Massimo Poncino, Sara Vinco, Daniele Jahier Pagliari
2025	A	`conf`	Energy-Aware Error Correction Method for Indoor Positioning and Tracking. DATE Donguk Kim, Donkyu Baek, Yukai Chen, Enrico Macii, Massimo Poncino
2025	—	`conf`	EnhancePPG: Improving PPG-based Heart Rate Estimation with Self-Supervision and Augmentation. AICAS Luca Benfenati, Sofia Belloni, Alessio Burrello, Panagiotis Kasnesis, Xiaying Wang, Luca Benini, Massimo Poncino, Enrico Macii, Daniele Jahier Pagliari
2025	J	`jnl`	Foundation Models for Structural Health Monitoring. IEEE Trans. Sustain. Comput. Luca Benfenati, Daniele Jahier Pagliari, Luca Zanatta, Yhorman Alexander Bedoya Velez, Andrea Acquaviva, Massimo Poncino, Enrico Macii, Luca Benini, Alessio Burrello
2025	—	`conf`	Lightweight Software Kernels and Hardware Extensions for Efficient Sparse Deep Neural Networks on Microcontrollers. MLSys Francesco Daghero, Daniele Jahier Pagliari, Francesco Conti, Luca Benini, Massimo Poncino, Alessio Burrello
2025	J	`jnl`	Lightweight Software Kernels and Hardware Extensions for Efficient Sparse Deep Neural Networks on Microcontrollers. CoRR Francesco Daghero, Daniele Jahier Pagliari, Francesco Conti, Luca Benini, Massimo Poncino, Alessio Burrello
2025	A	`conf`	MEbots: Integrating a RISC-V Virtual Platform with a Robotic Simulator for Energy-aware Design. ISLPED Giovanni Pollo, Mohamed Amine Hamdi, Matteo Risso, Lorenzo Ruotolo, Pietro Furbatto, Matteo Isoldi, Yukai Chen, Alessio Burrello, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari, Sara Vinco
2025	J	`jnl`	MEbots: Integrating a RISC-V Virtual Platform with a Robotic Simulator for Energy-aware Design. CoRR Giovanni Pollo, Mohamed Amine Hamdi, Matteo Risso, Lorenzo Ruotolo, Pietro Furbatto, Matteo Isoldi, Yukai Chen, Alessio Burrello, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari, Sara Vinco
2024	—	`conf`	Accelerating Depthwise Separable Convolutions on Ultra-Low-Power Devices. SAMOS Francesco Daghero, Alessio Burrello, Massimo Poncino, Enrico Macii, Daniele Jahier Pagliari
2024	J	`jnl`	Accelerating Depthwise Separable Convolutions on Ultra-Low-Power Devices. CoRR Francesco Daghero, Alessio Burrello, Massimo Poncino, Enrico Macii, Daniele Jahier Pagliari
2024	J	`jnl`	Building Damage Assessment in Conflict Zones: A Deep Learning Approach Using Geospatial Sub-Meter Resolution Data. CoRR Matteo Risso, Alessia Goffi, Beatrice Alessandra Motetti, Alessio Burrello, Jean Baptiste Bove, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari, Giuseppe Maffeis
2024	J	`jnl`	Coupling Neural Networks and Physics Equations For Li-Ion Battery State-of-Charge Prediction. CoRR Giovanni Pollo, Alessio Burrello, Enrico Macii, Massimo Poncino, Sara Vinco, Daniele Jahier Pagliari
2024	J	`jnl`	Dynamic Decision Tree Ensembles for Energy-Efficient Inference on IoT Edge Nodes. IEEE Internet Things J. Francesco Daghero, Alessio Burrello, Enrico Macii, Paolo Montuschi, Massimo Poncino, Daniele Jahier Pagliari
2024	J	`jnl`	EnhancePPG: Improving PPG-based Heart Rate Estimation with Self-Supervision and Augmentation. CoRR Luca Benfenati, Sofia Belloni, Alessio Burrello, Panagiotis Kasnesis, Xiaying Wang, Luca Benini, Massimo Poncino, Enrico Macii, Daniele Jahier Pagliari
2024	J	`jnl`	Foundation Models for Structural Health Monitoring. CoRR Luca Benfenati, Daniele Jahier Pagliari, Luca Zanatta, Yhorman Alexander Bedoya Velez, Andrea Acquaviva, Massimo Poncino, Enrico Macii, Luca Benini, Alessio Burrello
2024	A	`conf`	HW-SW Optimization of DNNs for Privacy-Preserving People Counting on Low-Resolution Infrared Arrays. DATE Matteo Risso, Chen Xie, Francesco Daghero, Alessio Burrello, Seyedmorteza Mollaei, Marco Castellano, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari
2024	J	`jnl`	HW-SW Optimization of DNNs for Privacy-preserving People Counting on Low-resolution Infrared Arrays. CoRR Matteo Risso, Chen Xie, Francesco Daghero, Alessio Burrello, Seyedmorteza Mollaei, Marco Castellano, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari
2024	—	`conf`	Integrating SystemC-AMS Power Modeling with a RISC-V ISS for Virtual Prototyping of Battery-operated Embedded Devices. CF (Companion) Mohamed Amine Hamdi, Giovanni Pollo, Matteo Risso, Germain Haugou, Alessio Burrello, Enrico Macii, Massimo Poncino, Sara Vinco, Daniele Jahier Pagliari
2024	J	`jnl`	Integrating SystemC-AMS Power Modeling with a RISC-V ISS for Virtual Prototyping of Battery-operated Embedded Devices. CoRR Mohamed Amine Hamdi, Giovanni Pollo, Matteo Risso, Germain Haugou, Alessio Burrello, Enrico Macii, Massimo Poncino, Sara Vinco, Daniele Jahier Pagliari
2024	J	`jnl`	Joint Pruning and Channel-wise Mixed-Precision Quantization for Efficient Deep Neural Networks. CoRR Beatrice Alessandra Motetti, Matteo Risso, Alessio Burrello, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari
2024	A	`conf`	Model-Driven Feature Engineering for Data-Driven Battery SOH Model. DATE Khaled Alamin, Daniele Jahier Pagliari, Yukai Chen, Enrico Macii, Sara Vinco, Massimo Poncino
2024	—	`conf`	Optimization and Deployment of Deep Neural Networks for PPG-based Blood Pressure Estimation Targeting Low-power Wearables. BioCAS Alessio Burrello, Francesco Carlucci, Giovanni Pollo, Xiaying Wang, Massimo Poncino, Enrico Macii, Luca Benini, Daniele Jahier Pagliari
2024	J	`jnl`	Optimization and Deployment of Deep Neural Networks for PPG-based Blood Pressure Estimation Targeting Low-power Wearables. CoRR Alessio Burrello, Francesco Carlucci, Giovanni Pollo, Xiaying Wang, Massimo Poncino, Enrico Macii, Luca Benini, Daniele Jahier Pagliari
2024	—	`conf`	Optimized Deployment of Deep Neural Networks for Visual Pose Estimation on Nano-drones. ERF (1) Matteo Risso, Francesco Daghero, Beatrice Alessandra Motetti, Daniele Jahier Pagliari, Enrico Macii, Massimo Poncino, Alessio Burrello
2024	J	`jnl`	Optimized Deployment of Deep Neural Networks for Visual Pose Estimation on Nano-drones. CoRR Matteo Risso, Francesco Daghero, Beatrice Alessandra Motetti, Daniele Jahier Pagliari, Enrico Macii, Massimo Poncino, Alessio Burrello
2023	J	`jnl`	A Framework for Economic and Environmental Benefit Through Renewable Energy Community. IEEE Syst. J. Matteo Orlando, Lorenzo Bottaccioli, Stefano Quer, Massimo Poncino, Sara Vinco, Edoardo Patti
2023	J	`jnl`	Dynamic Decision Tree Ensembles for Energy-Efficient Inference on IoT Edge Nodes. CoRR Francesco Daghero, Alessio Burrello, Enrico Macii, Paolo Montuschi, Massimo Poncino, Daniele Jahier Pagliari
2023	J	`jnl`	Efficient Deep Learning Models for Privacy-Preserving People Counting on Low-Resolution Infrared Arrays. IEEE Internet Things J. Chen Xie, Francesco Daghero, Yukai Chen, Marco Castellano, Luca Gandolfi, Andrea Calimera, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari
2023	J	`jnl`	Efficient Deep Learning Models for Privacy-preserving People Counting on Low-resolution Infrared Arrays. CoRR Chen Xie, Francesco Daghero, Yukai Chen, Marco Castellano, Luca Gandolfi, Andrea Calimera, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari
2023	A	`conf`	Energy-efficient Wearable-to-Mobile Offload of ML Inference for PPG-based Heart-Rate Estimation. DATE Alessio Burrello, Matteo Risso, Noemi Tomasello, Yukai Chen, Luca Benini, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari
2023	J	`jnl`	Energy-efficient Wearable-to-Mobile Offload of ML Inference for PPG-based Heart-Rate Estimation. CoRR Alessio Burrello, Matteo Risso, Noemi Tomasello, Yukai Chen, Luca Benini, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari
2023	J	`jnl`	Lightweight Neural Architecture Search for Temporal Convolutional Networks at the Edge. CoRR Matteo Risso, Alessio Burrello, Francesco Conti, Lorenzo Lamberti, Yukai Chen, Luca Benini, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari
2023	J	`jnl`	Lightweight Neural Architecture Search for Temporal Convolutional Networks at the Edge. IEEE Trans. Computers Matteo Risso, Alessio Burrello, Francesco Conti, Lorenzo Lamberti, Yukai Chen, Luca Benini, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari
2023	A	`conf`	Model-Driven Dataset Generation for Data-Driven Battery SOH Models. ISLPED Khaled Sidahmed Sidahmed Alamin, Francesco Daghero, Giovanni Pollo, Daniele Jahier Pagliari, Yukai Chen, Enrico Macii, Massimo Poncino, Sara Vinco
2023	J	`jnl`	Multi-Criteria Coordinated Electric Vehicle-Drone Hybrid Delivery Service Planning. IEEE Trans. Veh. Technol. Young Hoo Cho, Donkyu Baek, Yukai Chen, Min Jae Jung, Sara Vinco, Enrico Macii, Massimo Poncino
2023	A	`conf`	Precision-aware Latency and Energy Balancing on Multi-Accelerator Platforms for DNN Inference. ISLPED Matteo Risso, Alessio Burrello, Giuseppe Maria Sarda, Luca Benini, Enrico Macii, Massimo Poncino, Marian Verhelst, Daniele Jahier Pagliari
2023	J	`jnl`	Precision-aware Latency and Energy Balancing on Multi-Accelerator Platforms for DNN Inference. CoRR Matteo Risso, Alessio Burrello, Giuseppe Maria Sarda, Luca Benini, Enrico Macii, Massimo Poncino, Marian Verhelst, Daniele Jahier Pagliari
2023	J	`jnl`	Reducing the Energy Consumption of sEMG-Based Gesture Recognition at the Edge Using Transformers and Dynamic Inference. Sensors Chen Xie, Alessio Burrello, Francesco Daghero, Luca Benini, Andrea Calimera, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari
2022	—	`conf`	A Machine Learning-based Digital Twin for Electric Vehicle Battery Modeling. COINS Khaled Sidahmed Sidahmed Alamin, Yukai Chen, Enrico Macii, Massimo Poncino, Sara Vinco
2022	J	`jnl`	A Machine Learning-based Digital Twin for Electric Vehicle Battery Modeling. CoRR Khaled Sidahmed Sidahmed Alamin, Yukai Chen, Enrico Macii, Massimo Poncino, Sara Vinco
2022	J	`jnl`	A Smart Meter Infrastructure for Smart Grid IoT Applications. IEEE Internet Things J. Matteo Orlando, Abouzar Estebsari, Enrico Pons, Marco Pau, Stefano Quer, Massimo Poncino, Lorenzo Bottaccioli, Edoardo Patti
2022	J	`jnl`	Adaptive Random Forests for Energy-Efficient Inference on Microcontrollers. CoRR Francesco Daghero, Alessio Burrello, Chen Xie, Luca Benini, Andrea Calimera, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari
2022	A	`conf`	Bioformers: Embedding Transformers for Ultra-Low Power sEMG-based Gesture Recognition. DATE Alessio Burrello, Francesco Bianco Morghet, Moritz Scherer, Simone Benatti, Luca Benini, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari
2022	J	`jnl`	Bioformers: Embedding Transformers for Ultra-Low Power sEMG-based Gesture Recognition. CoRR Alessio Burrello, Francesco Bianco Morghet, Moritz Scherer, Simone Benatti, Luca Benini, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari
2022	C	`conf`	C-NMT: A Collaborative Inference Framework for Neural Machine Translation. ISCAS Yukai Chen, Roberta Chiaro, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari
2022	J	`jnl`	C-NMT: A Collaborative Inference Framework for Neural Machine Translation. CoRR Yukai Chen, Roberta Chiaro, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari
2022	—	`conf`	Channel-wise Mixed-precision Assignment for DNN Inference on Constrained Edge Nodes. IGSC Matteo Risso, Alessio Burrello, Luca Benini, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari
2022	J	`jnl`	Channel-wise Mixed-precision Assignment for DNN Inference on Constrained Edge Nodes. CoRR Matteo Risso, Alessio Burrello, Luca Benini, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari
2022	J	`jnl`	Digital Transformation of a Production Line: Network Design, Online Data Collection and Energy Monitoring. IEEE Trans. Emerg. Top. Comput. Nicola Dall'Ora, Khaled Alamin, Enrico Fraccaroli, Massimo Poncino, Davide Quaglia, Sara Vinco
2022	J	`jnl`	Embedding Temporal Convolutional Networks for Energy-Efficient PPG-Based Heart Rate Monitoring. CoRR Alessio Burrello, Daniele Jahier Pagliari, Pierangelo Maria Rapa, Matilde Semilia, Matteo Risso, Tommaso Polonelli, Massimo Poncino, Luca Benini, Simone Benatti
2022	J	`jnl`	Embedding Temporal Convolutional Networks for Energy-efficient PPG-based Heart Rate Monitoring. ACM Trans. Comput. Heal. Alessio Burrello, Daniele Jahier Pagliari, Pierangelo Maria Rapa, Matilde Semilia, Matteo Risso, Tommaso Polonelli, Massimo Poncino, Luca Benini, Simone Benatti
2022	J	`jnl`	Energy-Efficient Adaptive Machine Learning on IoT End-Nodes With Class-Dependent Confidence. CoRR Francesco Daghero, Alessio Burrello, Daniele Jahier Pagliari, Luca Benini, Enrico Macii, Massimo Poncino
2022	J	`jnl`	Human Activity Recognition on Microcontrollers with Quantized and Adaptive Deep Neural Networks. CoRR Francesco Daghero, Alessio Burrello, Chen Xie, Marco Castellano, Luca Gandolfi, Andrea Calimera, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari
2022	J	`jnl`	Human Activity Recognition on Microcontrollers with Quantized and Adaptive Deep Neural Networks. ACM Trans. Embed. Comput. Syst. Francesco Daghero, Alessio Burrello, Chen Xie, Marco Castellano, Luca Gandolfi, Andrea Calimera, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari
2022	—	`conf`	Improving PPG-based Heart-Rate Monitoring with Synthetically Generated Data. BioCAS Alessio Burrello, Daniele Jahier Pagliari, Marzia Bianco, Enrico Macii, Luca Benini, Massimo Poncino, Simone Benatti
2022	A	`conf`	Multi-Complexity-Loss DNAS for Energy-Efficient and Memory-Constrained Deep Neural Networks. ISLPED Matteo Risso, Alessio Burrello, Luca Benini, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari
2022	J	`jnl`	Multi-Complexity-Loss DNAS for Energy-Efficient and Memory-Constrained Deep Neural Networks. CoRR Matteo Risso, Alessio Burrello, Luca Benini, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari
2022	C	`conf`	Privacy-preserving Social Distance Monitoring on Microcontrollers with Low-Resolution Infrared Sensors and CNNs. ISCAS Chen Xie, Francesco Daghero, Yukai Chen, Marco Castellano, Luca Gandolfi, Andrea Calimera, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari
2022	J	`jnl`	Privacy-preserving Social Distance Monitoring on Microcontrollers with Low-Resolution Infrared Sensors and CNNs. CoRR Chen Xie, Francesco Daghero, Yukai Chen, Marco Castellano, Luca Gandolfi, Andrea Calimera, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari
2022	J	`jnl`	Pruning In Time (PIT): A Lightweight Network Architecture Optimizer for Temporal Convolutional Networks. CoRR Matteo Risso, Alessio Burrello, Daniele Jahier Pagliari, Francesco Conti, Lorenzo Lamberti, Enrico Macii, Luca Benini, Massimo Poncino
2022	J	`jnl`	Q-PPG: Energy-Efficient PPG-based Heart Rate Monitoring on Wearable Devices. CoRR Alessio Burrello, Daniele Jahier Pagliari, Matteo Risso, Simone Benatti, Enrico Macii, Luca Benini, Massimo Poncino
2022	C	`conf`	Quality inspection of critical aircraft engine components: towards full automation. ETFA Davide Cannizzaro, Filomena Simone, Klaus Illgner-Fehns, Sara Mata, Ivan Mondino, Alberto Ghiazza, Massimo Poncino, Santa Di Cataldo
2022	J	`jnl`	Robust and Energy-efficient PPG-based Heart-Rate Monitoring. CoRR Matteo Risso, Alessio Burrello, Daniele Jahier Pagliari, Simone Benatti, Enrico Macii, Luca Benini, Massimo Poncino
2022	J	`jnl`	TCN Mapping Optimization for Ultra-Low Power Time-Series Edge Inference. CoRR Alessio Burrello, Alberto Dequino, Daniele Jahier Pagliari, Francesco Conti, Marcello Zanghieri, Enrico Macii, Luca Benini, Massimo Poncino
2022	J	`jnl`	Traffic Load Estimation from Structural Health Monitoring sensors using supervised learning. Sustain. Comput. Informatics Syst. Alessio Burrello, Giovanni Zara, Luca Benini, Davide Brunelli, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari
2022	—	`conf`	Two-stage Human Activity Recognition on Microcontrollers with Decision Trees and CNNs. PRIME Francesco Daghero, Daniele Jahier Pagliari, Massimo Poncino
2022	J	`jnl`	Two-stage Human Activity Recognition on Microcontrollers with Decision Trees and CNNs. CoRR Francesco Daghero, Daniele Jahier Pagliari, Massimo Poncino
2022	J	`jnl`	Ultra-compact Binary Neural Networks for Human Activity Recognition on RISC-V Processors. CoRR Francesco Daghero, Chen Xie, Daniele Jahier Pagliari, Alessio Burrello, Marco Castellano, Luca Gandolfi, Andrea Calimera, Enrico Macii, Massimo Poncino
2021	J	`jnl`	A Microservices-Based Framework for Smart Design and Optimization of PV Installations. IEEE Trans. Sustain. Comput. Sara Vinco, Daniele Jahier Pagliari, Lorenzo Bottaccioli, Edoardo Patti, Enrico Macii, Massimo Poncino
2021	A	`conf`	ACME: An Energy-Efficient Approximate Bus Encoding for I ISLPED Chen Xie, Daniele Jahier Pagliari, Andrea Calimera, Enrico Macii, Massimo Poncino
2021	C	`conf`	Adaptive Random Forests for Energy-Efficient Inference on Microcontrollers. VLSI-SoC Francesco Daghero, Alessio Burrello, Chen Xie, Luca Benini, Andrea Calimera, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari
2021	J	`jnl`	Assessing the Impact of Sensor-Based Task Scheduling on Battery Lifetime in IoT Devices. IEEE Trans. Instrum. Meas. Yukai Chen, Wenlong Wang, Daniele Jahier Pagliari, Enrico Macii, Massimo Poncino
2021	J	`jnl`	CRIME: Input-Dependent Collaborative Inference for Recurrent Neural Networks. IEEE Trans. Computers Daniele Jahier Pagliari, Roberta Chiaro, Enrico Macii, Massimo Poncino
2021	J	`jnl`	Chapter Eight - Energy-efficient deep learning inference on edge devices. Adv. Comput. Francesco Daghero, Daniele Jahier Pagliari, Massimo Poncino
2021	B	`conf`	Design of District-level Photovoltaic Installations for Optimal Power Production and Economic Benefit. COMPSAC Matteo Orlando, Lorenzo Bottaccioli, Sara Vinco, Enrico Macii, Massimo Poncino, Edoardo Patti
2021	A	`conf`	Digital Twin Extension with Extra-Functional Properties. DATE Khaled Alamin, Sara Vinco, Massimo Poncino, Nicola Dall'Ora, Enrico Fraccaroli, Davide Quaglia
2021	J	`jnl`	Enhancing manufacturing intelligence through an unsupervised data-driven methodology for cyclic industrial processes. Expert Syst. Appl. Tania Cerquitelli, Francesco Ventura, Daniele Apiletti, Elena Baralis, Enrico Macii, Massimo Poncino
2021	J	`jnl`	Low-Overhead Adaptive Brightness Scaling for Energy Reduction in OLED Displays. IEEE Trans. Emerg. Top. Comput. Daniele Jahier Pagliari, Santa Di Cataldo, Edoardo Patti, Alberto Macii, Enrico Macii, Massimo Poncino
2021	—	`conf`	Low-Overhead Early-Stopping Policies for Efficient Random Forests Inference on Microcontrollers. VLSI-SoC (Selected Papers) Francesco Daghero, Alessio Burrello, Chen Xie, Luca Benini, Andrea Calimera, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari
2021	J	`jnl`	Manufacturing as a Data-Driven Practice: Methodologies, Technologies, and Tools. Proc. IEEE Tania Cerquitelli, Daniele Jahier Pagliari, Andrea Calimera, Lorenzo Bottaccioli, Edoardo Patti, Andrea Acquaviva, Massimo Poncino
2021	A*	`conf`	Pruning In Time (PIT): A Lightweight Network Architecture Optimizer for Temporal Convolutional Networks. DAC Matteo Risso, Alessio Burrello, Daniele Jahier Pagliari, Francesco Conti, Lorenzo Lamberti, Enrico Macii, Luca Benini, Massimo Poncino
2021	J	`jnl`	Q-PPG: Energy-Efficient PPG-Based Heart Rate Monitoring on Wearable Devices. IEEE Trans. Biomed. Circuits Syst. Alessio Burrello, Daniele Jahier Pagliari, Matteo Risso, Simone Benatti, Enrico Macii, Luca Benini, Massimo Poncino
2021	C	`conf`	Robust and Energy-Efficient PPG-Based Heart-Rate Monitoring. ISCAS Matteo Risso, Alessio Burrello, Daniele Jahier Pagliari, Simone Benatti, Enrico Macii, Luca Benini, Massimo Poncino
2021	A	`conf`	TCN Mapping Optimization for Ultra-Low Power Time-Series Edge Inference. ISLPED Alessio Burrello, Alberto Dequino, Daniele Jahier Pagliari, Francesco Conti, Marcello Zanghieri, Enrico Macii, Luca Benini, Massimo Poncino
2021	—	`conf`	Ultra-compact binary neural networks for human activity recognition on RISC-V processors. CF Francesco Daghero, Chen Xie, Daniele Jahier Pagliari, Alessio Burrello, Marco Castellano, Luca Gandolfi, Andrea Calimera, Enrico Macii, Massimo Poncino
2020	A	`conf`	A Diode-Aware Model of PV Modules from Datasheet Specifications. DATE Sara Vinco, Yukai Chen, Enrico Macii, Massimo Poncino
2020	—	`conf`	Energy-Efficient Adaptive Machine Learning on IoT End-Nodes With Class-Dependent Confidence. ICECS Francesco Daghero, Alessio Burrello, Daniele Jahier Pagliari, Luca Benini, Enrico Macii, Massimo Poncino
2020	A*	`conf`	Input-Dependent Edge-Cloud Mapping of Recurrent Neural Networks Inference. DAC Daniele Jahier Pagliari, Roberta Chiaro, Yukai Chen, Sara Vinco, Enrico Macii, Massimo Poncino
2020	J	`jnl`	Logic Synthesis of Pass-Gate Logic Circuits With Emerging Ambipolar Technologies. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Valerio Tenace, Andrea Calimera, Enrico Macii, Massimo Poncino
2020	J	`jnl`	Modeling and Simulation of Cyber-Physical Electrical Energy Systems With SystemC-AMS. IEEE Trans. Sustain. Comput. Yukai Chen, Sara Vinco, Daniele Jahier Pagliari, Paolo Montuschi, Enrico Macii, Massimo Poncino
2020	B	`conf`	Optimal Configuration and Placement of PV Systems in Building Roofs with Cost Analysis. COMPSAC Matteo Orlando, Lorenzo Bottaccioli, Edoardo Patti, Enrico Macii, Sara Vinco, Massimo Poncino
2020	—	`conf`	Predicting Hard Disk Failures in Data Centers Using Temporal Convolutional Neural Networks. Euro-Par Workshops Alessio Burrello, Daniele Jahier Pagliari, Andrea Bartolini, Luca Benini, Enrico Macii, Massimo Poncino
2019	J	`jnl`	A Cross-level Verification Methodology for Digital IPs Augmented with Embedded Timing Monitors. ACM Trans. Design Autom. Electr. Syst. Sara Vinco, Nicola Bombieri, Daniele Jahier Pagliari, Franco Fummi, Enrico Macii, Massimo Poncino
2019	—	`conf`	A Semi-Empirical Model of PV Modules Including Manufacturing I-V Mismatch. ICECS Yukai Chen, Sara Vinco, Daniele Jahier Pagliari, Enrico Macii, Massimo Poncino
2019	J	`jnl`	A SystemC-AMS Framework for the Design and Simulation of Energy Management in Electric Vehicles. IEEE Access Yukai Chen, Donkyu Baek, Jaemin Kim, Santa Di Cataldo, Naehyuck Chang, Enrico Macii, Sara Vinco, Massimo Poncino
2019	J	`jnl`	Automated Synthesis of Energy-Efficient Reconfigurable-Precision Circuits. IEEE Access Daniele Jahier Pagliari, Enrico Macii, Massimo Poncino
2019	A	`conf`	Battery-Aware Electric Truck Delivery Route Planner. ISLPED Donkyu Baek, Yukai Chen, Enrico Macii, Massimo Poncino, Naehyuck Chang
2019	J	`jnl`	Battery-Aware Operation Range Estimation for Terrestrial and Aerial Electric Vehicles. IEEE Trans. Veh. Technol. Donkyu Baek, Yukai Chen, Alberto Bocca, Lorenzo Bottaccioli, Santa Di Cataldo, Valentina Gatteschi, Daniele Jahier Pagliari, Edoardo Patti, Gianvito Urgese, Naehyuck Chang, Alberto Macii, Enrico Macii, Paolo Montuschi, Massimo Poncino
2019	A	`conf`	CNN-Based Camera-less User Attention Detection for Smartphone Power Management. ISLPED Daniele Jahier Pagliari, Matteo Ansaldi, Enrico Macii, Massimo Poncino
2019	—	`conf`	Dynamic Beam Width Tuning for Energy-Efficient Recurrent Neural Networks. ACM Great Lakes Symposium on VLSI Daniele Jahier Pagliari, Francesco Panini, Enrico Macii, Massimo Poncino
2019	J	`jnl`	Fine-Grain Back Biasing for the Design of Energy-Quality Scalable Operators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Daniele Jahier Pagliari, Yves Durand, David Coriat, Edith Beigné, Enrico Macii, Massimo Poncino
2019	A	`conf`	Irradiance-Driven Partial Reconfiguration of PV Panels. DATE Daniele Jahier Pagliari, Sara Vinco, Enrico Macii, Massimo Poncino
2019	A*	`conf`	Low-Overhead Power Trace Obfuscation for Smart Meter Privacy. DAC Daniele Jahier Pagliari, Sara Vinco, Enrico Macii, Massimo Poncino
2019	—	`conf`	Optimal Input-Dependent Edge-Cloud Partitioning for RNN Inference. ICECS Daniele Jahier Pagliari, Roberta Chiaro, Yukai Chen, Enrico Macii, Massimo Poncino
2019	J	`jnl`	SystemC-AMS Thermal Modeling for the Co-simulation of Functional and Extra-Functional Properties. ACM Trans. Design Autom. Electr. Syst. Yukai Chen, Sara Vinco, Enrico Macii, Massimo Poncino
2018	C	`conf`	A Compact PV Panel Model for Cyber-Physical Systems in Smart Cities. ISCAS Sara Vinco, Lorenzo Bottaccioli, Edoardo Patti, Andrea Acquaviva, Massimo Poncino
2018	J	`jnl`	Aging and Cost Optimal Residential Charging for Plug-In EVs. IEEE Des. Test Alberto Bocca, Yukai Chen, Alberto Macii, Enrico Macii, Massimo Poncino
2018	A	`conf`	All-digital embedded meters for on-line power estimation. DATE Daniele Jahier Pagliari, Valentino Peluso, Yukai Chen, Andrea Calimera, Enrico Macii, Massimo Poncino
2018	C	`conf`	Application-Driven Synthesis of Energy-Efficient Reconfigurable-Precision Operators. ISCAS Daniele Jahier Pagliari, Massimo Poncino
2018	A	`conf`	Battery-Aware Energy Model of Drone Delivery Tasks. ISLPED Donkyu Baek, Yukai Chen, Alberto Bocca, Alberto Macii, Enrico Macii, Massimo Poncino
2018	—	`conf`	Battery-aware Design Exploration of Scheduling Policies for Multi-sensor Devices. ACM Great Lakes Symposium on VLSI Yukai Chen, Daniele Jahier Pagliari, Enrico Macii, Massimo Poncino
2018	J	`jnl`	Composable Battery Model Templates Based on Manufacturers' Data. IEEE Des. Test Alberto Bocca, Alberto Macii, Enrico Macii, Massimo Poncino
2018	A	`conf`	Dynamic Bit-width Reconfiguration for Energy-Efficient Deep Learning Hardware. ISLPED Daniele Jahier Pagliari, Enrico Macii, Massimo Poncino
2018	J	`jnl`	Empirical derivation of upper and lower bounds of NBTI aging for embedded cores. Microelectron. Reliab. Yukai Chen, Enrico Macii, Massimo Poncino
2018	C	`conf`	Fundamental Feature Extraction of the Battery Charge Phase from Product Data. ISCAS Alberto Bocca, Yukai Chen, Alberto Macii, Massimo Poncino
2018	A	`conf`	GIS-based optimal photovoltaic panel floorplanning for residential installations. DATE Sara Vinco, Lorenzo Bottaccioli, Edoardo Patti, Andrea Acquaviva, Enrico Macii, Massimo Poncino
2018	J	`jnl`	LAPSE: Low-Overhead Adaptive Power Saving and Contrast Enhancement for OLEDs. IEEE Trans. Image Process. Daniele Jahier Pagliari, Enrico Macii, Massimo Poncino
2018	—	`conf`	Optimal Topology-Aware PV Panel Floorplanning with Hybrid Orientation. ACM Great Lakes Symposium on VLSI Sara Vinco, Enrico Macii, Massimo Poncino
2018	J	`jnl`	Thermal Management of Batteries Using Supercapacitor Hybrid Architecture With Idle Period Insertion Strategy. IEEE Trans. Very Large Scale Integr. Syst. Donghwa Shin, Massimo Poncino, Enrico Macii
2018	—	`conf`	iSTEP, an Integrated Self-Tuning Engine for Predictive Maintenance in Industry 4.0. ISPA/IUCC/BDCloud/SocialCom/SustainCom Daniele Apiletti, Claudia Barberis, Tania Cerquitelli, Alberto Macii, Enrico Macii, Massimo Poncino, Francesco Ventura
2017	J	`jnl`	A Layered Methodology for the Simulation of Extra-Functional Properties in Smart Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Sara Vinco, Yukai Chen, Franco Fummi, Enrico Macii, Massimo Poncino
2017	J	`jnl`	A Modular Framework for Battery Modeling in Electronic Designs. J. Low Power Electron. Alberto Bocca, Alberto Macii, Massimo Poncino
2017	A	`conf`	A circuit-equivalent battery model accounting for the dependency on load frequency. DATE Yukai Chen, Enrico Macii, Massimo Poncino
2017	A	`conf`	A methodology for the design of dynamic accuracy operators by runtime back bias. DATE Daniele Jahier Pagliari, Yves Durand, David Coriat, Anca Molnos, Edith Beigné, Enrico Macii, Massimo Poncino
2017	J	`jnl`	Approximate Energy-Efficient Encoding for Serial Interfaces. ACM Trans. Design Autom. Electr. Syst. Daniele Jahier Pagliari, Enrico Macii, Massimo Poncino
2017	J	`jnl`	CONTREX: Design of embedded mixed-criticality CONTRol systems under consideration of EXtra-functional properties. Microprocess. Microsystems Kim Grüttner, Ralph Görgen, Sören Schreiner, Fernando Herrera, Pablo Peñil, Julio L. Medina, Eugenio Villar, Gianluca Palermo, William Fornaciari, Carlo Brandolese, Davide Gadioli, Emanuele Vitali, Davide Zoni, Sara Bocchio, Luca Ceva, Paolo Azzoni, Massimo Poncino, Sara Vinco, Enrico Macii, Salvatore Cusenza, John M. Favaro, Raúl Valencia, Ingo Sander, Kathrin Rosvall, Nima Khalilzad, Davide Quaglia
2017	—	`conf`	Optimal content-dependent dynamic brightness scaling for OLED displays. PATMOS Daniele Jahier Pagliari, Enrico Macii, Massimo Poncino
2017	A	`conf`	Workload-driven frequency-aware battery sizing. ISLPED Yukai Chen, Enrico Macii, Massimo Poncino
2016	A	`conf`	A Li-Ion Battery Charge Protocol with Optimal Aging-Quality of Service Trade-off. ISLPED Yukai Chen, Alberto Bocca, Alberto Macii, Enrico Macii, Massimo Poncino
2016	—	`conf`	A Unified Model of Power Sources for the Simulation of Electrical Energy Systems. ACM Great Lakes Symposium on VLSI Sara Vinco, Yukai Chen, Enrico Macii, Massimo Poncino
2016	—	`conf`	Approximate Differential Encoding for Energy-Efficient Serial Communication. ACM Great Lakes Symposium on VLSI Daniele Jahier Pagliari, Enrico Macii, Massimo Poncino
2016	C	`conf`	CONTREX: Design of Embedded Mixed-Criticality CONTRol Systems under Consideration of EXtra-Functional Properties. DSD Ralph Görgen, Kim Grüttner, Fernando Herrera, Pablo Peñil, Julio L. Medina, Eugenio Villar, Gianluca Palermo, William Fornaciari, Carlo Brandolese, Davide Gadioli, Sara Bocchio, Luca Ceva, Paolo Azzoni, Massimo Poncino, Sara Vinco, Enrico Macii, Salvatore Cusenza, John M. Favaro, Raúl Valencia, Ingo Sander, Kathrin Rosvall, Davide Quaglia
2016	C	`conf`	Enabling quasi-adiabatic logic arrays for silicon and beyond-silicon technologies. ISCAS Valerio Tenace, Andrea Calimera, Enrico Macii, Massimo Poncino
2016	—	`conf`	Fast Thermal Simulation using SystemC-AMS. ACM Great Lakes Symposium on VLSI Yukai Chen, Sara Vinco, Enrico Macii, Massimo Poncino
2016	C	`conf`	Frequency domain characterization of batteries for the design of energy storage subsystems. VLSI-SoC Yukai Chen, Enrico Macii, Massimo Poncino
2016	—	`conf`	Graphene-PLA (GPLA): a Compact and Ultra-Low Power Logic Array Architecture. ACM Great Lakes Symposium on VLSI Valerio Tenace, Andrea Calimera, Enrico Macii, Massimo Poncino
2016	C	`conf`	IP-XACT for smart systems design: extensions for the integration of functional and extra-functional models. FDL Sara Vinco, Michele Lora, Enrico Macii, Massimo Poncino
2016	—	`conf`	Logic Synthesis for Silicon and Beyond-Silicon Multi-gate Pass-Logic Circuits. VLSI-SoC (Selected Papers) Valerio Tenace, Andrea Calimera, Enrico Macii, Massimo Poncino
2016	A	`conf`	Low-overhead adaptive constrast enhancement and power reduction for OLEDs. DATE Daniele Jahier Pagliari, Massimo Poncino, Enrico Macii
2016	C	`conf`	Multi-function logic synthesis of silicon and beyond-silicon ultra-low power pass-gates circuits. VLSI-SoC Valerio Tenace, Andrea Calimera, Enrico Macii, Massimo Poncino
2016	J	`jnl`	Quasi-Adiabatic Logic Arrays for Silicon and Beyond-Silicon Energy-Efficient ICs. IEEE Trans. Circuits Syst. II Express Briefs Valerio Tenace, Andrea Calimera, Enrico Macii, Massimo Poncino
2016	A*	`conf`	Serial T0: approximate bus encoding for energy-efficient transmission of sensor signals. DAC Daniele Jahier Pagliari, Enrico Macii, Massimo Poncino
2015	J	`jnl`	A Statistical Model-Based Cell-to-Cell Variability Management of Li-ion Battery Pack. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Donghwa Shin, Massimo Poncino, Enrico Macii, Naehyuck Chang
2015	—	`conf`	A Temperature-Aware Battery Cycle Life Model for Different Battery Chemistries. VLSI-SoC (Selected Papers) Alberto Bocca, Alessandro Sassone, Donghwa Shin, Alberto Macii, Enrico Macii, Massimo Poncino
2015	J	`jnl`	Addressing the Smart Systems design challenge: The SMAC platform. Microprocess. Microsystems Nicola Bombieri, Dimitrios Drogoudis, Giuliana Gangemi, Renaud Gillon, Michelangelo Grosso, Enrico Macii, Massimo Poncino, Salvatore Rinaudo
2015	C	`conf`	An aging-aware battery charge scheme for mobile devices exploiting plug-in time patterns. ICCD Alberto Bocca, Alessandro Sassone, Alberto Macii, Enrico Macii, Massimo Poncino
2015	C	`conf`	An automated design flow for approximate circuits based on reduced precision redundancy. ICCD Daniele Jahier Pagliari, Andrea Calimera, Enrico Macii, Massimo Poncino
2015	C	`conf`	An equation-based battery cycle life model for various battery chemistries. VLSI-SoC Alberto Bocca, Alessandro Sassone, Donghwa Shin, Alberto Macii, Enrico Macii, Massimo Poncino
2015	—	`conf`	Characterizing the Activity Factor in NBTI Aging Models for Embedded Cores. ACM Great Lakes Symposium on VLSI Yukai Chen, Andrea Calimera, Enrico Macii, Massimo Poncino
2015	—	`conf`	Design and Characterization of Analog-to-Digital Converters using Graphene P-N Junctions. ACM Great Lakes Symposium on VLSI Roberto Giorgio Rizzo, Sandeep Miryala, Andrea Calimera, Enrico Macii, Massimo Poncino
2015	—	`conf`	Exploiting the Expressive Power of Graphene Reconfigurable Gates via Post-Synthesis Optimization. ACM Great Lakes Symposium on VLSI Sandeep Miryala, Valerio Tenace, Andrea Calimera, Enrico Macii, Massimo Poncino, Luca Gaetano Amarù, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
2015	A*	`conf`	One-pass logic synthesis for graphene-based Pass-XNOR logic circuits. DAC Valerio Tenace, Andrea Calimera, Enrico Macii, Massimo Poncino
2015	J	`jnl`	Ultra-low power circuits using graphene p-n junctions and adiabatic computing. Microprocess. Microsystems Sandeep Miryala, Valerio Tenace, Andrea Calimera, Enrico Macii, Massimo Poncino
2014	A	`conf`	A compact macromodel for the charge phase of a battery with typical charging protocol. ISLPED Donghwa Shin, Alessandro Sassone, Alberto Bocca, Alberto Macii, Enrico Macii, Massimo Poncino
2014	A	`conf`	A cross-level verification methodology for digital IPs augmented with embedded timing monitors. DATE Valerio Guarnieri, Massimo Petricca, Alessandro Sassone, Sara Vinco, Nicola Bombieri, Franco Fummi, Enrico Macii, Massimo Poncino
2014	—	`conf`	A framework for efficient evaluation and comparison of EES Models. PATMOS Sara Vinco, Alessandro Sassone, Davide Lasorsa, Enrico Macii, Massimo Poncino
2014	A	`conf`	An open-source framework for formal specification and simulation of electrical energy systems. ISLPED Sara Vinco, Alessandro Sassone, Franco Fummi, Enrico Macii, Massimo Poncino
2014	C	`conf`	Automated generation of battery aging models from datasheets. ICCD Massimo Petricca, Donghwa Shin, Alberto Bocca, Alberto Macii, Enrico Macii, Massimo Poncino
2014	A	`conf`	Cache aging reduction with improved performance using dynamically re-sizable cache. DATE Haroon Mahmood, Massimo Poncino, Enrico Macii
2014	J	`jnl`	Dynamic Indexing: Leakage-Aging Co-Optimization for Caches. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Andrea Calimera, Mirko Loghi, Enrico Macii, Massimo Poncino
2014	J	`jnl`	Energy/Lifetime Cooptimization by Cache Partitioning With Graceful Performance Degradation. IEEE Trans. Very Large Scale Integr. Syst. Haroon Mahmood, Mirko Loghi, Massimo Poncino, Enrico Macii
2014	J	`jnl`	Modeling of Physical Defects in PN Junction Based Graphene Devices. J. Electron. Test. Sandeep Miryala, Matheus Oleiro, Letícia Maria Bolzani Pöhls, Andrea Calimera, Enrico Macii, Massimo Poncino
2014	—	`conf`	Modeling of the charging behavior of li-ion batteries based on manufacturer's data. ACM Great Lakes Symposium on VLSI Alessandro Sassone, Donghwa Shin, Alberto Bocca, Alberto Macii, Enrico Macii, Massimo Poncino
2014	—	`conf`	Multi-domain simulation as a foundation for the engineering of smart systems: Challenges and the SMAC vision. ICECS Renaud Gillon, Giuliana Gangemi, Michelangelo Grosso, Franco Fummi, Massimo Poncino
2014	A	`conf`	Pass-XNOR logic: A new logic style for P-N junction based graphene circuits. DATE Valerio Tenace, Andrea Calimera, Enrico Macii, Massimo Poncino
2014	J	`jnl`	Row-based body-bias assignment for dynamic thermal clock-skew compensation. Microelectron. J. Valerio Tenace, Sandeep Miryala, Andrea Calimera, Alberto Macii, Enrico Macii, Massimo Poncino
2014	A*	`conf`	Statistical Battery Models and Variation-Aware Battery Management. DAC Donghwa Shin, Enrico Macii, Massimo Poncino
2014	A	`conf`	Thermal management of batteries using a hybrid supercapacitor architecture. DATE Donghwa Shin, Massimo Poncino, Enrico Macii
2014	C	`conf`	Ultra Low-Power Computation via Graphene-Based Adiabatic Logic Gates. DSD Sandeep Miryala, Andrea Calimera, Enrico Macii, Massimo Poncino
2013	—	`conf`	A framework with temperature-aware accuracy levels for battery modeling from datasheets. PATMOS Massimo Petricca, Donghwa Shin, Alberto Bocca, Alberto Macii, Enrico Macii, Massimo Poncino
2013	—	`conf`	A fully standard-cell delay measurement circuit for timing variability detection. PATMOS Alessandro Sassone, Massimo Petricca, Massimo Poncino, Enrico Macii
2013	A	`conf`	A statistical model of cell-to-cell variation in Li-ion batteries for system-level design. ISLPED Donghwa Shin, Massimo Poncino, Enrico Macii, Naehyuck Chang
2013	A	`conf`	A verilog-a model for reconfigurable logic gates based on graphene pn-junctions. DATE Sandeep Miryala, Mehrdad Montazeri, Andrea Calimera, Enrico Macii, Massimo Poncino
2013	A	`conf`	An automated framework for generating variable-accuracy battery models from datasheet information. ISLPED Massimo Petricca, Donghwa Shin, Alberto Bocca, Alberto Macii, Enrico Macii, Massimo Poncino
2013	A	`conf`	Computer-aided design of electrical energy systems. ICCAD Younghyun Kim, Donghwa Shin, Massimo Petricca, Sangyoung Park, Massimo Poncino, Naehyuck Chang
2013	—	`conf`	Delay model for reconfigurable logic gates based on graphene PN-junctions. ACM Great Lakes Symposium on VLSI Sandeep Miryala, Andrea Calimera, Enrico Macii, Massimo Poncino
2013	A*	`conf`	Energy-optimal SRAM supply voltage scheduling under lifetime and error constraints. DAC Andrea Calimera, Enrico Macii, Massimo Poncino
2013	—	`conf`	Exploration of different implementation styles for graphene-based reconfigurable gates. ICICDT Sandeep Miryala, Andrea Calimera, Massimo Poncino, Enrico Macii
2013	—	`conf`	Investigating the behavior of physical defects in pn-junction based reconfigurable graphene devices. LATW Sandeep Miryala, Andrea Calimera, Enrico Macii, Massimo Poncino, Letícia Maria Veiras Bolzani Poehls
2013	J	`jnl`	Layout-Driven Post-Placement Techniques for Temperature Reduction and Thermal Gradient Minimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Wei Liu, Andrea Calimera, Alberto Macii, Enrico Macii, Alberto Nannarelli, Massimo Poncino
2013	J	`jnl`	Modeling and characterization of thermally induced skew on clock distribution networks of nanometric ICs. Microelectron. J. Alessandro Sassone, Wei Liu, Andrea Calimera, Alberto Macii, Enrico Macii, Massimo Poncino
2013	—	`conf`	Power modeling and characterization of Graphene-based logic gates. PATMOS Sandeep Miryala, Andrea Calimera, Enrico Macii, Massimo Poncino
2013	C	`conf`	SMAC: Smart Systems Co-design. DSD Nicola Bombieri, Giuliana Drogoudis, Giuliana Gangemi, Renaud Gillon, Enrico Macii, Massimo Poncino, Salvatore Rinaudo, Francesco Stefanni, Dimitrios Trachanis, Mark van Helvoort
2012	C	`conf`	Aging-aware caches with graceful degradation of performance. VLSI-SoC Haroon Mahmood, Massimo Poncino, Mirko Loghi, Enrico Macii
2012	A	`conf`	Application-specific memory partitioning for joint energy and lifetime optimization. DATE Haroon Mahmood, Massimo Poncino, Mirko Loghi, Enrico Macii
2012	J	`jnl`	Design Techniques and Architectures for Low-Leakage SRAMs. IEEE Trans. Circuits Syst. I Regul. Pap. Andrea Calimera, Alberto Macii, Enrico Macii, Massimo Poncino
2012	J	`jnl`	Design Techniques for NBTI-Tolerant Power-Gating Architectures. IEEE Trans. Circuits Syst. II Express Briefs Andrea Calimera, Enrico Macii, Massimo Poncino
2012	A	`conf`	Energy-optimal caches with guaranteed lifetime. ISLPED Mirko Loghi, Haroon Mahmood, Andrea Calimera, Massimo Poncino, Enrico Macii
2012	A	`conf`	IR-drop analysis of graphene-based power distribution networks. DATE Sandeep Miryala, Andrea Calimera, Enrico Macii, Massimo Poncino
2012	A	`ed.`	International Symposium on Low Power Electronics and Design, ISLPED'12, Redondo Beach, CA, USA - July 30 - August 01, 2012 ISLPED Naresh R. Shanbhag, Massimo Poncino, Pai H. Chou, Ajith Amerasekera
2012	A	`conf`	Investigating the effects of Inverted Temperature Dependence (ITD) on clock distribution networks. DATE Alessandro Sassone, Andrea Calimera, Alberto Macii, Enrico Macii, Massimo Poncino, Richard Goldman, Vazgen Melikyan, Eduard Babayan, Salvatore Rinaudo
2012	A	`conf`	Multiple-source and multiple-destination charge migration in hybrid electrical energy storage systems. DATE Yanzhi Wang, Qing Xie, Massoud Pedram, Younghyun Kim, Naehyuck Chang, Massimo Poncino
2012	—	`conf`	NBTI effects on tree-like clock distribution networks. ACM Great Lakes Symposium on VLSI Wei Liu, Sandeep Miryala, Valerio Tenace, Andrea Calimera, Enrico Macii, Massimo Poncino
2012	—	`conf`	On-Chip NBTI and PBTI Tracking through an All-Digital Aging Monitor Architecture. PATMOS Hossein Karimiyan Alidash, Andrea Calimera, Alberto Macii, Enrico Macii, Massimo Poncino
2012	J	`jnl`	On-chip process variation-tracking through an all-digital monitoring architecture. IET Circuits Devices Syst. Hossein Karimiyan Alidash, Andrea Calimera, Alberto Macii, Enrico Macii, Massimo Poncino
2011	—	`conf`	An On-Chip All-Digital PV-Monitoring Architecture for Digital IPs. PATMOS Hossein Karimiyan, Andrea Calimera, Alberto Macii, Enrico Macii, Massimo Poncino
2011	A	`conf`	Balanced reconfiguration of storage banks in a hybrid electrical energy storage system. ICCAD Younghyun Kim, Sangyoung Park, Yanzhi Wang, Qing Xie, Naehyuck Chang, Massimo Poncino, Massoud Pedram
2011	—	`conf`	Buffering of frequent accesses for reduced cache aging. ACM Great Lakes Symposium on VLSI Andrea Calimera, Mirko Loghi, Enrico Macii, Massimo Poncino
2011	J	`jnl`	Fast Computation of Discharge Current Upper Bounds for Clustered Power Gating. IEEE Trans. Very Large Scale Integr. Syst. Ashoka Visweswara Sathanur, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino
2011	A	`conf`	Moving to Green ICT: From stand-alone power-aware IC design to an integrated approach to energy efficient design for heterogeneous electronic systems. DATE Salvatore Rinaudo, Giuliana Gangemi, Andrea Calimera, Alberto Macii, Massimo Poncino
2011	A	`conf`	Partitioned cache architectures for reduced NBTI-induced aging. DATE Andrea Calimera, Mirko Loghi, Enrico Macii, Massimo Poncino
2011	J	`jnl`	Power Efficient Variability Compensation Through Clustered Tunable Power-Gating. IEEE J. Emerg. Sel. Topics Circuits Syst. Leandro Max de Lima Silva, Andrea Calimera, Alberto Macii, Enrico Macii, Massimo Poncino
2011	A	`ed.`	Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011, Fukuoka, Japan, August 1-3, 2011 ISLPED Naehyuck Chang, Hiroshi Nakamura, Koji Inoue, Kenichi Osada, Massimo Poncino
2011	J	`jnl`	Row-Based Power-Gating: A Novel Sleep Transistor Insertion Methodology for Leakage Power Optimization in Nanometer CMOS Circuits. IEEE Trans. Very Large Scale Integr. Syst. Ashoka Visweswara Sathanur, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino
2011	—	`conf`	Sub-Row Sleep Transistor Insertion for Concurrent Clock-Gating and Power-Gating. PATMOS Karthikeyan Lingasubramanian, Andrea Calimera, Alberto Macii, Enrico Macii, Massimo Poncino
2011	A	`conf`	System level techniques to improve reliability in high power microcontrollers for automotive applications. DATE Andrea Acquaviva, Massimo Poncino, Marco Otella, Michele Sciolla
2010	J	`jnl`	A Refinement Methodology for Clock Gating Optimization at Layout Level in Digital Circuits. J. Low Power Electron. Luca Benini, Alberto Bocca, Alberto Bonanno, Alberto Macii, Enrico Macii, Jean-Luc Nagel, Christian Piguet, Massimo Poncino
2010	—	`conf`	Aging effects of leakage optimizations for caches. ACM Great Lakes Symposium on VLSI Andrea Calimera, Mirko Loghi, Enrico Macii, Massimo Poncino
2010	—	`conf`	An integrated thermal estimation framework for industrial embedded platforms. ACM Great Lakes Symposium on VLSI Andrea Acquaviva, Andrea Calimera, Alberto Macii, Massimo Poncino, Enrico Macii, Matteo Giaconia, Claudio Parrella
2010	C	`conf`	Analysis of NBTI-induced SNM degradation in power-gated SRAM cells. ISCAS Andrea Calimera, Enrico Macii, Massimo Poncino
2010	J	`jnl`	Architectural Leakage Power Minimization of Scratchpad Memories by Application-Driven Subbanking. IEEE Trans. Computers Mirko Loghi, Olga Golubeva, Enrico Macii, Massimo Poncino
2010	J	`jnl`	Dual-V Microelectron. J. Andrea Calimera, R. Iris Bahar, Enrico Macii, Massimo Poncino
2010	A	`conf`	Dynamic indexing: concurrent leakage and aging optimization for caches. ISLPED Andrea Calimera, Mirko Loghi, Enrico Macii, Massimo Poncino
2010	J	`jnl`	NBTI-Aware Clustered Power Gating. ACM Trans. Design Autom. Electr. Syst. Andrea Calimera, Enrico Macii, Massimo Poncino
2010	A	`conf`	Post-placement temperature reduction techniques. DATE Wei Liu, Alberto Nannarelli, Andrea Calimera, Enrico Macii, Massimo Poncino
2010	J	`jnl`	Temperature-Insensitive Dual- V IEEE Trans. Very Large Scale Integr. Syst. Andrea Calimera, R. Iris Bahar, Enrico Macii, Massimo Poncino
2010	J	`jnl`	Thermal-Aware Clock Tree Design to Increase Timing Reliability of Embedded SoCs. IEEE Trans. Circuits Syst. I Regul. Pap. Ashutosh Chakraborty, Karthik Duraisami, Prassanna Sithambaram, Alberto Macii, Enrico Macii, Massimo Poncino
2010	—	`conf`	Thermal-aware floorplanning exploration for 3D multi-core architectures. ACM Great Lakes Symposium on VLSI David Cuesta, José Luis Ayala, José Ignacio Hidalgo, Massimo Poncino, Andrea Acquaviva, Enrico Macii
2009	J	`jnl`	A cosimulation methodology for HW/SW validation and performance estimation. ACM Trans. Design Autom. Electr. Syst. Franco Fummi, Mirko Loghi, Massimo Poncino, Graziano Pravadelli
2009	—	`conf`	Data-Driven Clock Gating for Digital Filters. PATMOS Alberto Bonanno, Alberto Bocca, Alberto Macii, Enrico Macii, Massimo Poncino
2009	J	`jnl`	Design of a Flexible Reactivation Cell for Safe Power-Mode Transition in Power-Gated Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. Andrea Calimera, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino
2009	A	`conf`	Enabling concurrent clock and power gating in an industrial design flow. DATE Letícia Maria Veiras Bolzani, Andrea Calimera, Alberto Macii, Enrico Macii, Massimo Poncino
2009	—	`conf`	Energy-optimal synchronization primitives for single-chip multi-processors. ACM Great Lakes Symposium on VLSI Cesare Ferri, R. Iris Bahar, Mirko Loghi, Massimo Poncino
2009	J	`jnl`	Exploiting Temporal Discharge Current Information to Improve the Efficiency of Clustered Power-Gating. J. Low Power Electron. Ashoka Visweswara Sathanur, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino
2009	A	`conf`	NBTI-aware power gating for concurrent leakage and aging optimization. ISLPED Andrea Calimera, Enrico Macii, Massimo Poncino
2009	—	`conf`	NBTI-aware sleep transistor design for reliable power-gating. ACM Great Lakes Symposium on VLSI Andrea Calimera, Enrico Macii, Massimo Poncino
2009	—	`conf`	On-chip Thermal Modeling Based on SPICE Simulation. PATMOS Wei Liu, Andrea Calimera, Alberto Nannarelli, Enrico Macii, Massimo Poncino
2009	C	`conf`	Placement-aware Clustering for Integrated Clock and Power Gating. ISCAS Letícia Maria Veiras Bolzani, Andrea Calimera, Alberto Macii, Enrico Macii, Massimo Poncino
2009	—	`conf`	Reducing Timing Overhead in Simultaneously Clock-Gated and Power-Gated Designs by Placement-Aware Clustering. PATMOS Gaurang Upasani, Andrea Calimera, Alberto Macii, Enrico Macii, Massimo Poncino
2009	J	`jnl`	Tag Overflow Buffering: Reducing Total Memory Energy by Reduced-Tag Matching. IEEE Trans. Very Large Scale Integr. Syst. Mirko Loghi, Paolo Azzoni, Massimo Poncino
2009	—	`conf`	Using soft-edge flip-flops to compensate NBTI-induced delay degradation. ACM Great Lakes Symposium on VLSI Karthik Duraisami, Enrico Macii, Massimo Poncino
2008	A	`conf`	A Scalable Algorithmic Framework for Row-Based Power-Gating. DATE Ashoka Visweswara Sathanur, Antonio Pullini, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino
2008	J	`jnl`	Dynamic Thermal Clock Skew Compensation Using Tunable Delay Buffers. IEEE Trans. Very Large Scale Integr. Syst. Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino
2008	—	`conf`	Energy efficiency bounds of pulse-encoded buses. ACM Great Lakes Symposium on VLSI Karthik Duraisami, Enrico Macii, Massimo Poncino
2008	J	`jnl`	Implementation of a thermal management unit for canceling temperature-dependent clock skew variations. Integr. Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Alberto Macii, Enrico Macii, Massimo Poncino
2008	C	`conf`	Integrating Clock Gating and Power Gating for Combined Dynamic and Leakage Power Optimization in Digital CMOS Circuits. DSD Enrico Macii, Letícia Maria Veiras Bolzani, Andrea Calimera, Alberto Macii, Massimo Poncino
2008	A	`conf`	Multiple power-gating domain (multi-VGND) architecture for improved leakage power reduction. ISLPED Ashoka Visweswara Sathanur, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino
2008	C	`conf`	On quantifying the figures of merit of power-gating for leakage power minimization in nanometer CMOS circuits. ISCAS Ashoka Visweswara Sathanur, Andrea Calimera, Antonio Pullini, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino
2008	—	`conf`	Optimal sleep transistor synthesis under timing and area constraints. ACM Great Lakes Symposium on VLSI Ashoka Visweswara Sathanur, Antonio Pullini, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino
2008	A	`conf`	Reducing leakage power by accounting for temperature inversion dependence in dual-Vt synthesized circuits. ISLPED Andrea Calimera, R. Iris Bahar, Enrico Macii, Massimo Poncino
2008	—	`conf`	Temperature-insensitive synthesis using multi-vt libraries. ACM Great Lakes Symposium on VLSI Andrea Calimera, Enrico Macii, Massimo Poncino, R. Iris Bahar
2008	—	`conf`	Temporal Discharge Current Driven Clustering for Improved Leakage Power Reduction in Row-Based Power-Gating. PATMOS Ashoka Visweswara Sathanur, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino
2008	J	`jnl`	Thermal-Aware Design Techniques for Nanometer CMOS Circuits. J. Low Power Electron. Andrea Calimera, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, R. Iris Bahar, Alberto Macii, Enrico Macii, Massimo Poncino
2007	A	`conf`	Architectural leakage-aware management of partitioned scratchpad memories. DATE Olga Golubeva, Mirko Loghi, Massimo Poncino, Enrico Macii
2007	C	`conf`	Design Exploration of a Thermal Management Unit for Dynamic Control of Temperature-Induced Clock Skew. ISCAS Karthik Duraisami, Prassanna Sithambaram, Ashoka Visweswara Sathanur, Alberto Macii, Enrico Macii, Massimo Poncino
2007	—	`conf`	Design of a family of sleep transistor cells for a clustered power-gating flow in 65nm technology. ACM Great Lakes Symposium on VLSI Andrea Calimera, Antonio Pullini, Ashoka Visweswara Sathanur, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino
2007	J	`jnl`	Energy-Efficient Multiprocessor Systems-on-Chip for Embedded Computing: Exploring Programming Models and Their Architectural Support. IEEE Trans. Computers Francesco Poletti, Antonio Poggiali, Davide Bertozzi, Luca Benini, Pol Marchal, Mirko Loghi, Massimo Poncino
2007	A	`conf`	Interactive presentation: Efficient computation of discharge current upper bounds for clustered sleep transistor sizing. DATE Ashoka Visweswara Sathanur, Andrea Calimera, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino
2007	A	`conf`	Locality-driven architectural cache sub-banking for leakage energy reduction. ISLPED Olga Golubeva, Mirko Loghi, Enrico Macii, Massimo Poncino
2007	—	`conf`	On the energy efficiency of synchronization primitives for shared-memory single-chip multiprocessors. ACM Great Lakes Symposium on VLSI Olga Golubeva, Mirko Loghi, Massimo Poncino
2007	J	`jnl`	Power macromodeling of MPSoC message passing primitives. ACM Trans. Embed. Comput. Syst. Mirko Loghi, Luca Benini, Massimo Poncino
2007	J	`jnl`	SystemC co-simulation for core-based embedded systems. Des. Autom. Embed. Syst. Franco Fummi, Mirko Loghi, Giovanni Perbellini, Massimo Poncino
2007	A	`conf`	Timing-driven row-based power gating. ISLPED Ashoka Visweswara Sathanur, Antonio Pullini, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino
2006	J	`jnl`	Cache coherence tradeoffs in shared-memory MPSoCs. ACM Trans. Embed. Comput. Syst. Mirko Loghi, Massimo Poncino, Luca Benini
2006	—	`conf`	Dynamic Management of Thermally-Induced Clock Skew: An Implementation Perspective. PATMOS Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Alberto Macii, Enrico Macii, Massimo Poncino
2006	A	`conf`	Dynamic thermal clock skew compensation using tunable delay buffers. ISLPED Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino
2006	J	`jnl`	Energy-Efficient Value Based Selective Refresh for Embedded DRAMS. J. Low Power Electron. Kimish Patel, Enrico Macii, Massimo Poncino, Luca Benini
2006	—	`conf`	ISS-centric modular HW/SW co-simulation. ACM Great Lakes Symposium on VLSI Franco Fummi, Giovanni Perbellini, Mirko Loghi, Massimo Poncino
2006	C	`conf`	Implications of ultra low-voltage devices on design techniques for controlling leakage in NanoCMOS circuits. ISCAS Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Alberto Macii, Enrico Macii, Massimo Poncino
2006	J	`jnl`	Low-energy RGB color approximation for digital LCD interfaces. IEEE Trans. Consumer Electron. Massimo Poncino, Enrico Macii
2006	C	`conf`	Low-energy pixel approximation for DVI-based LCD interfaces. ISCAS A. Nurrachmat, Enrico Macii, Massimo Poncino
2006	J	`jnl`	Reducing Conflict Misses by Application-Specific Reconfigurable Indexing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Kimish Patel, Luca Benini, Enrico Macii, Massimo Poncino
2006	—	`conf`	STV-Cache: a leakage energy-efficient architecture for data caches. ACM Great Lakes Symposium on VLSI Kimish Patel, Luca Benini, Enrico Macii, Massimo Poncino
2006	A	`conf`	Synchronization-driven dynamic speed scaling for MPSoCs. ISLPED Mirko Loghi, Massimo Poncino, Luca Benini
2006	A	`conf`	Thermal resilient bounded-skew clock tree optimization methodology. DATE Ashutosh Chakraborty, Prassanna Sithambaram, Karthik Duraisami, Alberto Macii, Enrico Macii, Massimo Poncino
2005	C	`conf`	Energy-Efficient Color Approximation for Digital LCD Interfaces. ICCD Andi Nourrachmat, Sabino Salerno, Enrico Macii, Massimo Poncino
2005	—	`conf`	Energy-Efficient Value-Based Selective Refresh for Embedded DRAMs. PATMOS Kimish Patel, Luca Benini, Enrico Macii, Massimo Poncino
2005	J	`jnl`	Energy-efficient bus encoding for LCD digital display interfaces. IEEE Trans. Consumer Electron. Sabino Salerno, Enrico Macii, Massimo Poncino
2005	—	`conf`	Exploiting Cross-Channel Correlation for Energy-Efficient LCD Bus Encoding. PATMOS Ashutosh Chakraborty, Enrico Macii, Massimo Poncino
2005	A	`conf`	Exploring Energy/Performance Tradeoffs in Shared Memory MPSoCs: Snoop-Based Cache Coherence vs. Software Solutions. DATE Mirko Loghi, Massimo Poncino
2005	—	`conf`	Exploring the energy efficiency of cache coherence protocols in single-chip multi-processors. ACM Great Lakes Symposium on VLSI Mirko Loghi, Martin Letis, Luca Benini, Massimo Poncino
2005	C	`conf`	Frame Buffer Energy Optimization by Pixel Prediction. ICCD Kimish Patel, Enrico Macii, Massimo Poncino
2005	A	`conf`	Tag Overflow Buffering: An Energy-Efficient Cache Architecture. DATE Mirko Loghi, Paolo Azzoni, Massimo Poncino
2005	A	`conf`	Virtual Hardware Prototyping through Timed Hardware-Software Co-Simulation. DATE Franco Fummi, Mirko Loghi, Stefano Martini, Marco Monguzzi, Giovanni Perbellini, Massimo Poncino
2005	—	`conf`	Zero clustering: an approach to extend zero compression to instruction caches. ACM Great Lakes Symposium on VLSI Kimish Patel, Enrico Macii, Massimo Poncino
2004	—	`conf`	A Low-Power Encoding Scheme for GigaByte Video Interfaces. PATMOS Sabino Salerno, Enrico Macii, Massimo Poncino
2004	C	`conf`	Analyzing Power Consumption of Message Passing Primitives in a Single-Chip Multiprocessor. ICCD Mirko Loghi, Luca Benini, Massimo Poncino
2004	—	`conf`	Crosstalk energy reduction by temporal shielding. ISCAS (2) Sabino Salerno, Enrico Macii, Massimo Poncino
2004	—	`conf`	Cycle-accurate power analysis for multiprocessor systems-on-a-chip. ACM Great Lakes Symposium on VLSI Mirko Loghi, Massimo Poncino, Luca Benini
2004	A	`conf`	DynamoSim: a trace-based dynamically compiled instruction set simulator. ICCAD Massimo Poncino, Jianwen Zhu
2004	—	`ch.`	Energy-Efficient Shared Memory Architectures for Multi-Processor Systems-On-Chip. Ultra Low-Power Electronics and Design Kimish Patel, Alberto Macii, Massimo Poncino
2004	—	`conf`	Energy-efficient bus encoding for LCD displays. ACM Great Lakes Symposium on VLSI Alberto Bocca, Sabino Salerno, Enrico Macii, Massimo Poncino
2004	—	`conf`	Energy-performance tradeoffs for the shared memory in multi-processor systems-on-chip. ISCAS (2) Kimish Patel, Enrico Macii, Massimo Poncino
2004	A	`conf`	Heterogeneous Co-Simulation of Networked Embedded Systems. DATE Franco Fummi, Stefano Martini, Giovanni Perbellini, Massimo Poncino, Fabio Ricciato, Maura Turolla
2004	A	`conf`	Limited intra-word transition codes: an energy-efficient bus encoding for LCD display interfaces. ISLPED Sabino Salerno, Alberto Bocca, Enrico Macii, Massimo Poncino
2004	A	`conf`	Modeling and Analysis of Heterogeneous Industrial Networks Architectures. DATE Franco Fummi, Stefano Martini, Marco Monguzzi, Giovanni Perbellini, Massimo Poncino
2004	A	`conf`	Native ISS-SystemC Integration for the Co-Simulation of Multi-Processor SoC. DATE Franco Fummi, Stefano Martini, Giovanni Perbellini, Massimo Poncino
2004	A	`conf`	Reducing cache misses by application-specific re-configurable indexing. ICCAD Kimish Patel, Enrico Macii, Luca Benini, Massimo Poncino
2004	C	`conf`	Software/Network Co-Simulation of Heterogeneous Industrial Networks Architectures. ICCD Franco Fummi, Stefano Martini, Marco Monguzzi, Giovanni Perbellini, Massimo Poncino
2004	A	`conf`	Synthesis of Partitioned Shared Memory Architectures for Energy-Efficient Multi-Processor SoC. DATE Kimish Patel, Enrico Macii, Massimo Poncino
2003	—	`conf`	A Statistic Power Model for Non-synthetic RTL Operators. PATMOS Maurizio Bruno, Alberto Macii, Massimo Poncino
2003	—	`conf`	A SystemC-based Framework for Properties Incompleteness Evaluation. MTV Alessandro Fin, Franco Fummi, Massimo Poncino, Graziano Pravadelli
2003	—	`conf`	A novel architecture for power maskable arithmetic units. ACM Great Lakes Symposium on VLSI Luca Benini, Alberto Macii, Enrico Macii, Elvira Omerbegovic, Massimo Poncino, Fabrizio Pro
2003	A*	`conf`	A timing-accurate modeling and simulation environment for networked embedded systems. DAC Franco Fummi, Giovanni Perbellini, Paolo Gallo, Massimo Poncino, Stefano Martini, Fabio Ricciato
2003	—	`conf`	Combining wire swapping and spacing for low-power deep-submicron buses. ACM Great Lakes Symposium on VLSI Enrico Macii, Massimo Poncino, Sabino Salerno
2003	J	`jnl`	Discharge Current Steering for Battery Lifetime Optimization. IEEE Trans. Computers Luca Benini, Davide Bruni, Alberto Macii, Enrico Macii, Massimo Poncino
2003	J	`jnl`	Energy-aware design of embedded memories: A survey of technologies, architectures, and optimization techniques. ACM Trans. Embed. Comput. Syst. Luca Benini, Alberto Macii, Massimo Poncino
2003	A*	`conf`	Energy-aware design techniques for differential power analysis protection. DAC Luca Benini, Alberto Macii, Enrico Macii, Elvira Omerbegovic, Fabrizio Pro, Massimo Poncino
2003	A	`conf`	Energy-efficient data scrambling on memory-processor interfaces. ISLPED Luca Benini, Angelo Galati, Alberto Macii, Enrico Macii, Massimo Poncino
2003	A	`conf`	Estimation of Bus Performance for a Tuplespace in an Embedded Architecture. DATE Nicola Drago, Franco Fummi, Marco Monguzzi, Giovanni Perbellini, Massimo Poncino
2003	A	`conf`	Improving the Efficiency of Memory Partitioning by Address Clustering. DATE Alberto Macii, Enrico Macii, Massimo Poncino
2003	—	`conf`	Increasing the locality of memory access patterns by low-overhead hardware address relocation. ISCAS (5) Alberto Macii, Enrico Macii, Massimo Poncino
2003	J	`jnl`	Scheduling battery usage in mobile systems. IEEE Trans. Very Large Scale Integr. Syst. Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi
2003	J	`jnl`	SystemC Cosimulation and Emulation of Multiprocessor SoC Designs. Computer Luca Benini, Davide Bertozzi, Davide Bruni, Nicola Drago, Franco Fummi, Massimo Poncino
2002	A	`conf`	Discharge current steering for battery lifetime optimization. ISLPED Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino
2002	—	`conf`	Enhanced clustered voltage scaling for low power. ACM Great Lakes Symposium on VLSI Monica Donno, Luca Macchiarulo, Alberto Macii, Enrico Macii, Massimo Poncino
2002	J	`jnl`	Layout-driven memory synthesis for embedded systems-on-chip. IEEE Trans. Very Large Scale Integr. Syst. Luca Benini, Luca Macchiarulo, Alberto Macii, Massimo Poncino
2002	C	`conf`	Legacy SystemC Co-Simulation of Multi-Processor Systems-on-Chip. ICCD Luca Benini, Davide Bertozzi, Davide Bruni, Nicola Drago, Franco Fummi, Massimo Poncino
2002	—	`book`	Memory design techniques for low energy embedded systems. Alberto Macii, Luca Benini, Massimo Poncino
2002	J	`jnl`	Minimizing memory access energy in embedded systems by selective instruction compression. IEEE Trans. Very Large Scale Integr. Syst. Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino
2002	A	`conf`	Wire Placement for Crosstalk Energy Minimization in Address Buses. DATE Luca Macchiarulo, Enrico Macii, Massimo Poncino
2001	—	`conf`	Current-controlled policies for battery-driven dynamic power management. ICECS Giuliano Castelli, Alberto Macii, Enrico Macii, Massimo Poncino
2001	J	`jnl`	Discrete-time battery models for system-level low-power design. IEEE Trans. Very Large Scale Integr. Syst. Luca Benini, Giuliano Castelli, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi
2001	A	`conf`	Extending lifetime of portable systems by battery scheduling. DATE Luca Benini, Giuliano Castelli, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi
2001	—	`conf`	Fast characterization of RTL power macromodels. ICECS Manuela Anton, Ionel Colonescu, Enrico Macii, Massimo Poncino
2001	A*	`conf`	From Architecture to Layout: Partitioned Memory Synthesis for Embedded Systems-on-Chip. DAC Luca Benini, Luca Macchiarulo, Alberto Macii, Enrico Macii, Massimo Poncino
2001	A	`conf`	Low-energy for deep-submicron address buses. ISLPED Luca Macchiarulo, Enrico Macii, Massimo Poncino
2001	J	`jnl`	Parameterized RTL power models for soft macros. IEEE Trans. Very Large Scale Integr. Syst. Alessandro Bogliolo, Roberto Corgnati, Enrico Macii, Massimo Poncino
2001	J	`jnl`	Stream synthesis for efficient power simulation based on spectral transforms. IEEE Trans. Very Large Scale Integr. Syst. Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi
2001	J	`jnl`	Synthesis of power-managed sequential components based oncomputational kernel extraction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Luca Benini, Giovanni De Micheli, Antonio Lioy, Enrico Macii, Giuseppe Odasso, Massimo Poncino
2000	A	`conf`	A Discrete-Time Battery Model for High-Level Power Estimation. DATE Luca Benini, Giuliano Castelli, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi
2000	J	`jnl`	A multilevel engine for fast power simulation of realistic inputstreams. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Luca Benini, Giovanni De Micheli, Enrico Macii, Massimo Poncino, Riccardo Scarsi
2000	A	`conf`	A recursive algorithm for low-power memory partitioning. ISLPED Luca Benini, Alberto Macii, Massimo Poncino
2000	J	`jnl`	Architectures and synthesis algorithms for power-efficient businterfaces. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Luca Benini, Alberto Macii, Massimo Poncino, Riccardo Scarsi
2000	J	`jnl`	Glitch power minimization by selective gate freezing. IEEE Trans. Very Large Scale Integr. Syst. Luca Benini, Giovanni De Micheli, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi
2000	J	`jnl`	Increasing Energy Efficiency of Embedded Systems by Application-Specific Memory Hierarchy Generation. IEEE Des. Test Comput. Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino
2000	—	`conf`	Power Macromodeling for a High Quality RT-Level Power Estimation. ISQED Roberto Zafalon, Massimo Rossello, Enrico Macii, Massimo Poncino
2000	—	`conf`	Power Models for Semi-autonomous RTL Macros. PATMOS Alessandro Bogliolo, Enrico Macii, Virgil Mihailovici, Massimo Poncino
2000	—	`conf`	RTL Estimation of Steering Logic Power. PATMOS Crina Anton, Pierluigi Civera, Ionel Colonescu, Enrico Macii, Massimo Poncino, Alessandro Bogliolo
2000	—	`conf`	Regression-based RTL power models for controllers. ACM Great Lakes Symposium on VLSI Luca Benini, Alessandro Bogliolo, Enrico Macii, Massimo Poncino, Mihai Surmei
2000	—	`conf`	Supporting system-level power exploration for DSP applications. ACM Great Lakes Symposium on VLSI Luca Benini, Marco Ferrero, Alberto Macii, Enrico Macii, Massimo Poncino
2000	J	`jnl`	Symbolic optimization of interacting controllers based onredundancy identification and removal. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Fabrizio Ferrandi, Franco Fummi, Enrico Macii, Massimo Poncino, Donatella Sciuto
2000	A*	`conf`	Synthesis of application-specific memories for power optimization in embedded systems. DAC Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino
1999	J	`jnl`	Automatic Synthesis of Large Telescopic Units Based on Near-Minimum Timed Supersetting. IEEE Trans. Computers Luca Benini, Giovanni De Micheli, Antonio Lioy, Enrico Macii, Giuseppe Odasso, Massimo Poncino
1999	—	`conf`	Clustered Table-Based Macromodels for RTL Power Estimation. Great Lakes Symposium on VLSI Roberto Corgnati, Enrico Macii, Massimo Poncino
1999	A	`conf`	Glitch Power Minimization by Gate Freezing. DATE Luca Benini, Giovanni De Micheli, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi
1999	A*	`conf`	Kernel-Based Power Optimization of RTL Components: Exact and Approximate Extraction Algorithms. DAC Luca Benini, Giovanni De Micheli, Enrico Macii, Giuseppe Odasso, Massimo Poncino
1999	A	`conf`	Parameterized RTL power models for combinational soft macros. ICCAD Alessandro Bogliolo, Roberto Corgnati, Enrico Macii, Massimo Poncino
1999	—	`conf`	Region Compression: A New Scheme for Memory Energy Minimization in Embedded Systems. EUROMICRO Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino
1999	—	`conf`	Regression-Based Macromodeling for Delay Estimation of Behavioral Components. Great Lakes Symposium on VLSI Alberto Macii, Enrico Macii, Giuseppe Odasso, Massimo Poncino, Riccardo Scarsi
1999	A	`conf`	Selective instruction compression for memory energy reduction in embedded systems. ISLPED Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino
1999	J	`jnl`	Symbolic synthesis of clock-gating logic for power optimization of synchronous controllers. ACM Trans. Design Autom. Electr. Syst. Luca Benini, Giovanni De Micheli, Enrico Macii, Massimo Poncino, Riccardo Scarsi
1999	A*	`conf`	Synthesis of Low-Overhead Interfaces for Power-Efficient Communication over Wide Buses. DAC Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi
1998	A*	`conf`	Computational Kernels and their Application to Sequential Power Optimization. DAC Luca Benini, Giovanni De Micheli, Antonio Lioy, Enrico Macii, Giuseppe Odasso, Massimo Poncino
1998	A	`conf`	Power Estimation of Behavioral Descriptions. DATE Fabrizio Ferrandi, Franco Fummi, Enrico Macii, Massimo Poncino
1998	J	`jnl`	Power optimization of core-based systems by address bus encoding. IEEE Trans. Very Large Scale Integr. Syst. Luca Benini, Giovanni De Micheli, Enrico Macii, Massimo Poncino, Stefano Quer
1998	—	`conf`	Reducing Power Consumption of Dedicated Processors Through Instruction Set Encoding. Great Lakes Symposium on VLSI Luca Benini, Giovanni De Micheli, Alberto Macii, Enrico Macii, Massimo Poncino
1998	A	`conf`	Stream synthesis for efficient power simulation based on spectral transforms. ISLPED Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi
1998	A	`conf`	Symbolic algorithms for layout-oriented synthesis of pass transistor logic circuits. ICCAD Fabrizio Ferrandi, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi, Fabio Somenzi
1998	J	`jnl`	Telescopic units: a new paradigm for performance optimization of VLSI designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Luca Benini, Enrico Macii, Massimo Poncino, Giovanni De Micheli
1998	—	`conf`	Timed Supersetting and the Synthesis of Telescopic Units. Great Lakes Symposium on VLSI Luca Benini, Giovanni De Micheli, Antonio Lioy, Enrico Macii, Giuseppe Odasso, Massimo Poncino
1997	—	`conf`	A parallel approach to symbolic traversal based on set partitioning. CHARME Gianpiero Cabodi, Paolo Camurati, Antonio Lioy, Massimo Poncino, Stefano Quer
1997	—	`conf`	Accurate Entropy Calculation for Large Logic Circuits Based on Output Clustering. Great Lakes Symposium on VLSI Antonio Lioy, Enrico Macii, Massimo Poncino, Massimo Rossello
1997	A	`conf`	Fast power estimation for deterministic input streams. ICCAD Luca Benini, Giovanni De Micheli, Enrico Macii, Massimo Poncino, Riccardo Scarsi
1997	—	`conf`	Symbolic synthesis of clock-gating logic for power optimization of control-oriented synchronous networks. ED&TC Luca Benini, Giovanni De Micheli, Enrico Macii, Massimo Poncino, Riccardo Scarsi
1997	A	`conf`	System-level power optimization of special purpose applications: the beach solution. ISLPED Luca Benini, Giovanni De Micheli, Enrico Macii, Massimo Poncino, Stefano Quer
1997	A*	`conf`	Telescopic Units: Increasing the Average Throughput of Pipelined Designs by Adaptive Latency Control. DAC Luca Benini, Enrico Macii, Massimo Poncino
1997	J	`jnl`	Testing Core-Based Systems: A Symbolic Methodology. IEEE Des. Test Comput. Fabrizio Ferrandi, Franco Fummi, Donatella Sciuto, Enrico Macii, Massimo Poncino
1996	J	`jnl`	Automatic state space decomposition for approximate FSM traversal based on circuit analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Massimo Poncino, Fabio Somenzi
1996	—	`conf`	BDD-based testability estimation of VHDL designs. EURO-DAC Enrico Macii, Massimo Poncino, Fabrizio Ferrandi, Franco Fummi, Donatella Sciuto
1996	C	`conf`	Enhancing FSM Traversal by Temporary Re-Encoding. ICCD Gianpiero Cabodi, Luciano Lavagno, Enrico Macii, Massimo Poncino, Stefano Quer, Paolo Camurati, Ellen Sentovich
1996	—	`conf`	Exact Computation of the Entropy of a Logic Circuit. Great Lakes Symposium on VLSI Enrico Macii, Massimo Poncino
1996	A*	`conf`	Symbolic Optimization of FSM Networks Based on Sequential ATPG Techniques. DAC Fabrizio Ferrandi, Franco Fummi, Enrico Macii, Massimo Poncino, Donatella Sciuto
1996	—	`conf`	Test Generation for Networks of Interacting FSMs Using Symbolic Techniques. Great Lakes Symposium on VLSI Fabrizio Ferrandi, Franco Fummi, Enrico Macii, Massimo Poncino, Donatella Sciuto
1995	A*	`conf`	Computing the Maximum Power Cycles of a Sequential Circuit. DAC Srilatha Manne, Abelardo Pardo, R. Iris Bahar, Gary D. Hachtel, Fabio Somenzi, Enrico Macii, Massimo Poncino
1995	—	`conf`	Estimating worst-case power consumption of CMOS circuits modeled as symbolic neural networks. Great Lakes Symposium on VLSI Enrico Macii, Massimo Poncino
1995	—	`conf`	Predicting the functional complexity of combinational circuits by symbolic spectral analysis of Boolean functions. EURO-DAC Enrico Macii, Massimo Poncino
1995	J	`jnl`	Using connectivity and spectral methods to characterize the structure of sequential logic circuits. Microprocess. Microprogramming Enrico Macii, Massimo Poncino
1995	—	`conf`	Using symbolic Rademacher-Walsh spectral transforms to evaluate the correlation between Boolean functions. Great Lakes Symposium on VLSI Enrico Macii, Massimo Poncino
1994	—	`conf`	A State Space Decomposition Algorithm for Approximate FSM Traversal. EDAC-ETC-EUROASIC Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Massimo Poncino, Fabio Somenzi
1994	C	`conf`	A Structural Approach to State Space Decomposition for Approximate Reachability Analysis. ICCD Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Massimo Poncino, Fabio Somenzi
1994	—	`conf`	An ADD-based algorithm for shortest path back-tracing of large graphs. Great Lakes Symposium on VLSI R. Iris Bahar, Gary D. Hachtel, Abelardo Pardo, Massimo Poncino, Fabio Somenzi
1994	A	`conf`	Re-encoding sequential circuits to reduce power dissipation. ICCAD Gary D. Hachtel, Mariano Hermida de la Rica, Abelardo Pardo, Massimo Poncino, Fabio Somenzi
1993	J	`jnl`	A study of the resetability of synchronous sequential circuits. Microprocess. Microprogramming Antonio Lioy, Massimo Poncino
1993	C	`conf`	On the Resetability of Synchronous Sequential Circuits. ISCAS Antonio Lioy, Massimo Poncino
1991	—	`conf`	A hierarchical multi-level test generation system. Great Lakes Symposium on VLSI Antonio Lioy, Massimo Poncino