Masood Qazi

13 papers A 3Journal 6Unranked 3
YearRankTypeTitle / Venue / Authors
2014 J jnl
A 3.4-pJ FeRAM-Enabled D Flip-Flop in 0.13-µm CMOS for Nonvolatile Processing in Digital Systems.
IEEE J. Solid State Circuits
Masood Qazi, Ajith Amerasekera, Anantha P. Chandrakasan
2013 A conf
40.4fJ/bit/mm low-swing on-chip signaling with self-resetting logic repeaters embedded within a mesh NoC in 45nm SOI CMOS.
DATE
Sunghyun Park, Masood Qazi, Li-Shiuan Peh, Anantha P. Chandrakasan
2013 — conf
A 3.4pJ FeRAM-enabled D flip-flop in 0.13µm CMOS for nonvolatile processing in digital systems.
ISSCC
Masood Qazi, Ajith Amerasekera, Anantha P. Chandrakasan
2013 J jnl
Technique for Efficient Evaluation of SRAM Timing Failure.
IEEE Trans. Very Large Scale Integr. Syst.
Masood Qazi, Mehul Tikekar, Lara Dolecek, Devavrat Shah, Anantha P. Chandrakasan
2012 J jnl
A Low-Voltage 1 Mb FRAM in 0.13 µm CMOS Featuring Time-to-Digital Sensing for Expanded Operating Margin.
IEEE J. Solid State Circuits
Masood Qazi, Michael Clinton, Steven Bartling, Anantha P. Chandrakasan
2012 — —
Circuit design for embedded memory in low-power integrated circuits.
Masood Qazi
2012 J jnl
Design of Low-Voltage Digital Building Blocks and ADCs for Energy-Efficient Systems.
IEEE Trans. Circuits Syst. II Express Briefs
Mahmut E. Sinangil, Marcus Yip, Masood Qazi, Rahul Rithe, Joyce Kwong, Anantha P. Chandrakasan
2011 J jnl
A 512kb 8T SRAM Macro Operating Down to 0.57 V With an AC-Coupled Sense Amplifier and Embedded Data-Retention-Voltage Sensor in 45 nm SOI CMOS.
IEEE J. Solid State Circuits
Masood Qazi, Kevin Stawiasz, Leland Chang, Anantha P. Chandrakasan
2011 — conf
A low-voltage 1Mb FeRAM in 0.13μm CMOS featuring time-to-digital sensing for expanded operating margin in scaled CMOS.
ISSCC
Masood Qazi, Michael Clinton, Steven Bartling, Anantha P. Chandrakasan
2011 J jnl
Challenges and Directions for Low-Voltage SRAM.
IEEE Des. Test Comput.
Masood Qazi, Mahmut E. Sinangil, Anantha P. Chandrakasan
2010 — conf
A 512kb 8T SRAM macro operating down to 0.57V with an AC-coupled sense amplifier and embedded data-retention-voltage sensor in 45nm SOI CMOS.
ISSCC
Masood Qazi, Kevin Stawiasz, Leland Chang, Anantha P. Chandrakasan
2010 A conf
Loop flattening & spherical sampling: Highly efficient model reduction techniques for SRAM yield analysis.
DATE
Masood Qazi, Mehul Tikekar, Lara Dolecek, Devavrat Shah, Anantha P. Chandrakasan
2008 A conf
Breaking the simulation barrier: SRAM evaluation through norm minimization.
ICCAD
Lara Dolecek, Masood Qazi, Devavrat Shah, Anantha P. Chandrakasan