Masayuki Sato - RankMe

65 papers A 1C 7Journal 15Unranked 42

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	An analysis of memory access patterns in RISC-V vector workloads on heterogeneous memory architectures. SCA/HPC Asia Workshops Ryo Yokoyama, Masahito Kumagai, Kazuhiko Komatsu, Masayuki Sato, Hiroaki Kobayashi
2025	—	`conf`	A Compressed QUBO Format for Traveling Salesperson Problems. IPDPS (Workshops) Chu-Yuan Huang, Kazuhiko Komatsu, Makoto Onoda, Masahito Kumagai, Masayuki Sato, Hiroaki Kobayashi
2025	C	`conf`	A Fast Block Partitioning Decision Method Using Luminance Textures for VVC Encoders. ICCE Rikita Uchiyama, Karin Onouchi, Naoya Niwa, Masayuki Sato, Hiroaki Kobayashi, Hiroe Iwasaki
2025	J	`jnl`	Adaptive Parallelization Based on Frame-Level and Tile-Level Parallelisms for VVC Encoding. Concurr. Comput. Pract. Exp. Karin Onouchi, Masayuki Sato, Hiroe Iwasaki, Kazuhiko Komatsu, Hiroaki Kobayashi
2025	—	`conf`	Classification of Three-dimensional Electron Diffraction Data with a Large Language Model. SC Workshops Kazuyuki Yasuda, Masahito Kumagai, Masayuki Sato, Kazuhiko Komatsu, Hiroaki Kobayashi
2025	—	`conf`	Disaster Rescue Resource Allocation Based on the Ising Model. MCSoC Kosei Nakamoto, Masahito Kumagai, Masayuki Sato, Kazuhiko Komatsu, Hiroaki Kobayashi
2025	C	`conf`	Performance Evaluation of Vector Annealing on Multiple Nodes Using the Traveling Salesperson Problem. ISC Makoto Onoda, Kazuhiko Komatsu, Kotaro Bannai, Shintaro Momose, Masayuki Sato, Hiroaki Kobayashi
2024	—	`conf`	A Graph-based Molecular Structure Identification Method via Feature Extraction for Three-dimensional Electron Diffraction Data. CANDARW Yusuke Fukasawa, Kazuhiko Komatsu, Masayuki Sato, Saori Maki-Yonekura, Hirofumi Kurokawa, Koji Yonekura, Hiroaki Kobayashi
2024	—	`conf`	Adaptive Parallelization based on Frame-level and Tile-level Parallelisms for VVC Encoding. CANDAR Karin Onouchi, Masayuki Sato, Hiroe Iwasaki, Kazuhiko Komatsu, Hiroaki Kobayashi
2023	—	`conf`	A Constraint Partition Method for Combinatorial Optimization Problems. MCSoC Makoto Onoda, Kazuhiko Komatsu, Masahito Kumagai, Masayuki Sato, Hiroaki Kobayashi
2023	J	`jnl`	A dynamic parameter tuning method for SpMM parallel execution. Concurr. Comput. Pract. Exp. Bin Qi, Kazuhiko Komatsu, Masayuki Sato, Hiroaki Kobayashi
2023	J	`jnl`	An Efficient Reference Image Sharing Method for the Image-Division Parallel Video Encoding Architecture. IEICE Trans. Electron. Ken Nakamura, Yuya Omori, Daisuke Kobayashi, Koyo Nitta, Kimikazu Sano, Masayuki Sato, Hiroe Iwasaki, Hiroaki Kobayashi
2023	—	`conf`	Appropriate Graph-Algorithm Selection for Edge Devices Using Machine Learning. MCSoC Yusuke Fukasawa, Kazuhiko Komatsu, Masayuki Sato, Hiroaki Kobayashi
2023	J	`jnl`	Ising-Based Kernel Clustering. Algorithms Masahito Kumagai, Kazuhiko Komatsu, Masayuki Sato, Hiroaki Kobayashi
2023	C	`conf`	Multi-scale Loss based Electron Microscopic Image Pair Matching Method. ICMLA Chunting Duan, Kazuhiko Komatsu, Masayuki Sato, Hiroaki Kobayashi
2023	—	`conf`	Performance Evaluation of Tsunami Evacuation Route Planning on Multiple Annealing Machines. CF Yihui Liu, Kazuhiko Komatsu, Masahito Kumagai, Masayuki Sato, Hiroaki Kobayashi
2022	J	`jnl`	A Metadata Prefetching Mechanism for Hybrid Memory Architectures. IEICE Trans. Electron. Shunsuke Tsukada, Hikaru Takayashiki, Masayuki Sato, Kazuhiko Komatsu, Hiroaki Kobayashi
2022	C	`conf`	A Partitioned Memory Architecture with Prefetching for Efficient Video Encoders. PDCAT Masayuki Sato, Yuya Omori, Ryusuke Egawa, Ken Nakamura, Daisuke Kobayashi, Hiroe Iwasaki, Kazuhiko Komatsu, Hiroaki Kobayashi
2022	—	`conf`	An Efficient Reference Image Sharing Method for the Parallel Video Encoding Architecture. COOL CHIPS Ken Nakamura, Yuya Omori, Daisuke Kobayashi, Koyo Nitta, Kimikazu Sano, Masayuki Sato, Hiroe Iwasaki, Hiroaki Kobayashi
2022	—	`conf`	Page-Address Coalescing of Vector Gather Instructions for Efficient Address Translation. IA3@SC Hikaru Takayashiki, Masayuki Sato, Kazuhiko Komatsu, Hiroaki Kobayashi
2021	—	`conf`	A Metadata Prefetching Mechanism for Hybrid Memory Architectures. COOL CHIPS Shunsuke Tsukada, Hikaru Takayashiki, Masayuki Sato, Kazuhiko Komatsu, Hiroaki Kobayashi
2021	—	`conf`	A Processor Selection Method based on Execution Time Estimation for Machine Learning Programs. IPDPS Workshops Kou Murakami, Kazuhiko Komatsu, Masayuki Sato, Hiroaki Kobayashi
2021	J	`jnl`	An External Definition of the One-Hot Constraint and Fast QUBO Generation for High-Performance Combinatorial Clustering. Int. J. Netw. Comput. Masahito Kumagai, Kazuhiko Komatsu, Fumiyo Takano, Takuya Araki, Masayuki Sato, Hiroaki Kobayashi
2021	—	`conf`	An Externally-Constrained Ising Clustering Method for Material Informatics. CANDAR (Workshops) Kazuhiko Komatsu, Masahito Kumagai, Ji Qi, Masayuki Sato, Hiroaki Kobayashi
2021	J	`jnl`	Efficient Mixed-Precision Tall-and-Skinny Matrix-Matrix Multiplication for GPUs. Int. J. Netw. Comput. Hao Tang, Kazuhiko Komatsu, Masayuki Sato, Hiroaki Kobayashi
2021	—	`conf`	Ising-Based Combinatorial Clustering Using the Kernel Method. MCSoC Masahito Kumagai, Kazuhiko Komatsu, Masayuki Sato, Hiroaki Kobayashi
2021	—	`conf`	Optimizations of a Linear Matrix Solver in a Composite Simulation for a Vector Computer. PAAP Zhilin He, Kazuhiko Komatsu, Masayuki Sato, Hiroaki Kobayashi
2021	J	`jnl`	Optimizing Load Balance in a Parallel CFD Code for a Large-scale Turbine Simulation on a Vector Supercomputer. Supercomput. Front. Innov. Osamu Watanabe, Kazuhiko Komatsu, Masayuki Sato, Hiroaki Kobayashi
2021	J	`jnl`	Performance and Power Analysis of a Vector Computing System. Supercomput. Front. Innov. Kazuhiko Komatsu, Akito Onodera, Erich Focht, Soya Fujimoto, Yoko Isobe, Shintaro Momose, Masayuki Sato, Hiroaki Kobayashi
2021	C	`conf`	Register Flush-free Runahead Execution for Modern Vector Processors. SBAC-PAD Hikaru Takayashiki, Masayuki Sato, Kazuhiko Komatsu, Hiroaki Kobayashi
2020	—	`conf`	A Deep Reinforcement Learning Based Feature Selector. PAAP Yiran Cheng, Kazuhiko Komatsu, Masayuki Sato, Hiroaki Kobayashi
2020	C	`conf`	A Dynamic Parameter Tuning Method for High Performance SpMM. PDCAT Bin Qi, Kazuhiko Komatsu, Masayuki Sato, Hiroaki Kobayashi
2020	—	`conf`	An Efficient Skinny Matrix-Matrix Multiplication Method by Folding Input Matrices into Tensor Core Operations. CANDAR (Workshops) Hao Tang, Kazuhiko Komatsu, Masayuki Sato, Hiroaki Kobayashi
2020	—	`conf`	Combinatorial Clustering Based on an Externally-Defined One-Hot Constraint. CANDAR Masahito Kumagai, Kazuhiko Komatsu, Fumiyo Takano, Takuya Araki, Masayuki Sato, Hiroaki Kobayashi
2020	—	`conf`	Energy-efficient Design of an STT-RAM-based Hybrid Cache Architecture. COOL CHIPS Masayuki Sato, Xue Hao, Kazuhiko Komatsu, Hiroaki Kobayashi
2020	—	`conf`	Importance of Selecting Data Layouts in the Tsunami Simulation Code. IPDPS Workshops Takumi Kishitani, Kazuhiko Komatsu, Masayuki Sato, Akihiro Musa, Hiroaki Kobayashi
2020	—	`conf`	Optimization of the Himeno Benchmark for SX-Aurora TSUBASA. Bench Akito Onodera, Kazuhiko Komatsu, Soya Fujimoto, Yoko Isobe, Masayuki Sato, Hiroaki Kobayashi
2019	—	`conf`	A Hardware Prefetching Mechanism for Vector Gather Instructions. IA3@SC Hikaru Takayashiki, Masayuki Sato, Kazuhiko Komatsu, Hiroaki Kobayashi
2019	—	`conf`	A Layer-Adaptable Cache Hierarchy by a Multiple-layer Bypass Mechanism. HEART Ryusuke Egawa, Ryoma Saito, Masayuki Sato, Hiroaki Kobayashi
2019	J	`jnl`	A Skewed Multi-banked Cache for Many-core Vector Processors. Supercomput. Front. Innov. Hikaru Takayashiki, Masayuki Sato, Kazuhiko Komatsu, Hiroaki Kobayashi
2019	—	`conf`	An Appropriate Computing System and Its System Parameters Selection Based on Bottleneck Prediction of Applications. IPDPS Workshops Kazuhiko Komatsu, Takumi Kishitani, Masayuki Sato, Hiroaki Kobayashi
2019	J	`jnl`	An Energy-aware Dynamic Data Allocation Mechanism for Many-channel Memory Systems. Supercomput. Front. Innov. Masayuki Sato, Takuya Toyoshima, Hikaru Takayashiki, Ryusuke Egawa, Hiroaki Kobayashi
2019	—	`conf`	Optimizing Memory Layout of Hyperplane Ordering for Vector Supercomputer SX-Aurora TSUBASA. MCHPC@SC Osamu Watanabe, Yuta Hougi, Kazuhiko Komatsu, Masayuki Sato, Akihiro Musa, Hiroaki Kobayashi
2019	—	`conf`	Perceptron-based Cache Bypassing for Way-Adaptable Caches. COOL CHIPS Masayuki Sato, Yongcheng Chen, Haruya Kikuchi, Kazuhiko Komatsu, Hiroaki Kobayashi
2019	—	`conf`	Performance Evaluation of Tsunami Inundation Simulation on SX-Aurora TSUBASA. ICCS (2) Akihiro Musa, Takashi Abe, Takumi Kishitani, Takuya Inoue, Masayuki Sato, Kazuhiko Komatsu, Yoichi Murashima, Shunichi Koshimura, Hiroaki Kobayashi
2018	J	`jnl`	An Adjacent-Line-Merging Writeback Scheme for STT-RAM-Based Last-Level Caches. IEEE Trans. Multi Scale Comput. Syst. Masayuki Sato, Yoshiki Shoji, Zentaro Sakai, Ryusuke Egawa, Hiroaki Kobayashi
2018	—	`conf`	An energy-aware set-level refreshing mechanism for eDRAM last-level caches. COOL CHIPS Masayuki Sato, Zehua Li, Ryusuke Egawa, Hiroaki Kobayashi
2018	A	`conf`	Performance evaluation of a vector supercomputer SX-aurora TSUBASA. SC Kazuhiko Komatsu, Shintaro Momose, Yoko Isobe, Osamu Watanabe, Akihiro Musa, Mitsuo Yokokawa, Toshikazu Aoyama, Masayuki Sato, Hiroaki Kobayashi
2018	—	`conf`	Search Space Reduction for Parameter Tuning of a Tsunami Simulation on the Intel Knights Landing Processor. MCSoC Kazuhiko Komatsu, Takumi Kishitani, Masayuki Sato, Akihiro Musa, Hiroaki Kobayashi
2017	—	`conf`	An Adaptive Demotion Policy for High-Associativity Caches. HEART Jubee Tada, Masayuki Sato, Ryusuke Egawa
2017	—	`conf`	An Adjacent-Line-Merging Writeback Scheme for STT-RAM last-level caches. COOL Chips Masayuki Sato, Zentaro Sakai, Ryusuke Egawa, Hiroaki Kobayashi
2017	—	`conf`	An application-adaptive data allocation method for multi-channel memory. COOL Chips Takuya Toyoshima, Masayuki Sato, Ryusuke Egawa, Hiroaki Kobayashi
2016	—	`conf`	A cache partitioning mechanism to protect shared data for CMPs. COOL Chips Masayuki Sato, Shin Nishimura, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2016	—	`conf`	A power-aware LLC control mechanism for the 3D-stacked memory system. 3DIC Ryusuke Egawa, Wataru Uno, Masayuki Sato, Hiroaki Kobayashi, Jubee Tada
2015	—	`conf`	An energy-efficient dynamic memory address mapping mechanism. COOL Chips Masayuki Sato, Chengguang Han, Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2015	J	`jnl`	FLEXII: A Flexible Insertion Policy for Dynamic Cache Resizing Mechanisms. IEICE Trans. Electron. Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2014	—	`conf`	An energy optimization method for vector processing mechanisms. COOL Chips Ye Gao, Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2014	J	`jnl`	MVP-Cache: A Multi-Banked Cache Memory for Energy-Efficient Vector Processing of Multimedia Applications. IEICE Trans. Inf. Syst. Ye Gao, Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2014	—	`conf`	On-chip checkpointing with 3D-stacked memories. 3DIC Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2013	J	`jnl`	A Capacity-Aware Thread Scheduling Method Combined with Cache Partitioning to Reduce Inter-Thread Cache Conflicts. IEICE Trans. Inf. Syst. Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2013	—	`conf`	A flexible insertion policy for dynamic cache resizing mechanisms. COOL Chips Masayuki Sato, Yusuke Tobo, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2013	—	`conf`	Vertically integrated processor and memory module design for vector supercomputers. 3DIC Ryusuke Egawa, Masayuki Sato, Jubee Tada, Hiroaki Kobayashi
2012	—	`conf`	A capacity-efficient insertion policy for dynamic cache resizing mechanisms. Conf. Computing Frontiers Masayuki Sato, Yusuke Tobo, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2010	—	`conf`	A Majority-Based Control Scheme for Way-Adaptable Caches. Facing the Multicore-Challenge Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2010	C	`conf`	A voting-based working set assessment scheme for dynamic cache resizing mechanisms. ICCD Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi