Masayuki Hiromoto

50 papers A* 5A 6B 3C 2Journal 19Unranked 15
YearRankTypeTitle / Venue / Authors
2023 A conf
Improving Predicate Representation in Scene Graph Generation by Self-Supervised Learning.
WACV
So Hasegawa, Masayuki Hiromoto, Akira Nakagawa, Yuhei Umeda
2022 J jnl
SimpleZSL: Extremely Simple and Fast Zero-Shot Learning with Nearest Neighbor Classifiers.
IEICE Trans. Inf. Syst.
Masayuki Hiromoto, Hisanao Akima, Teruo Ishihara, Takuji Yamamoto
2020 A* conf
ENSEI: Efficient Secure Inference via Frequency-Domain Homomorphic Convolution for Privacy-Preserving Visual Recognition.
CVPR
Song Bian, Tianchen Wang, Masayuki Hiromoto, Yiyu Shi, Takashi Sato
2020 J jnl
ENSEI: Efficient Secure Inference via Frequency-Domain Homomorphic Convolution for Privacy-Preserving Visual Recognition.
CoRR
Song Bian, Tianchen Wang, Masayuki Hiromoto, Yiyu Shi, Takashi Sato
2019 A conf
DArL: Dynamic Parameter Adjustment for LWE-based Secure Inference.
DATE
Song Bian, Masayuki Hiromoto, Takashi Sato
2019 A* conf
Filianore: Better Multiplier Architectures for LWE-based Post-Quantum Key Exchange.
DAC
Song Bian, Masayuki Hiromoto, Takashi Sato
2019 J jnl
GPU-based Ising computing for solving max-cut combinatorial optimization problems.
Integr.
Chase Cook, Hengyang Zhao, Takashi Sato, Masayuki Hiromoto, Sheldon X.-D. Tan
2019 J jnl
Hardware-Accelerated Secured Naïve Bayesian Filter Based on Partially Homomorphic Encryption.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Song Bian, Masayuki Hiromoto, Takashi Sato
2019 — conf
Towards practical homomorphic email filtering: a hardware-accelerated secure naïve bayesian filter.
ASP-DAC
Song Bian, Masayuki Hiromoto, Takashi Sato
2018 — conf
A study on NBTI-induced delay degradation considering stress frequency dependence.
ISQED
Zuitoku Shin, Shumpei Morita, Song Bian, Michihiro Shintani, Masayuki Hiromoto, Takashi Sato
2018 J jnl
Area Efficient Annealing Processor for Ising Model without Random Number Generator.
IEICE Trans. Inf. Syst.
Hidenori Gyoten, Masayuki Hiromoto, Takashi Sato
2018 J jnl
Coin Flipping PUF: A Novel PUF With Improved Resistance Against Machine Learning Attacks.
IEEE Trans. Circuits Syst. II Express Briefs
Yuki Tanaka, Song Bian, Masayuki Hiromoto, Takashi Sato
2018 A* conf
DWE: decrypting learning with errors with errors.
DAC
Song Bian, Masayuki Hiromoto, Takashi Sato
2018 J jnl
Efficient Mini-Batch Training on Memristor Neural Network Integrating Gradient Calculation and Weight Update.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Satoshi Yamamori, Masayuki Hiromoto, Takashi Sato
2018 — conf
Efficient worst-case timing analysis of critical-path delay under workload-dependent aging degradation.
ASP-DAC
Shumpei Morita, Song Bian, Michihiro Shintani, Masayuki Hiromoto, Takashi Sato
2018 A conf
Enhancing the solution quality of hardware ising-model solver via parallel tempering.
ICCAD
Hidenori Gyoten, Masayuki Hiromoto, Takashi Sato
2018 — conf
Fast And Robust Heart Rate Estimation From Videos Through Dynamic Region Selection.
EMBC
Yuya Fujita, Masayuki Hiromoto, Takashi Sato
2018 — conf
Interpolation-Based Object Detection Using Motion Vectors for Embedded Real-Time Tracking Systems.
CVPR Workshops
Takayuki Ujiie, Masayuki Hiromoto, Takashi Sato
2018 J jnl
MRO-PUF: Physically Unclonable Function with Enhanced Resistance against Machine Learning Attacks Utilizing Instantaneous Output of Ring Oscillator.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Masayuki Hiromoto, Motoki Yoshinaga, Takashi Sato
2018 J jnl
PARHELIA: Particle Filter-Based Heart Rate Estimation From Photoplethysmographic Signals During Physical Exercise.
IEEE Trans. Biomed. Eng.
Yuya Fujita, Masayuki Hiromoto, Takashi Sato
2017 — conf
Comparative study of path selection and objective function in replacing NBTI mitigation logic.
ISQED
Shumpei Morita, Song Bian, Michihiro Shintani, Masayuki Hiromoto, Takashi Sato
2017 — conf
Efficient circuit failure probability calculation along product lifetime considering device aging.
ASP-DAC
Hiromitsu Awano, Masayuki Hiromoto, Takashi Sato
2017 J jnl
Identification and Application of Invariant Critical Paths under NBTI Degradation.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Song Bian, Shumpei Morita, Michihiro Shintani, Hiromitsu Awano, Masayuki Hiromoto, Takashi Sato
2017 A* conf
LSTA: Learning-Based Static Timing Analysis for High-Dimensional Correlated On-Chip Variations.
DAC
Song Bian, Michihiro Shintani, Masayuki Hiromoto, Takashi Sato
2017 A conf
SCAM: Secured content addressable memory based on homomorphic encryption.
DATE
Song Bian, Masayuki Hiromoto, Takashi Sato
2017 J jnl
Utilization of Path-Clustering in Efficient Stress-Control Gate Replacement for NBTI Mitigation.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Shumpei Morita, Song Bian, Michihiro Shintani, Masayuki Hiromoto, Takashi Sato
2016 — conf
Approximated Prediction Strategy for Reducing Power Consumption of Convolutional Neural Network Processor.
CVPR Workshops
Takayuki Ujiie, Masayuki Hiromoto, Takashi Sato
2016 J jnl
Efficient Aging-Aware SRAM Failure Probability Calculation via Particle Filter-Based Importance Sampling.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Hiromitsu Awano, Masayuki Hiromoto, Takashi Sato
2016 J jnl
Fast Estimation of NBTI-Induced Delay Degradation Based on Signal Probability.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Song Bian, Michihiro Shintani, Masayuki Hiromoto, Takashi Sato
2016 — conf
Nonlinear delay-table approach for full-chip NBTI degradation prediction.
ISQED
Song Bian, Michihiro Shintani, Shumpei Morita, Masayuki Hiromoto, Takashi Sato
2016 C conf
Physically unclonable function using RTN-induced delay fluctuation in ring oscillators.
ISCAS
Motoki Yoshinaga, Hiromitsu Awano, Masayuki Hiromoto, Takashi Sato
2016 — conf
Runtime NBTI Mitigation for Processor Lifespan Extension via Selective Node Control.
ATS
Song Bian, Michihiro Shintani, Zheng Wang, Masayuki Hiromoto, Anupam Chattopadhyay, Takashi Sato
2016 — conf
Workload-Aware Worst Path Analysis of Processor-Scale NBTI Degradation.
ACM Great Lakes Symposium on VLSI
Song Bian, Michihiro Shintani, Shumpei Morita, Hiromitsu Awano, Masayuki Hiromoto, Takashi Sato
2015 J jnl
An Error Correction Scheme through Time Redundancy for Enhancing Persistent Soft-Error Tolerance of CGRAs.
IEICE Trans. Electron.
Takashi Imagawa, Masayuki Hiromoto, Hiroyuki Ochi, Takashi Sato
2015 A conf
ECRIPSE: an efficient method for calculating RTN-induced failure probability of an SRAM cell.
DATE
Hiromitsu Awano, Masayuki Hiromoto, Takashi Sato
2014 J jnl
Automation of Model Parameter Estimation for Random Telegraph Noise.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Hirofumi Shimizu, Hiromitsu Awano, Masayuki Hiromoto, Takashi Sato
2014 — conf
Variability in device degradations: Statistical observation of NBTI for 3996 transistors.
ESSDERC
Hiromitsu Awano, Masayuki Hiromoto, Takashi Sato
2013 A conf
Hot-swapping architecture with back-biased testing for mitigation of permanent faults in functional unit array.
DATE
Zoltán Endre Rákossy, Masayuki Hiromoto, Hiroshi Tsutsui, Takashi Sato, Yukihiro Nakamura, Hiroyuki Ochi
2010 — conf
A routing architecture exploration for coarse-grained reconfigurable architecture with automated seu-tolerance evaluation.
SoCC
Takashi Imagawa, Masayuki Hiromoto, Hiroyuki Ochi, Takashi Sato
2010 J jnl
Reliability Evaluation Environment for Exploring Design Space of Coarse-Grained Reconfigurable Architectures.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Takashi Imagawa, Masayuki Hiromoto, Hiroyuki Ochi, Takashi Sato
2009 J jnl
An Asynchronous IEEE-754-standard Single-precision Floating-point Divider for FPGA.
Inf. Media Technol.
Masayuki Hiromoto, Hiroyuki Ochi, Yukihiro Nakamura
2009 J jnl
An Asynchronous IEEE-754-standard Single-precision Floating-point Divider for FPGA.
IPSJ Trans. Syst. LSI Des. Methodol.
Masayuki Hiromoto, Hiroyuki Ochi, Yukihiro Nakamura
2009 C conf
Cascade Classifier Using Divided CoHOG Features for Rapid Pedestrian Detection.
ICVS
Masayuki Hiromoto, Ryusuke Miyamoto
2009 B conf
Coarse-grained dynamically reconfigurable architecture with flexible reliability.
FPL
Dawood Alnajiar, Younghun Ko, Takashi Imagawa, Hiroaki Konoura, Masayuki Hiromoto, Yukio Mitsuyama, Masanori Hashimoto, Hiroyuki Ochi, Takao Onoye
2009 B conf
Dynamic rate control for media streaming in high-speed mobile networks.
WCNC
Masayuki Hiromoto, Hiroshi Tsutsui, Hiroyuki Ochi, Tomoyuki Osano, Norihiro Ishikawa, Yukihiro Nakamura
2009 — conf
Hardware Architecture for HOG Feature Extraction.
IIH-MSP
Ryoji Kadota, Hiroki Sugano, Masayuki Hiromoto, Hiroyuki Ochi, Ryusuke Miyamoto, Yukihiro Nakamura
2009 — conf
Hardware architecture for high-accuracy real-time pedestrian detection with CoHOG features.
ICCV Workshops
Masayuki Hiromoto, Ryusuke Miyamoto
2009 B conf
Hot-Swapping architecture extension for mitigation of permanent functional unit faults.
FPL
Zoltan Endre Rakosi, Masayuki Hiromoto, Hiroyuki Ochi, Yukihiro Nakamura
2009 J jnl
Partially Parallel Architecture for AdaBoost-Based Detection With Haar-Like Features.
IEEE Trans. Circuits Syst. Video Technol.
Masayuki Hiromoto, Hiroki Sugano, Ryusuke Miyamoto
2007 A* conf
A Specialized Processor Suitable for AdaBoost-Based Detection with Haar-like Features.
CVPR
Masayuki Hiromoto, Kentaro Nakahara, Hiroki Sugano, Yukihiro Nakamura, Ryusuke Miyamoto