Masao Taguchi

16 papers Journal 11Unranked 5
YearRankTypeTitle / Venue / Authors
2025 J jnl
A Through Silicon Via (TSV) Architecture of the Bumpless Build Cube (BBCube) for Stacked Memory Devices.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Shinji Sugatani, Hiroyuki Ryoson, Norio Chujo, Masao Taguchi, Koji Sakui, Takayuki Ohba
2025 J jnl
Bumpless Build Cube (BBCube) 3D: Heterogeneous 3D Integration Using WOW and COW.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Norio Chujo, Hiroyuki Ryoson, Koji Sakui, Shinji Sugatani, Masao Taguchi, Takayuki Ohba
2016 J jnl
A 280 Mb/s In-Vehicle LAN System Using Electromagnetic Clip Connector and High-EMC Transceiver.
IEEE Trans. Circuits Syst. I Regul. Pap.
Atsutake Kosuge, Akira Okada, Masao Taguchi, Hiroki Ishikuro, Tadahiro Kuroda
2015 J jnl
Analysis and Design of an 8.5-Gb/s/Link Multi-Drop Bus Using Energy-Equipartitioned Transmission Line Couplers.
IEEE Trans. Circuits Syst. I Regul. Pap.
Atsutake Kosuge, Shu Ishizuka, Masao Taguchi, Hiroki Ishikuro, Tadahiro Kuroda
2014 — conf
30.6 An electromagnetic clip connector for in-vehicle LAN to reduce wire harness weight by 30%.
ISSCC
Atsutake Kosuge, Shu Ishizuka, Lechang Liu, Akira Okada, Masao Taguchi, Hiroki Ishikuro, Tadahiro Kuroda
2014 J jnl
A 0.15-mm-Thick Noncontact Connector for MIPI Using a Vertical Directional Coupler.
IEEE J. Solid State Circuits
Atsutake Kosuge, Wataru Mizuhara, Tsunaaki Shidei, Tsutomu Takeya, Noriyuki Miura, Masao Taguchi, Hiroki Ishikuro, Tadahiro Kuroda
2013 — conf
A 0.15mm-thick non-contact connector for MIPI using vertical directional coupler.
ISSCC
Wataru Mizuhara, Tsunaaki Shidei, Atsutake Kosuge, Tsutomu Takeya, Noriyuki Miura, Masao Taguchi, Hiroki Ishikuro, Tadahiro Kuroda
2013 — conf
A 12.5Gb/s/link non-contact multi drop bus system with impedance-matched Transmission Line Couplers and Dicode partial-response channel transceivers.
ASP-DAC
Atsutake Kosuge, Wataru Mizuhara, Noriyuki Miura, Masao Taguchi, Hiroki Ishikuro, Tadahiro Kuroda
2013 — conf
A 6nW inductive-coupling wake-up transceiver for reducing standby power of non-contact memory card by 500×.
ISSCC
Noriyuki Miura, Mitsuko Saito, Masao Taguchi, Tadahiro Kuroda
2012 — conf
A 12.5Gb/s/link non-contact multi drop bus system with impedance-matched transmission line couplers and Dicode partial-response channel transceivers.
CICC
Atsutake Kosuge, Wataru Mizuhara, Noriyuki Miura, Masao Taguchi, Hiroki Ishikuro, Tadahiro Kuroda
2000 J jnl
Guest editorial.
IEEE J. Solid State Circuits
Masao Taguchi, David B. Scott
1999 J jnl
Guest Editorial.
IEEE J. Solid State Circuits
William Bidermann, Masao Taguchi
1998 J jnl
500-Mb/s nonprecharged data bus for high-speed DRAM's.
IEEE J. Solid State Circuits
Miyoshi Saito, Junji Ogawa, Hirotaka Tamura, Shigetoshi Wakayama, Hisakatsu Araki, Tsz-Shing Cheung, Kohtaroh Gotoh, Tadao Aikawa, Takaaki Suzuki, Masao Taguchi, Takeshi Imamura
1998 J jnl
A 1-Gb SDRAM with ground-level precharged bit line and nonboosted 2.1-V word line.
IEEE J. Solid State Circuits
Satoshi Eto, Masato Matsumiya, Masato Takita, Yuki Ishii, Toshikazu Nakamura, Kuninori Kawabata, Hideki Kano, Ayako Kitamoto, Toshimi Ikeda, Toru Koga, Mitsuhiro Higashiho, Yuji Serizawa, Kazuo Itabashi, Osamu Tsuboi, Yuji Yokoyama, Masao Taguchi
1997 J jnl
A 256-Mb SDRAM using a register-controlled digital DLL.
IEEE J. Solid State Circuits
Atsushi Hatakeyama, Hirohiko Mochizuki, Tadao Aikawa, Masato Takita, Yuki Ishii, Hironobu Tsuboi, Shin-ya Fujioka, Shusaku Yamaguchi, Makoto Koga, Yuji Serizawa, Koichi Nishimura, Kuninori Kawabata, Yoshinori Okajima, Michiari Kawano, Hideyuki Kojima, Kazuhiro Mizutani, Toru Anezaki, Masatomo Hasegawa, Masao Taguchi
1991 J jnl
A 40-ns 64-Mb DRAM with 64-b parallel data bus architecture.
IEEE J. Solid State Circuits
Masao Taguchi, Hiroyoshi Tomita, Toshiya Uchida, Yasuhiro Ohnishi, Kimiaki Sato, Taiji Ema, Masaaki Higashitani, Takashi Yabu