Masamitsu Tanaka

40 papers A* 7A 2C 1Misc 1Journal 24Unranked 5
YearRankTypeTitle / Venue / Authors
2026 J jnl
Toward Ultra-High-Speed, Ultra-Low-Power Cryogenic Superconductor Computing.
Computer
Koji Inoue, Ilkwon Byun, Masamitsu Tanaka, Yosuke Ueno, Naoki Takeuchi, Satoshi Kawakami, Olivia Chen, Dongmoon Min, Teruo Tanimoto, Takatsugu Ono, Hiroshi Nakamura, Jangwoo Kim
2025 J jnl
Approximate SFQ-Based Computing Architecture Modeling With Device-Level Guidelines.
IEEE Comput. Archit. Lett.
Pratiksha Mundhe, Yuta Hano, Satoshi Kawakami, Teruo Tanimoto, Masamitsu Tanaka, Koji Inoue, Ilkwon Byun
2025 J jnl
Demonstration of Low-Power Shift-Register Based on Half-Flux-Quantum Logic.
IEICE Trans. Electron.
Masamitsu Tanaka, Toranosuke Nakayama, Shoma Tanemura, Masayuki Higashi, Feng Li, Akira Fujimaki
2025 A conf
Design of a Correlation-Insensitive HFQ Stochastic Adder by Local Two-Phase Clocking.
ISLPED
Yuki Matsumoto, Masamitsu Tanaka, Takatsugu Ono
2025 J jnl
Ferromagnetic
IEICE Trans. Electron.
Akira Fujimaki, Daiki Hasegawa, Yuto Takeshita, Feng Li, Taro Yamashita, Masamitsu Tanaka
2025 A* conf
SuperSFQ: A Hardware Design to Realize High-Frequency Superconducting Processors.
MICRO
Junhyuk Choi, Juwon Hong, Junpyo Kim, Jungmin Cho, Hyeonseong Jeong, Dongmoon Min, Masamitsu Tanaka, Koji Inoue, Jangwoo Kim
2024 J jnl
C3-VQA: Cryogenic Counter-based Co-processor for Variational Quantum Algorithms.
CoRR
Yosuke Ueno, Satoshi Imamura, Yuna Tomida, Teruo Tanimoto, Masamitsu Tanaka, Yutaka Tabuchi, Koji Inoue, Hiroshi Nakamura
2024 J jnl
Inter-Temperature Bandwidth Reduction in Cryogenic QAOA Machines.
IEEE Comput. Archit. Lett.
Yosuke Ueno, Yuna Tomida, Teruo Tanimoto, Masamitsu Tanaka, Yutaka Tabuchi, Koji Inoue, Hiroshi Nakamura
2024 A conf
Late Breaking Results: Single Flux Quantum Based Brownian Circuits for Ultra-Law-Power Computing.
DATE
Satoshi Kawakami, Yusuke Ohtusbo, Koji Inoue, Masamitsu Tanaka
2024 Misc conf
Low-Power Half-Flux-Quantum based Counter Circuits for Cryogenic Quantum Computers.
QCE
Yuki Matsumoto, Teruo Tanimoto, Masamitsu Tanaka, Takatsugu Ono
2024 J jnl
SFQ counter-based precomputation for large-scale cryogenic VQE machines.
CoRR
Yosuke Ueno, Satoshi Imamura, Yuna Tomida, Teruo Tanimoto, Masamitsu Tanaka, Yutaka Tabuchi, Koji Inoue, Hiroshi Nakamura
2024 A* conf
SuperCore: An Ultra-Fast Superconducting Processor for Cryogenic Applications.
MICRO
Junhyuk Choi, Ilkwon Byun, Juwon Hong, Dongmoon Min, Junpyo Kim, Jungmin Cho, Hyeonseong Jeong, Masamitsu Tanaka, Koji Inoue, Jangwoo Kim
2023 — conf
Circuit designs for practical-scale fault-tolerant quantum computing.
VLSI Technology and Circuits
Yasunari Suzuki, Yosuke Ueno, Wang Liao, Masamitsu Tanaka, Teruo Tanimoto
2023 — conf
High-Frequency Operation of Low-Power Single-Flux-Quantum Circuits Fabricated Using 250 A/cm
ICICDT
Masamitsu Tanaka, Yoshihiro Kitagawa, Tetsuro Satoh, Tsuyoshi Yamamoto
2023 J jnl
Inter-temperature Bandwidth Reduction in Cryogenic QAOA Machines.
CoRR
Yosuke Ueno, Yuna Tomida, Teruo Tanimoto, Masamitsu Tanaka, Yutaka Tabuchi, Koji Inoue, Hiroshi Nakamura
2023 A* conf
QIsim: Architecting 10+K Qubit QC Interfaces Toward Quantum Supremacy.
ISCA
Dongmoon Min, Junpyo Kim, Junhyuk Choi, Ilkwon Byun, Masamitsu Tanaka, Koji Inoue, Jangwoo Kim
2022 C conf
Design of Variable Bit-Width Arithmetic Unit Using Single Flux Quantum Device.
ISCAS
Iori Ishikawa, Ikki Nagaoka, Ryota Kashima, Koki Ishida, Kosuke Fukumitsu, Keitaro Oka, Masamitsu Tanaka, Satoshi Kawakami, Teruo Tanimoto, Takatsugu Ono, Akira Fujimaki, Koji Inoue
2022 J jnl
NEO-QEC: Neural Network Enhanced Online Superconducting Decoder for Surface Codes.
CoRR
Yosuke Ueno, Masaaki Kondo, Masamitsu Tanaka, Yasunari Suzuki, Yutaka Tabuchi
2022 A* conf
QULATIS: A Quantum Error Correction Methodology toward Lattice Surgery.
HPCA
Yosuke Ueno, Masaaki Kondo, Masamitsu Tanaka, Yasunari Suzuki, Yutaka Tabuchi
2022 A* conf
XQsim: modeling cross-technology control processors for 10+K qubit quantum computers.
ISCA
Ilkwon Byun, Junpyo Kim, Dongmoon Min, Ikki Nagaoka, Kosuke Fukumitsu, Iori Ishikawa, Teruo Tanimoto, Masamitsu Tanaka, Koji Inoue, Jangwoo Kim
2021 J jnl
Planarized Nb 4-Layer Fabrication Process for Superconducting Integrated Circuits and Its Fabricated Device Evaluation.
IEICE Trans. Electron.
Shuichi Nagasawa, Masamitsu Tanaka, Naoki Takeuchi, Yuki Yamanashi, Shigeyuki Miyajima, Fumihiro China, Taiki Yamae, Koki Yamazaki, Yuta Somei, Naonori Sega, Yoshinao Mizugaki, Hiroaki Myoren, Hirotaka Terai, Mutsuo Hidaka, Nobuyuki Yoshikawa, Akira Fujimaki
2021 A* conf
QECOOL: On-Line Quantum Error Correction with a Superconducting Decoder for Surface Code.
DAC
Yosuke Ueno, Masaaki Kondo, Masamitsu Tanaka, Yasunari Suzuki, Yutaka Tabuchi
2021 J jnl
Superconductor Computing for Neural Networks.
IEEE Micro
Koki Ishida, Ilkwon Byun, Ikki Nagaoka, Kosuke Fukumitsu, Masamitsu Tanaka, Satoshi Kawakami, Teruo Tanimoto, Takatsugu Ono, Jangwoo Kim, Koji Inoue
2020 — conf
32 GHz 6.5 mW Gate-Level-Pipelined 4-Bit Processor using Superconductor Single-Flux-Quantum Logic.
VLSI Circuits
Koki Ishida, Masamitsu Tanaka, Ikki Nagaoka, Takatsugu Ono, Satoshi Kawakami, Teruo Tanimoto, Akira Fujimaki, Koji Inoue
2020 A* conf
SuperNPU: An Extremely Fast Neural Processing Unit Using Superconducting Logic Devices.
MICRO
Koki Ishida, Ilkwon Byun, Ikki Nagaoka, Kosuke Fukumitsu, Masamitsu Tanaka, Satoshi Kawakami, Teruo Tanimoto, Takatsugu Ono, Jangwoo Kim, Koji Inoue
2019 — conf
A 48GHz 5.6mW Gate-Level-Pipelined Multiplier Using Single-Flux Quantum Logic.
ISSCC
Ikki Nagaoka, Masamitsu Tanaka, Koji Inoue, Akira Fujimaki
2018 J jnl
Energy/Space-Efficient Rapid Single-Flux-Quantum Circuits by Using
IEICE Trans. Electron.
Tomohiro Kamiya, Masamitsu Tanaka, Kyosuke Sano, Akira Fujimaki
2018 J jnl
Thermally Assisted Superconductor Transistors for Josephson-CMOS Hybrid Memories.
IEICE Trans. Electron.
Kyosuke Sano, Masato Suzuki, Kohei Maruyama, Soya Taniguchi, Masamitsu Tanaka, Akira Fujimaki, Masumi Inoue, Nobuyuki Yoshikawa
2018 J jnl
Towards Ultra-High-Speed Cryogenic Single-Flux-Quantum Computing.
IEICE Trans. Electron.
Koki Ishida, Masamitsu Tanaka, Takatsugu Ono, Koji Inoue
2016 J jnl
Development of an Advanced Circuit Model for Superconducting Strip Line Detector Arrays.
IEICE Trans. Electron.
Ali Bozbey, Yuma Kita, Kyohei Kamiya, Misaki Kozaka, Masamitsu Tanaka, Takekazu Ishida, Akira Fujimaki
2016 J jnl
High-Throughput Rapid Single-Flux-Quantum Circuit Implementations for Exponential and Logarithm Computation Using the Radix-2 Signed-Digit Representation.
IEICE Trans. Electron.
Masamitsu Tanaka, Kazuyoshi Takagi, Naofumi Takagi
2016 — conf
Single-flux-quantum cache memory architecture.
ISOCC
Koki Ishida, Masamitsu Tanaka, Takatsugu Ono, Koji Inoue
2014 J jnl
High-Speed Operation of 0.25-mV RSFQ Arithmetic Logic Unit Based on 10-kA/cm
IEICE Trans. Electron.
Masamitsu Tanaka, Atsushi Kitayama, Masakazu Okada, Tomohito Kouketsu, Takumi Takinami, Masato Ito, Akira Fujimaki
2014 J jnl
Large-Scale Integrated Circuit Design Based on a Nb Nine-Layer Structure for Reconfigurable Data-Path Processors.
IEICE Trans. Electron.
Akira Fujimaki, Masamitsu Tanaka, Ryo Kasagi, Katsumi Takagi, Masakazu Okada, Yuhi Hayakawa, Kensuke Takata, Hiroyuki Akaike, Nobuyuki Yoshikawa, Shuichi Nagasawa, Kazuyoshi Takagi, Naofumi Takagi
2011 J jnl
Layout-Driven Skewed Clock Tree Synthesis for Superconducting SFQ Circuits.
IEICE Trans. Electron.
Kazuyoshi Takagi, Yuki Ito, Shota Takeshima, Masamitsu Tanaka, Naofumi Takagi
2010 J jnl
100 GHz Demonstrations Based on the Single-Flux-Quantum Cell Library for the 10 kA/cm
IEICE Trans. Electron.
Yuki Yamanashi, Toshiki Kainuma, Nobuyuki Yoshikawa, Irina Kataeva, Hiroyuki Akaike, Akira Fujimaki, Masamitsu Tanaka, Naofumi Takagi, Shuichi Nagasawa, Mutsuo Hidaka
2010 J jnl
Automated Passive-Transmission-Line Routing Tool for Single-Flux-Quantum Circuits Based on A* Algorithm.
IEICE Trans. Electron.
Masamitsu Tanaka, Koji Obata, Yuki Ito, Shota Takeshima, Motoki Sato, Kazuyoshi Takagi, Naofumi Takagi, Hiroyuki Akaike, Akira Fujimaki
2010 J jnl
Comparisons of Synchronous-Clocking SFQ Adders.
IEICE Trans. Electron.
Naofumi Takagi, Masamitsu Tanaka
2009 J jnl
Design of fast digit-serial adders using SFQ logic circuits.
IEICE Electron. Express
Heejoung Park, Yuki Yamanashi, Nobuyuki Yoshikawa, Masamitsu Tanaka, Akira Fujimaki
2008 J jnl
Bit-Serial Single Flux Quantum Microprocessor CORE.
IEICE Trans. Electron.
Akira Fujimaki, Masamitsu Tanaka, Takahiro Yamada, Yuki Yamanashi, Heejoung Park, Nobuyuki Yoshikawa