Masakazu Hioki

16 papers A 4Journal 8Unranked 4
YearRankTypeTitle / Venue / Authors
2025 J jnl
Fully Quantized Matrix Arithmetic-Only BERT Model and Its FPGA-Based Accelerator.
IEEE Access
Hiroshi Fuketa, Toshihiro Katashita, Yohei Hori, Masakazu Hioki
2024 J jnl
Multiplication-Free Lookup-Based CNN Accelerator Using Residual Vector Quantization and Its FPGA Implementation.
IEEE Access
Hiroshi Fuketa, Toshihiro Katashita, Yohei Hori, Masakazu Hioki
2022 — conf
A 2.6mW 10pTI √ Hz 33kHz Magnetoimpedance-Based Magnetometer with Automatic Loop-Gain and Bandwidth Enhancement.
ISSCC
Ippei Akita, Takeshi Kawano, Hitoshi Aoyama, Shunichi Tatematsu, Masakazu Hioki
2022 J jnl
An Automatic Loop Gain Enhancement Technique in Magnetoimpedance-Based Magnetometer.
IEEE J. Solid State Circuits
Ippei Akita, Takeshi Kawano, Hitoshi Aoyama, Shunichi Tatematsu, Masakazu Hioki
2018 J jnl
Development of an Evaluation Platform and Performance Experimentation of Flex Power FPGA Device.
IEICE Trans. Inf. Syst.
Toshihiro Katashita, Masakazu Hioki, Yohei Hori, Hanpei Koike
2016 J jnl
Low Overhead Design of Power Reconfigurable FPGA with Fine-Grained Body Biasing on 65-nm SOTB CMOS Technology.
IEICE Trans. Inf. Syst.
Masakazu Hioki, Hanpei Koike
2013 A conf
Fully-functional FPGA prototype with fine-grain programmable body biasing.
FPGA
Masakazu Hioki, Toshihiro Sekigawa, Tadashi Nakagawa, Hanpei Koike, Yohei Matsumoto, Takashi Kawanami, Toshiyuki Tsutsumi
2008 J jnl
Suppression of Intrinsic Delay Variation in FPGAs using Multiple Configurations.
ACM Trans. Reconfigurable Technol. Syst.
Yohei Matsumoto, Masakazu Hioki, Takashi Kawanami, Hanpei Koike, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa
2007 — conf
A Power Configurable Block Array Connected in Series as First Prototype Flex Power FPGA Chip.
FPT
Masakazu Hioki, Takashi Kawanami, Yohei Matsumoto, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike, Toshiyuki Tsutsumi
2007 J jnl
Optimization of the Body Bias Voltage Set (BBVS) for Flex Power FPGA.
IEICE Trans. Inf. Syst.
Takashi Kawanami, Masakazu Hioki, Yohei Matsumoto, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike
2007 A conf
Performance and yield enhancement of FPGAs with within-die variation using multiple configurations.
FPGA
Yohei Matsumoto, Masakazu Hioki, Takashi Kawanami, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike
2006 A conf
Evaluation of granularity on threshold voltage control in flex power FPGA.
FPGA
Masakazu Hioki, Takashi Kawanami, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike
2006 — conf
Evaluation of granularity on threshold voltage control in flex power FPGA.
FPT
Masakazu Hioki, Takashi Kawanami, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike
2006 — conf
Optimal set of body bias voltages for an FPGA with field-programmable V
FPT
Takashi Kawanami, Masakazu Hioki, Yohei Matsumoto, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike
2004 J jnl
Preliminary Evaluation of Flex Power FPGA: A Power Reconfigurable Architecture with Fine Granularity.
IEICE Trans. Inf. Syst.
Takashi Kawanami, Masakazu Hioki, Hiroshi Nagase, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike
2004 A conf
Preliminary performance analysis of flex power FPGA, a power reconfigurable device with fine granularity.
FPGA
Takashi Kawanami, Masakazu Hioki, Hiroshi Nagase, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike