Masahiro Kaminaga

18 papers C 1Journal 16Unranked 1
YearRankTypeTitle / Venue / Authors
2025 J jnl
A Probabilistic Interpretation of GapSVP.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Masahiro Kaminaga, Takuya Mine
2024 J jnl
On SIS-problem-based random Feistel ciphers and its statistical evaluation of resistance against differential cryptanalysis.
IACR Cryptol. ePrint Arch.
Yu Morishima, Masahiro Kaminaga
2023 J jnl
Upper Bound for the Coefficients of the Shortest Vector of Random Lattice.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Masahiro Kaminaga
2022 J jnl
Improving genetic algorithms for solving the SVP: focusing on low memory consumption and high reproducibility.
Iran J. Comput. Sci.
Masaharu Fukase, Masahiro Kaminaga
2022 J jnl
Random Numbers Generated by the Oscillator Sampling Method as a Renewal Process.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Masahiro Kaminaga
2020 J jnl
A True Random Number Generator Method Embedded in Wireless Communication Systems.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Toshinori Suzuki, Masahiro Kaminaga
2019 J jnl
Determining the Optimal Random-Padding Size for Rabin Cryptosystems.
IEEE Trans. Inf. Forensics Secur.
Masahiro Kaminaga, Toshinori Suzuki, Masaharu Fukase
2018 J jnl
Crashing Modulus Attack on Modular Squaring for Rabin Cryptosystem.
IEEE Trans. Dependable Secur. Comput.
Masahiro Kaminaga, Hideki Yoshikawa, Arimitsu Shikoda, Toshinori Suzuki
2016 J jnl
Crashing Modulus Attack on Modular Squaring for Rabin Cryptosystem.
CoRR
Masahiro Kaminaga, Hideki Yoshikawa, Arimitsu Shikoda, Toshinori Suzuki
2015 J jnl
Double Counting in 2
IEEE Trans. Inf. Forensics Secur.
Masahiro Kaminaga, Hideki Yoshikawa, Toshinori Suzuki
2014 J jnl
Double Counting in $2^t$-ary RSA Precomputation Reveals the Secret Exponent.
CoRR
Masahiro Kaminaga, Hideki Yoshikawa, Toshinori Suzuki
2014 J jnl
Round Addition DFA on SPN Block Ciphers.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Hideki Yoshikawa, Masahiro Kaminaga, Arimitsu Shikoda, Toshinori Suzuki
2014 C conf
Secret key reconstruction method using round addition DFA on lightweight block cipher LBlock.
ISITA
Hideki Yoshikawa, Masahiro Kaminaga, Arimitsu Shikoda, Toshinori Suzuki
2013 J jnl
Round Addition DFA on 80-bit Piccolo and TWINE.
IEICE Trans. Inf. Syst.
Hideki Yoshikawa, Masahiro Kaminaga, Arimitsu Shikoda, Toshinori Suzuki
2013 J jnl
Round Addition Using Faults for Generalized Feistel Network.
IEICE Trans. Inf. Syst.
Hideki Yoshikawa, Masahiro Kaminaga, Arimitsu Shikoda
2013 — conf
Round addition DFA for microcontroller implemented the triple DES.
GCCE
Hideki Yoshikawa, Masahiro Kaminaga, Arimitsu Shikoda, Toshinori Suzuki
2011 J jnl
Development and evaluation of a microstep DFA vulnerability estimation method.
IEICE Electron. Express
Masahiro Kaminaga, Arimitsu Shikoda, Hideki Yoshikawa
2008 J jnl
Logic-Level Analysis of Fault Attacks and a Cost-Effective Countermeasure Design.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Masahiro Kaminaga, Takashi Watanabe, Takashi Endo, Toshio Okochi