Masahiro Goshima

38 papers A* 3A 3B 1C 5Misc 1Journal 12Unranked 13

Year	Rank	Type	Title / Venue / Authors
2023	A	`conf`	Out-of-Step Pipeline for Gather/Scatter Instructions. DATE Yi Ge, Katsuhiro Yoda, Makiko Ito, Toshiyuki Ichiba, Takahide Yoshikawa, Ryota Shioya, Masahiro Goshima
2019	—	`conf`	An Open Source FPGA-Optimized Out-of-Order RISC-V Soft Processor. FPT Susumu Mashimo, Koji Inoue, Ryota Shioya, Akifumi Fujita, Reoma Matsuo, Seiya Akaki, Akifumi Fukuda, Toru Koizumi, Junichiro Kadomoto, Hidetsugu Irie, Masahiro Goshima
2018	—	`conf`	A Tightly Coupled Heterogeneous Core with Highly Efficient Low-Power Mode. ARCS Yasumasa Chidai, Kojiro Izuoka, Ryota Shioya, Masahiro Goshima, Hideki Ando
2018	—	`conf`	An Analysis and a Solution of False Conflicts for Hardware Transactional Memory. ICECS Yuki Futamase, Masaki Hayashi, Tomoki Tajimi, Ryota Shioya, Masahiro Goshima, Tomoaki Tsumura
2018	—	`conf`	Application of Timing Fault Detection to Rocket Core on FPGA. CANDAR Workshops Ushio Jimbo, Ryota Shioya, Masahiro Goshima
2018	J	`jnl`	Bank-Aware Instruction Scheduler for a Multibanked Register File. J. Inf. Process. Junji Yamada, Ushio Jimbo, Ryota Shioya, Masahiro Goshima, Shuichi Sakai
2018	—	`conf`	Isolation-Safe Speculative Access Control for Hardware Transactional Memory. ICECS Tomoki Tajimi, Masaki Hayashi, Yuki Futamase, Ryota Shioya, Masahiro Goshima, Tomoaki Tsumura
2017	J	`jnl`	Applying Razor Flip-Flops to SRAM Read Circuits. IEICE Trans. Electron. Ushio Jimbo, Junji Yamada, Ryota Shioya, Masahiro Goshima
2017	J	`jnl`	Design of a Register Cache System with an Open Source Process Design Kit for 45nm Technology. IEICE Trans. Electron. Junji Yamada, Ushio Jimbo, Ryota Shioya, Masahiro Goshima, Shuichi Sakai
2017	—	`conf`	Initial study of a phase-aware scheduling for hardware transactional memory. PACRIM Tomoki Tajimi, Anju Hirota, Ryota Shioya, Masahiro Goshima, Tomoaki Tsumura
2017	J	`jnl`	Skewed Multistaged Multibanked Register File for Area and Energy Efficiency. IEICE Trans. Inf. Syst. Junji Yamada, Ushio Jimbo, Ryota Shioya, Masahiro Goshima, Shuichi Sakai
2016	J	`jnl`	An Inductive Method to Select Simulation Points. IEICE Trans. Inf. Syst. Minseong Choi, Takashi Fukuda, Masahiro Goshima, Shuichi Sakai
2016	J	`jnl`	FXA: Executing Instructions in Front-End for Energy Efficiency. IEICE Trans. Inf. Syst. Ryota Shioya, Ryo Takami, Masahiro Goshima, Hideki Ando
2015	J	`jnl`	Address Order Violation Detection with Parallel Counting Bloom Filters. IEICE Trans. Electron. Naruki Kurata, Ryota Shioya, Masahiro Goshima, Shuichi Sakai
2015	—	`conf`	An Inductive Method to Select Simulation Points. CANDAR Minseong Choi, Takashi Fukuda, Masahiro Goshima, Shuichi Sakai
2014	A*	`conf`	A Front-End Execution Architecture for High Energy Efficiency. MICRO Ryota Shioya, Masahiro Goshima, Hideki Ando
2014	—	`conf`	A cloud architecture for protecting guest's information from malicious operators with memory management. CODASPY Koki Murakami, Tsuyoshi Yamada, Rie Shigetomi Yamaguchi, Masahiro Goshima, Shuichi Sakai
2013	J	`jnl`	Register Indirect Jump Target Forwarding. IEICE Trans. Inf. Syst. Ryota Shioya, Naruki Kurata, Takashi Toyoshima, Masahiro Goshima, Shuichi Sakai
2011	J	`jnl`	Low-Overhead Architecture for Security Tag. IEICE Trans. Inf. Syst. Ryota Shioya, Daewung Kim, Kazuo Horio, Masahiro Goshima, Shuichi Sakai
2010	A*	`conf`	Register Cache System Not for Latency Reduction Purpose. MICRO Ryota Shioya, Kazuo Horio, Masahiro Goshima, Shuichi Sakai
2009	C	`conf`	Low-Overhead Architecture for Security Tag. PRDC Ryota Shioya, Daewung Kim, Kazuo Horio, Masahiro Goshima, Shuichi Sakai
2009	C	`conf`	String-Wise Information Flow Tracking against Script Injection Attacks. PRDC Kunbo Li, Ryota Shioya, Masahiro Goshima, Shuichi Sakai
2008	—	`conf`	Low-Complexity Bypass Network Using Small RAM. CDES Shinobu Miwa, Hironori Ichibayashi, Hidetsugu Irie, Masahiro Goshima, Hironori Nakajo, Shinji Tomita
2008	J	`jnl`	Ultra Dependable Processor. IEICE Trans. Electron. Shuichi Sakai, Masahiro Goshima, Hidetsugu Irie
2007	J	`jnl`	Preventing timing errors on register writes: mechanisms of detections and recoveries. SIGARCH Comput. Archit. News Hidetsugu Irie, Ken Sugimoto, Masahiro Goshima, Shuichi Sakai
2007	A	`conf`	Utilization of SECDED for soft error and variation-induced defect tolerance in caches. DATE Luong Dinh Hung, Hidetsugu Irie, Masahiro Goshima, Shuichi Sakai
2006	C	`conf`	Base Address Recognition with Data Flow Tracking for Injection Attack Detection. PRDC Satoshi Katsunuma, Hiroyuki Kurita, Ryota Shioya, Kazuto Shimizu, Hidetsugu Irie, Masahiro Goshima, Shuichi Sakai
2006	C	`conf`	SEVA: A Soft-Error- and Variation-Aware Cache Architecture. PRDC Luong Dinh Hung, Masahiro Goshima, Shuichi Sakai
2005	C	`conf`	Mitigating Soft Errors in Highly Associative Cache with CAM-based Tag. ICCD Luong Dinh Hung, Masahiro Goshima, Shuichi Sakai
2004	Misc	`conf`	Implementation of Cell-Projection Parallel Volume Rendering with Dynamic Load Balancing. PDPTA Motohiro Takayama, Yuki Shinomoto, Masahiro Goshima, Shin-ichiro Mori, Yasuhiko Nakashima, Shinji Tomita
2001	A*	`conf`	A high-speed dynamic instruction scheduling scheme for superscalar processors. MICRO Masahiro Goshima, Kengo Nishino, Toshiaki Kitamura, Yasuhiko Nakashima, Shinji Tomita, Shin-ichiro Mori
1999	J	`jnl`	A Technique to Eliminate Redundant Inter-Processor Communication on Parallelizing Compiler TINPAR. Int. J. Parallel Program. Atsushi Kubota, Shogo Tatsumi, Toshihiko Tanaka, Masahiro Goshima, Shin-ichiro Mori, Hiroshi Nakashima, Shinji Tomita
1998	—	`conf`	Optimized Code Generation for Heterogeneous Computing Environment using Parallelizing Compiler TINPAR. IEEE PACT Shin-ya Goto, Atsushi Kubota, Toshihiko Tanaka, Masahiro Goshima, Shin-ichiro Mori, Hiroshi Nakashima, Shinji Tomita
1997	—	`conf`	A Technique to Eliminate Redundant Inter-Processor Communication on Parallelizing Compiler TINPAR. ISHPC Atsushi Kubota, Shogo Tatsumi, Toshihiko Tanaka, Masahiro Goshima, Shin-ichiro Mori, Hiroshi Nakashima, Shinji Tomita
1997	—	`conf`	Efficient Goal Scheduling in Concurrent Logic Language using Type-Based Dependency Analysis. ASIAN Kazuhiko Ohno, Masahiko Ikawa, Masahiro Goshima, Shin-ichiro Mori, Hiroshi Nakashima, Shinji Tomita
1997	—	`conf`	Improvement of message communication in concurrent logic language. PASCO Kazuhiko Ohno, Masahiko Ikawa, Shin-ichiro Mori, Hiroshi Nakashima, Shinji Tomita, Masahiro Goshima
1995	B	`conf`	A proposal of self-cleanup cache. PACT Shin-ichiro Mori, Masahiro Goshima, Hiroshi Nakashima, Shinji Tomita
1993	A	`conf`	A distributed shared memory multiprocessor ASURA: memory and cache architecture. SC Shin-ichiro Mori, Hideki Saito, Masahiro Goshima, Mamoru Yanagihara, Takashi Tanaka, David Fraser, Kazuki Joe, Hiroyuki Nitta, Shinji Tomita