Masahiko Iwane

12 papers A 1B 2Journal 2Unranked 7
YearRankTypeTitle / Venue / Authors
2010 — conf
An Efficient Hardware Architecture from C Program with Memory Access to Hardware.
ICCSA (2)
Akira Yamawaki, Seiichi Serikawa, Masahiko Iwane
2009 — conf
An Efficient Comparative Evaluation to Buffering Methods for Window-based Image Processing Using Semi-programmable Hardware.
ERSA
Akira Yamawaki, Seiichi Serikawa, Masahiko Iwane
2009 A conf
An intermediate hardware model with load/store unit for C to FPGA.
FPGA
Akira Yamawaki, Masahiko Iwane
2008 — conf
An FPGA implementation of a DWT with 5/3 filter using semi-programmable hardware.
APCCAS
Akira Yamawaki, Kazuharu Morita, Masahiko Iwane
2007 — conf
A Programmable Load/Store Unit on C-based Hardware Design for FPGA.
FPT
Akira Yamawaki, Masahiko Iwane
2007 B conf
An FPGA implementation of a snoop cache with synchronization for a multiprocessor system-on-chip.
ICPADS
Akira Yamawaki, Masahiko Iwane
2005 — conf
An efficient parallel processing using a cache memory with synchronization on a Soc-multiprocessor.
Circuits, Signals, and Systems
Akira Yamawaki, Masahiko Iwane
2005 — conf
Coherence Maintenances to realize an efficient parallel processing for a Cache Memory with Synchronization on a Chip-Multiprocessor.
ISPAN
Akira Yamawaki, Masahiko Iwane
2004 — conf
Evaluation of mechanisms introduced to improve performance of TSVM cache.
Parallel and Distributed Computing and Networks
Akira Yamawaki, Masahiko Iwane
2002 B conf
Organization of Shared Memory with Synchronization for Multiprocessor-on-a-chip.
ICPADS
Akira Yamawaki, Masahiko Iwane
2001 J jnl
Tagged communication and synchronization memory for multiprocessor-on-a-chip.
Syst. Comput. Jpn.
Masahiko Iwane, Akira Yamawaki, Makoto Tanaka
1992 J jnl
Extracting distance from defocused images with different aperture sizes.
Syst. Comput. Jpn.
Masahiko Iwane