Masaaki Kondo - RankMe

121 papers A* 5A 10B 4C 12Misc 2Journal 40Unranked 47

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	D2-LoRA: A Synergistic Approach to Differential and Directional Low-Rank Adaptation. CoRR Nozomu Fujisawa, Masaaki Kondo
2026	A*	`conf`	Feasibility-Aware Masked Transformer for the Pickup-and-Delivery Problem with Time Windows (Student Abstract). AAAI Kaede Saito, Ryota Higa, Hiromu Imura, Masaaki Kondo
2025	J	`jnl`	Imperceptible Trojan Attacks to the Graph-Based Big Data Processing in Smart Society. IEICE Trans. Inf. Syst. Jun Zhou, Masaaki Kondo
2025	J	`jnl`	Quantum Reinforcement Learning with Dynamic-Circuit Qubit Reuse and Grover-Based Trajectory Optimization. CoRR Thet Htar Su, Shaswot Shresthamali, Masaaki Kondo
2025	—	`conf`	Skip2-LoRA: A Lightweight On-device DNN Fine-tuning Method for Low-cost Edge Devices. ASP-DAC Hiroki Matsutani, Masaaki Kondo, Kazuki Sunaga, Radu Marculescu
2024	—	`conf`	A High-Throughput Network Intrusion Detection System Using On-Device Learning on FPGA. MCSoC Man Wu, Masaaki Kondo
2024	A	`conf`	DAISM: Digital Approximate In-SRAM Multiplier-Based Accelerator for DNN Training and Inference. DATE Lorenzo Sonnino, Shaswot Shresthamali, Yuan He, Masaaki Kondo
2024	J	`jnl`	Q-gen: A Parameterized Quantum Circuit Generator. CoRR Yikai Mao, Shaswot Shresthamali, Masaaki Kondo
2024	J	`jnl`	Quantum framework for Reinforcement Learning: integrating Markov Decision Process, quantum arithmetic, and trajectory search. CoRR Thet Htar Su, Shaswot Shresthamali, Masaaki Kondo
2024	J	`jnl`	Quantum-centric supercomputing for materials science: A perspective on challenges and future directions. Future Gener. Comput. Syst. Yuri Alexeev, Maximilian Amsler, Marco Antonio Barroca, Sanzio Bassini, Torey Battelle, Daan Camps, David Casanova, Young Jay Choi, Frederic T. Chong, Charles Chung, Christopher Codella, Antonio D. Córcoles, James Cruise, Alberto Di Meglio, Ivan Duran, Thomas Eckl, Sophia E. Economou, Stephan J. Eidenbenz, Bruce Elmegreen, Clyde Fare, Ismael Faro, Cristina Sanz Fernández, Rodrigo Neumann Barros Ferreira, Keisuke Fuji, Bryce Fuller, Laura Gagliardi, Giulia Galli, Jennifer R. Glick, Isacco Gobbi, Pranav Gokhale, Salvador de la Puente Gonzalez, Johannes Greiner, Bill Gropp, Michele Grossi, Emanuel Gull, Burns Healy, Matthew R. Hermes, Benchen Huang, Travis S. Humble, Nobuyasu Ito, Artur F. Izmaylov, Ali Javadi-Abhari, Douglas M. Jennewein, Shantenu Jha, Liang Jiang, Barbara Jones, Wibe Albert de Jong, Petar Jurcevic, William M. Kirby, Stefan Kister, Masahiro Kitagawa, Joel Klassen, Katherine Klymko, Kwangwon Koh, Masaaki Kondo, Doga Murat Kürkçüoglu, Krzysztof Kurowski, Teodoro Laino, Ryan Landfield, Matthew L. Leininger, Vicente Leyton-Ortega, Ang Li, Meifeng Lin, Junyu Liu, Nicolás Lorente, André Luckow, Simon Martiel, Francisco Martín-Fernández, Margaret Martonosi, Claire Marvinney, Arcesio Castañeda Medina, Dirk Merten, Antonio Mezzacapo, Kristel Michielsen, Abhishek Mitra, Tushar Mittal, Kyungsun Moon, Joel Moore, Sarah Mostame, Mario Motta, Young-Hye Na, Yunseong Nam, Prineha Narang, Yu-ya Ohnishi, Daniele Ottaviani, Matthew Otten, Scott Pakin, Vincent R. Pascuzzi, Edwin Pednault, Tomasz Piontek, Jed Pitera, Patrick Rall, Gokul Subramanian Ravi, Niall Robertson, Matteo A. C. Rossi, Piotr Rydlichowski, Hoon Ryu, Georgy Samsonidze, Mitsuhisa Sato, Nishant Saurabh, Vidushi Sharma, Kunal Sharma, Soyoung Shin, George Slessman, Mathias Steiner, Iskandar Sitdikov, In-Saeng Suh, Eric D. Switzer, Wei Tang, Joel Thompson, Synge Todo, Minh C. Tran, Dimitar Trenev, Christian Trott, Huan-Hsin Tseng, Norm M. Tubman, Esin Tureci, David García Valiñas, Sofia Vallecorsa, Christopher Wever, Konrad Wojciechowski, Xiaodi Wu, Shinjae Yoo, Nobuyuki Yoshioka, Victor Wen-zhe Yu, Seiji Yunoki, Sergiy Zhuk, Dmitry Zubarev
2024	J	`jnl`	Skip2-LoRA: A Lightweight On-device DNN Fine-tuning Method for Low-cost Edge Devices. CoRR Hiroki Matsutani, Masaaki Kondo, Kazuki Sunaga, Radu Marculescu
2023	J	`jnl`	A Scalable Body Bias Optimization Method Toward Low-Power CGRAs. IEEE Micro Takuya Kojima, Hayate Okuhara, Masaaki Kondo, Hideharu Amano
2023	—	`conf`	Accelerating Graph-Based SLAM through Data Parallelism and Mixed Precision on FPGAs. MCSoC Junfeng Wu, Yuan He, Masaaki Kondo
2023	J	`jnl`	Adaptive Lossy Data Compression Extended Architecture for Memory Bandwidth Conservation in SpMV. IEICE Trans. Inf. Syst. Siyi Hu, Makiko Ito, Takahide Yoshikawa, Yuan He, Hiroshi Nakamura, Masaaki Kondo
2023	J	`jnl`	Addressing the Gap Between Training Data and Deployed Environment by On-Device Learning. IEEE Micro Kazuki Sunaga, Masaaki Kondo, Hiroki Matsutani
2023	J	`jnl`	An Edge-Cloud Collaboration Framework for Graph Processing in Smart Society. IEEE Trans. Emerg. Top. Comput. Jun Zhou, Masaaki Kondo
2023	J	`jnl`	An Interactive and Reductive Graph Processing Library for Edge Computing in Smart Society. IEICE Trans. Inf. Syst. Jun Zhou, Masaaki Kondo
2023	J	`jnl`	An edge re-ordering based acceleration architecture for improving data locality in graph analytics applications. Microprocess. Microsystems Siyi Hu, Masaaki Kondo, Yuan He, Ryuichi Sakamoto, Hao Zhang, Jun Zhou, Hiroshi Nakamura
2023	J	`jnl`	DAISM: Digital Approximate In-SRAM Multiplier-based Accelerator for DNN Training and Inference. CoRR Lorenzo Sonnino, Shaswot Shresthamali, Yuan He, Masaaki Kondo
2023	—	`conf`	Enhancing Deep Reinforcement Learning with Compressed Sensing-based State Estimation. MCSoC Shaswot Shresthamali, Masaaki Kondo
2023	J	`jnl`	Evaluation of Performance and Power Consumption on Supercomputer Fugaku Using SPEC HPC Benchmarks. IEICE Trans. Electron. Yuetsu Kodama, Masaaki Kondo, Mitsuhisa Sato
2023	C	`conf`	Exploiting Data Parallelism in Graph-Based Simultaneous Localization and Mapping: A Case Study with GPU Accelerations. HPC Asia Junyuan Zheng, Yuan He, Masaaki Kondo
2023	J	`jnl`	Quantum Circuit Fidelity Improvement with Long Short-Term Memory Networks. CoRR Yikai Mao, Shaswot Shresthamali, Masaaki Kondo
2022	—	`conf`	Body Bias Control on a CGRA based on Convex Optimization. COOL CHIPS Takuya Kojima, Hayate Okuhara, Masaaki Kondo, Hideharu Amano
2022	J	`jnl`	Enabling circuit-switching in modern on-chip networks. Microprocess. Microsystems Jinyu Jiao, Yuan He, Thang Cao, Masaaki Kondo
2022	—	`conf`	FAWS: Fault-Aware Weight Scheduler for DNN Computations in Heterogeneous and Faulty Hardware. ISPA/BDCloud/SocialCom/SustainCom Shaswot Shresthamali, Yuan He, Masaaki Kondo
2022	C	`conf`	GraphDEAR: An Accelerator Architecture for Exploiting Cache Locality in Graph Analytics Applications. PDP Siyi Hu, Masaaki Kondo, Yuan He, Ryuichi Sakamoto, Hao Zhang, Jun Zhou, Hiroshi Nakamura
2022	—	`conf`	Hash Distributed A* on an FPGA. HEART Ryuichi Sakamoto, Yuriko Ezaki, Masaaki Kondo
2022	—	`conf`	Interactive and Reliable Graph Processing via the Edge-Cloud Collaboration Framework. HPCC/DSS/SmartCity/DependSys Jun Zhou, Masaaki Kondo
2022	C	`conf`	Memory Bandwidth Conservation for SpMV Kernels Through Adaptive Lossy Data Compression. PDCAT Siyi Hu, Makiko Ito, Takahide Yoshikawa, Yuan He, Masaaki Kondo
2022	J	`jnl`	NEO-QEC: Neural Network Enhanced Online Superconducting Decoder for Surface Codes. CoRR Yosuke Ueno, Masaaki Kondo, Masamitsu Tanaka, Yasunari Suzuki, Yutaka Tabuchi
2022	—	`conf`	ONLAD-IDS: ONLAD-Based Intrusion Detection System Using SmartNIC. HPCC/DSS/SmartCity/DependSys Man Wu, Hiroki Matsutani, Masaaki Kondo
2022	J	`jnl`	On-Device Learning: A Neural Network Based Field-Trainable Edge AI. CoRR Hiroki Matsutani, Mineto Tsukada, Masaaki Kondo
2022	A*	`conf`	QULATIS: A Quantum Error Correction Methodology toward Lattice Surgery. HPCA Yosuke Ueno, Masaaki Kondo, Masamitsu Tanaka, Yasunari Suzuki, Yutaka Tabuchi
2021	—	`conf`	A Lightweight Interactive Graph Processing Library for Edge Computing in Smart Society. CANDAR (Workshops) Jun Zhou, Masaaki Kondo
2021	J	`jnl`	Adaptive Resource Management for HPC Systems (Dagstuhl Seminar 21441). Dagstuhl Reports Michael Gerndt, Masaaki Kondo, Barton P. Miller, Tapasya Patki
2021	A*	`conf`	Density-Based Data Selection and Management for Edge Computing. PerCom Hiroki Oikawa, Masaaki Kondo
2021	J	`jnl`	Efficient and Precise Profiling, Modeling and Management on Power and Performance for Power Constrained HPC Systems. IEICE Trans. Electron. Yuan He, Yasutaka Wada, Wenchao Luo, Ryuichi Sakamoto, Guanqin Pan, Thang Cao, Masaaki Kondo
2021	C	`conf`	Evaluation of SPEC CPU and SPEC OMP on the A64FX. CLUSTER Yuetsu Kodama, Masaaki Kondo, Mitsuhisa Sato
2021	C	`conf`	Local Traffic-Based Energy-Efficient Hybrid Switching for On-Chip Networks. PDP Yuan He, Jinyu Jiao, Masaaki Kondo
2021	—	`conf`	MLMG: Multi-Local and Multi-Global Model Aggregation for Federated Learning. PerCom Workshops Yang Qin, Masaaki Kondo
2021	—	`conf`	Mitigating Process Variations with Cooperative Tuning for Performance and Power through a Simple DSL. CANDAR (Workshops) Yunjiao Ma, Yuan He, Yasutaka Wada, Wenchao Luo, Ryuichi Sakamoto, Masaaki Kondo
2021	—	`conf`	Multi-objective Reinforcement Learning for Energy Harvesting Wireless Sensor Nodes. MCSoC Shaswot Shresthamali, Masaaki Kondo, Hiroshi Nakamura
2021	—	`conf`	Path Planning and Moving Obstacle Avoidance with Neuromorphic Computing. ISR Motoki Sakurai, Yosuke Ueno, Masaaki Kondo
2021	A*	`conf`	QECOOL: On-Line Quantum Error Correction with a Superconducting Decoder for Surface Code. DAC Yosuke Ueno, Masaaki Kondo, Masamitsu Tanaka, Yasunari Suzuki, Yutaka Tabuchi
2020	J	`jnl`	A Neural Network-Based On-Device Learning Anomaly Detector for Edge Devices. IEEE Trans. Computers Mineto Tsukada, Masaaki Kondo, Hiroki Matsutani
2020	—	`conf`	A Selective Model Aggregation Approach in Federated Learning for Online Anomaly Detection. iThings/GreenCom/CPSCom/SmartData/Cybermatics Yang Qin, Hiroki Matsutani, Masaaki Kondo
2020	—	`conf`	Energy-Efficient On-Chip Networks through Profiled Hybrid Switching. ACM Great Lakes Symposium on VLSI Yuan He, Jinyu Jiao, Thang Cao, Masaaki Kondo
2020	J	`jnl`	Energy-Efficient On-Chip Networks through Profiled Hybrid Switching. CoRR Yuan He, Jinyu Jiao, Thang Cao, Masaaki Kondo
2020	—	`conf`	Fast Semi-Supervised Anomaly Detection of Drivers' Behavior using Online Sequential Extreme Learning Machine. ITSC Hiroki Oikawa, Tomoya Nishida, Ryuichi Sakamoto, Hiroki Matsutani, Masaaki Kondo
2020	C	`conf`	The Effectiveness of Low-Precision Floating Arithmetic on Numerical Codes: A Case Study on Power Consumption. HPC Asia Ryuichi Sakamoto, Masaaki Kondo, Kohei Fujita, Tsuyoshi Ichimura, Kengo Nakajima
2019	J	`jnl`	A Neural Network Based On-device Learning Anomaly Detector for Edge Devices. CoRR Mineto Tsukada, Masaaki Kondo, Hiroki Matsutani
2019	—	`conf`	A Preliminary Evaluation of Building Block Computing Systems. MCSoC Sayaka Terashima, Takuya Kojima, Hayate Okuhara, Kazusa Musha, Hideharu Amano, Ryuichi Sakamoto, Masaaki Kondo, Mitaro Namiki
2019	—	`conf`	An Adaptive Abnormal Behavior Detection using Online Sequential Learning. CSE/EUC Rei Ito, Mineto Tsukada, Masaaki Kondo, Hiroki Matsutani
2019	J	`jnl`	Generation High resolution 3D model from natural language by Generative Adversarial Network. CoRR Kentaro Fukamizu, Masaaki Kondo, Ryuichi Sakamoto
2019	C	`conf`	Power Management of Wireless Sensor Nodes with Coordinated Distributed Reinforcement Learning. ICCD Shaswot Shresthamali, Masaaki Kondo, Hiroshi Nakamura
2018	—	`conf`	A Power Management Framework with Simple DSL for Automatic Power-Performance Optimization on Power-Constrained HPC Systems. SCFA Yasutaka Wada, Yuan He, Thang Cao, Masaaki Kondo
2018	J	`jnl`	A new device for fiducial registration of image-guided navigation system for liver RFA. Int. J. Comput. Assist. Radiol. Surg. Nobutaka Doba, Hiroyuki Fukuda, Kazushi Numata, Yoshiteru Hao, Kouji Hara, Akito Nozaki, Masaaki Kondo, Makoto Chuma, Katsuaki Tanaka, Shigeo Takebayashi, Norihiro Koizumi, Akira Kobayashi, Junichi Tokuda, Shin Maeda
2018	A	`conf`	Analyzing Resource Trade-offs in Hardware Overprovisioned Supercomputers. IPDPS Ryuichi Sakamoto, Tapasya Patki, Thang Cao, Masaaki Kondo, Koji Inoue, Masatsugu Ueda, Daniel A. Ellsworth, Barry Rountree, Martin Schulz
2018	—	`conf`	OS-ELM-FPGA: An FPGA-Based Online Sequential Unsupervised Anomaly Detector. Euro-Par Workshops Mineto Tsukada, Masaaki Kondo, Hiroki Matsutani
2017	J	`jnl`	Adaptive Power Management in Solar Energy Harvesting Sensor Node Using Reinforcement Learning. ACM Trans. Embed. Comput. Syst. Shaswot Shresthamali, Masaaki Kondo, Hiroshi Nakamura
2017	—	`conf`	Building block multi-chip systems using inductive coupling through chip interface. ISOCC Hideharu Amano, Tadahiro Kuroda, Hiroshi Nakamura, Kimiyoshi Usami, Masaaki Kondo, Hiroki Matsutani, Mitaro Namiki
2017	A	`conf`	Cooling-Aware Job Scheduling and Node Allocation for Overprovisioned HPC Systems. IPDPS Thang Cao, Wei Huang, Yuan He, Masaaki Kondo
2017	A	`conf`	Production Hardware Overprovisioning: Real-World Performance Optimization Using an Extensible Power-Aware Resource Management Framework. IPDPS Ryuichi Sakamoto, Thang Cao, Masaaki Kondo, Koji Inoue, Masatsugu Ueda, Tapasya Patki, Daniel A. Ellsworth, Barry Rountree, Martin Schulz
2017	—	`conf`	Scalable deep neural network accelerator cores with cubic integration using through chip interface. ISOCC Ryuichi Sakamoto, Ryo Takata, Jun Ishii, Masaaki Kondo, Hiroshi Nakamura, Tetsui Ohkubo, Takuya Kojima, Hideharu Amano
2017	—	`conf`	The Design and Implementation of Scalable Deep Neural Network Accelerator Cores. MCSoC Ryuichi Sakamoto, Ryo Takata, Jun Ishii, Masaaki Kondo, Hiroshi Nakamura, Tetsui Ohkubo, Takuya Kojima, Hideharu Amano
2016	J	`jnl`	A Runtime Optimization Selection Framework to Realize Energy Efficient Networks-on-Chip. IEICE Trans. Inf. Syst. Yuan He, Masaaki Kondo, Takashi Nakada, Hiroshi Sasaki, Shinobu Miwa, Hiroshi Nakamura
2016	J	`jnl`	An Operating System Guided Fine-Grained Power Gating Control Based on Runtime Characteristics of Applications. IEICE Trans. Electron. Atsushi Koshiba, Mikiko Sato, Kimiyoshi Usami, Hideharu Amano, Ryuichi Sakamoto, Masaaki Kondo, Hiroshi Nakamura, Mitaro Namiki
2016	B	`conf`	Demand-Aware Power Management for Power-Constrained HPC Systems. CCGrid Cao Thang, Yuan He, Masaaki Kondo
2016	C	`conf`	Opportunistic circuit-switching for energy efficient on-chip networks. VLSI-SoC Yuan He, Masaaki Kondo
2015	J	`jnl`	A Fine-Grained Power Gating Control on Linux Monitoring Power Consumption of Processor Functional Units. IEICE Trans. Electron. Atsushi Koshiba, Motoki Wada, Ryuichi Sakamoto, Mikiko Sato, Tsubasa Kosaka, Kimiyoshi Usami, Hideharu Amano, Masaaki Kondo, Hiroshi Nakamura, Mitaro Namiki
2015	—	`conf`	A flexible hardware barrier mechanism for many-core processors. ASP-DAC Takeshi Soga, Hiroshi Sasaki, Tomoya Hirao, Masaaki Kondo, Koji Inoue
2015	A	`conf`	Analyzing and mitigating the impact of manufacturing variability in power-constrained supercomputing. SC Yuichi Inadomi, Tapasya Patki, Koji Inoue, Mutsumi Aoyagi, Barry Rountree, Martin Schulz, David K. Lowenthal, Yasutaka Wada, Keiichiro Fukazawa, Masatsugu Ueda, Masaaki Kondo, Ikuo Miyoshi
2015	C	`conf`	Runtime multi-optimizations for energy efficient on-chip interconnections1. ICCD Yuan He, Masaaki Kondo, Takashi Nakada, Hiroshi Sasaki, Shinobu Miwa, Hiroshi Nakamura
2014	—	`conf`	Design and control methodology for fine grain power gating based on energy characterization and code profiling of microprocessors. ASP-DAC Kimiyoshi Usami, Masaru Kudo, Kensaku Matsunaga, Tsubasa Kosaka, Yoshihiro Tsurui, Weihan Wang, Hideharu Amano, Hiroaki Kobayashi, Ryuichi Sakamoto, Mitaro Namiki, Masaaki Kondo, Hiroshi Nakamura
2014	A	`conf`	Design and evaluation of fine-grained power-gating for embedded microprocessors. DATE Masaaki Kondo, Hiroaki Kobayashi, Ryuichi Sakamoto, Motoki Wada, Jun Tsukamoto, Mitaro Namiki, Weihan Wang, Hideharu Amano, Kensaku Matsunaga, Masaru Kudo, Kimiyoshi Usami, Toshiya Komoda, Hiroshi Nakamura
2014	—	`conf`	Unbalanced buffer tree synthesis to suppress ground bounce for fine-grain power gating. ISSoC Kimiyoshi Usami, Makoto Miyauchi, Masaru Kudo, Kazumitsu Takagi, Hideharu Amano, Mitaro Namiki, Masaaki Kondo, Hiroshi Nakamura
2013	J	`jnl`	A Prototype System for Many-Core Architecture SMYLEref with FPGA Evaluation Boards. IEICE Trans. Inf. Syst. Son-Truong Nguyen, Masaaki Kondo, Tomoya Hirao, Koji Inoue
2013	J	`jnl`	A Scalable 3D Heterogeneous Multicore with an Inductive ThruChip Interface. IEEE Micro Noriyuki Miura, Yusuke Koizumi, Yasuhiro Take, Hiroki Matsutani, Tadahiro Kuroda, Hideharu Amano, Ryuichi Sakamoto, Mitaro Namiki, Kimiyoshi Usami, Masaaki Kondo, Hiroshi Nakamura
2013	—	`conf`	A scalable 3D heterogeneous multi-core processor with inductive-coupling thruchip interface. COOL Chips Noriyuki Miura, Yusuke Koizumi, Eiichi Sasaki, Yasuhiro Take, Hiroki Matsutani, Tadahiro Kuroda, Hideharu Amano, Ryuichi Sakamoto, Mitaro Namiki, Kimiyoshi Usami, Masaaki Kondo, Hiroshi Nakamura
2013	—	`conf`	A scalable 3D heterogeneous multi-core processor with inductive-coupling thruchip interface. Hot Chips Symposium Noriyuki Miura, Yusuke Koizumi, Eiichi Sasaki, Yasuhiro Take, Hiroki Matsutani, Tadahiro Kuroda, Hideharu Amano, Ryuichi Sakamoto, Mitaro Namiki, Kimiyoshi Usami, Masaaki Kondo, Hiroshi Nakamura
2013	B	`conf`	Demonstration of a heterogeneous multi-core processor with 3-D inductive coupling links. FPL Yusuke Koizumi, Noriyuki Miura, Yasuhiro Take, Hiroki Matsutani, Tadahiro Kuroda, Hideharu Amano, Ryuichi Sakamoto, Mitaro Namiki, Kimiyoshi Usami, Masaaki Kondo, Hiroshi Nakamura
2013	J	`jnl`	Fine-Grained Run-Tume Power Gating through Co-optimization of Circuit, Architecture, and System Software Design. IEICE Trans. Electron. Hiroshi Nakamura, Weihan Wang, Yuya Ohta, Kimiyoshi Usami, Hideharu Amano, Masaaki Kondo, Mitaro Namiki
2013	—	`conf`	SMYLEref: A reference architecture for manycore-processor SoCs. ASP-DAC Masaaki Kondo, Son Truong Nguyen, Tomoya Hirao, Takeshi Soga, Hiroshi Sasaki, Koji Inoue
2012	B	`conf`	CMA-Cube: A scalable reconfigurable accelerator with 3-D wireless inductive coupling interconnect. FPL Yusuke Koizumi, Eiichi Sasaki, Hideharu Amano, Hiroki Matsutani, Yasuhiro Take, Tadahiro Kuroda, Ryuichi Sakamoto, Mitaro Namiki, Kimiyoshi Usami, Masaaki Kondo, Hiroshi Nakamura
2012	—	`conf`	Dynamic power control with a heterogeneous multi-core system using a 3-D wireless inductive coupling interconnect. FPT Yusuke Koizumi, Hideharu Amano, Hiroki Matsutani, Noriyuki Miura, Tadahiro Kuroda, Ryuichi Sakamoto, Mitaro Namiki, Kimiyoshi Usami, Masaaki Kondo, Hiroshi Nakamura
2012	—	`conf`	FLAT: a GPU programming framework to provide embedded MPI. GPGPU@ASPLOS Takefumi Miyoshi, Hidetsugu Irie, Keigo Shima, Hiroki Honda, Masaaki Kondo, Tsutomu Yoshinaga
2012	—	`ch.`	Geyser. Handbook of Energy-Aware and Green Computing Hiroshi Sasaki, Hideharu Amano, Kimiyoshi Usami, Masaaki Kondo, Mitaro Namiki, Hiroshi Nakamura
2011	—	`conf`	Cool Mega-Array: A highly energy efficient reconfigurable accelerator. FPT Nobuaki Ozaki, Yoshihiro Yasuda, Yoshiki Saito, Daisuke Ikebuchi, Masayuki Kimura, Hideharu Amano, Hiroshi Nakamura, Kimiyoshi Usami, Mitaro Namiki, Masaaki Kondo
2011	J	`jnl`	Cool Mega-Arrays: Ultralow-Power Reconfigurable Accelerator Chips. IEEE Micro Nobuaki Ozaki, Yoshihiro Yasuda, Mai Izawa, Yoshiki Saito, Daisuke Ikebuchi, Hideharu Amano, Hiroshi Nakamura, Kimiyoshi Usami, Mitaro Namiki, Masaaki Kondo
2011	J	`jnl`	Design and Implementation Fine-grained Power Gating on Microprocessor Functional Units. Inf. Media Technol. Zhao Lei, Daisuke Ikebuchi, Kimiyoshi Usami, Mitaro Namiki, Masaaki Kondo, Hiroshi Nakamura, Hideharu Amano
2011	J	`jnl`	Design and Implementation Fine-grained Power Gating on Microprocessor Functional Units. IPSJ Trans. Syst. LSI Des. Methodol. Zhao Lei, Daisuke Ikebuchi, Kimiyoshi Usami, Mitaro Namiki, Masaaki Kondo, Hiroshi Nakamura, Hideharu Amano
2011	—	`conf`	Geyser-2: The second prototype CPU with fine-grained run-time power gating. ASP-DAC Lei Zhao, Daisuke Ikebuchi, Yoshiki Saito, M. Kamata, Naomi Seki, Yu Kojima, Hideharu Amano, Satoshi Koyama, Tatsunori Hashida, Y. Umahashi, D. Masuda, Kimiyoshi Usami, Keiji Kimura, Mitaro Namiki, Seidai Takeda, Hiroshi Nakamura, Masaaki Kondo
2011	—	`conf`	SLD-1(Silent Large Datapath): A ultra low power reconfigurable accelerator. COOL Chips Nobuaki Ozaki, Kimiyoshi Usami, Hideharu Amano, Mitaro Namiki, Hiroshi Nakamura, Masaaki Kondo
2010	—	`conf`	Adaptive power gating for function units in a microprocessor. ISQED Kimiyoshi Usami, Tatsunori Hashida, Satoshi Koyama, Tatsuya Yamamoto, Daisuke Ikebuchi, Hideharu Amano, Mitaro Namiki, Masaaki Kondo, Hiroshi Nakamura
2010	—	`conf`	Geyser-1: a MIPS R3000 CPU core with fine-grained run-time power gating. ASP-DAC Daisuke Ikebuchi, Naomi Seki, Yu Kojima, M. Kamata, Lei Zhao, Hideharu Amano, Toshiaki Shirai, Satoshi Koyama, Tatsunori Hashida, Y. Umahashi, Hiroki Masuda, Kimiyoshi Usami, Seidai Takeda, Hiroshi Nakamura, Mitaro Namiki, Masaaki Kondo
2009	A	`conf`	Cooperative shared resource access control for low-power chip multiprocessors. ISLPED Noriko Takagi, Hiroshi Sasaki, Masaaki Kondo, Hiroshi Nakamura
2009	Misc	`conf`	Design and Implementation of Fine-Grain Power Gating with Ground Bounce Suppression. VLSI Design Kimiyoshi Usami, Toshiaki Shirai, Tatsunori Hashida, Hiroki Masuda, Seidai Takeda, Mitsutaka Nakata, Naomi Seki, Hideharu Amano, Mitaro Namiki, Masashi Imai, Masaaki Kondo, Hiroshi Nakamura
2009	J	`jnl`	Energy-Efficient Dynamic Instruction Scheduling Logic Through Instruction Grouping. IEEE Trans. Very Large Scale Integr. Syst. Hiroshi Sasaki, Masaaki Kondo, Hiroshi Nakamura
2009	—	`conf`	Power-performance modeling of heterogeneous cluster-based web servers. GRID Hiroshi Sasaki, Takatsugu Oya, Masaaki Kondo, Hiroshi Nakamura
2008	C	`conf`	A fine-grain dynamic sleep control scheme in MIPS R3000. ICCD Naomi Seki, Lei Zhao, Jo Kei, Daisuke Ikebuchi, Yu Kojima, Yohei Hasegawa, Hideharu Amano, Toshihiro Kashima, Seidai Takeda, Toshiaki Shirai, Mitsutaka Nakata, Kimiyoshi Usami, Tetsuya Sunata, Jun Kanai, Mitaro Namiki, Masaaki Kondo, Hiroshi Nakamura
2007	A	`conf`	A High Performance Cluster System Design by Adaptie Power Control. IPDPS Masaaki Kondo, Yoshimichi Ikeda, Hiroshi Nakamura
2007	—	`conf`	An intra-task dvfs technique based on statistical analysis of hardware events. Conf. Computing Frontiers Hiroshi Sasaki, Yoshimichi Ikeda, Masaaki Kondo, Hiroshi Nakamura
2007	J	`jnl`	Improving fairness, throughput and energy-efficiency on a chip multiprocessor through DVFS. SIGARCH Comput. Archit. News Masaaki Kondo, Hiroshi Sasaki, Hiroshi Nakamura
2007	A	`conf`	Interactive presentation: Task scheduling under performance constraints for reducing the energy consumption of the GALS multi-processor SoC. DATE Ryo Watanabe, Masaaki Kondo, Masashi Imai, Hiroshi Nakamura, Takashi Nanya
2007	C	`conf`	Power reduction of chip multi-processors using shared resource control cooperating with DVFS. ICCD Ryo Watanabe, Masaaki Kondo, Hiroshi Nakamura, Takashi Nanya
2006	J	`jnl`	Design Method of High Performance and Low Power Functional Units Considering Delay Variations. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Kouichi Watanabe, Masashi Imai, Masaaki Kondo, Hiroshi Nakamura, Takashi Nanya
2006	A	`conf`	Energy-efficient dynamic instruction scheduling logic through instruction grouping. ISLPED Hiroshi Sasaki, Masaaki Kondo, Hiroshi Nakamura
2005	A*	`conf`	A Small, Fast and Low-Power Register File by Bit-Partitioning. HPCA Masaaki Kondo, Hiroshi Nakamura
2005	—	`conf`	Dynamic Instruction Cascading on GALS Microprocessors. PATMOS Hiroshi Sasaki, Masaaki Kondo, Hiroshi Nakamura
2005	—	`conf`	Empirical Study for Optimization of Power-Performance with On-Chip Memory. ISHPC Chikafumi Takahashi, Mitsuhisa Sato, Daisuke Takahashi, Taisuke Boku, Hiroshi Nakamura, Masaaki Kondo, Motonobu Fujita
2004	—	`conf`	Data Movement Optimization for Software-Controlled On-Chip Memory. Interaction between Compilers and Computer Architectures Motonobu Fujita, Masaaki Kondo, Hiroshi Nakamura
2004	—	`conf`	Dynamic Processor Throttling for Power Efficient Computations. PACS Masaaki Kondo, Hiroshi Nakamura
2004	—	`conf`	SCIMA-SMP: on-chip memory processor architecture for SMP. WMPI Chikafumi Takahashi, Masaaki Kondo, Taisuke Boku, Daisuke Takahashi, Hiroshi Nakamura, Mitsuhisa Sato
2004	B	`conf`	Skewed Checkpointing for Tolerating Multi-Node Failures. SRDS Hiroshi Nakamura, Takuro Hayashida, Masaaki Kondo, Yuya Tajima, Masashi Imai, Takashi Nanya
2002	—	`conf`	Cache Line Impact on 3D PDE Solvers. ISHPC Masaaki Kondo, Mitsugu Iwamoto, Hiroshi Nakamura
2002	—	`conf`	Design and evaluation of high performance microprocessor with reconfigurable on-chip memory. APCCAS (1) T. Ohneda, Masaaki Kondo, Masashi Imai, Hiroshi Nakamura
2002	J	`jnl`	Software-controlled on-chip memory for high-performance and low-power computing. SIGARCH Comput. Archit. News Masaaki Kondo, Motonobu Fujita, Hiroshi Nakamura
2000	Misc	`conf`	An acoustic measure for predicting recognition performance degradation. ICASSP Kazuya Takeda, Masaaki Kondo, Fumitada Itakura
2000	C	`conf`	SCIMA: Software Controlled Integrated Memory Architecture for High Performance Computing. ICCD Masaaki Kondo, Hideki Okawara, Hiroshi Nakamura, Taisuke Boku
2000	—	`conf`	Software Controlled Reconfigurable On-Chip Memory for High Performance Computing. Intelligent Memory Systems Hiroshi Nakamura, Masaaki Kondo, Taisuke Boku