María C. Molina

34 papers A* 1A 11B 1C 5Journal 12Unranked 4
YearRankTypeTitle / Venue / Authors
2014 J jnl
Improving circuit performance with multispeculative additive trees in high-level synthesis.
Microelectron. J.
Alberto A. Del Barrio, Román Hermida, Seda Ogrenci Memik, Jose Manuel Mendias, María C. Molina
2013 J jnl
A fragmentation aware High-Level Synthesis flow for low power heterogenous datapaths.
Integr.
Alberto A. Del Barrio, Seda Ogrenci Memik, María C. Molina, José M. Mendías, Román Hermida
2013 A conf
Multispeculative additive trees in high-level synthesis.
DATE
Alberto A. Del Barrio, Román Hermida, Seda Ogrenci Memik, Jose Manuel Mendias, María C. Molina
2012 J jnl
Multispeculative Addition Applied to Datapath Synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Alberto A. Del Barrio, Román Hermida, Seda Ogrenci Memik, José M. Mendías, María C. Molina
2011 J jnl
A Distributed Controller for Managing Speculative Functional Units in High Level Synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Alberto A. Del Barrio, Seda Ogrenci Memik, María C. Molina, Jose Manuel Mendias, Román Hermida
2011 A conf
Power optimization in heterogenous datapaths.
DATE
Alberto A. Del Barrio, Seda Ogrenci Memik, María C. Molina, José M. Mendías, Román Hermida
2010 J jnl
Robust Bioinspired Architecture for Optical-Flow Computation.
IEEE Trans. Very Large Scale Integr. Syst.
Guillermo Botella Juan, Antonio García Ríos, M. Rodriguez-Alvarez, Eduardo Ros Vidal, Uwe Meyer-Bäse, María C. Molina
2010 A conf
Using Speculative Functional Units in high level synthesis.
DATE
Alberto A. Del Barrio, María C. Molina, Jose Manuel Mendias, Román Hermida, Seda Ogrenci Memik
2009 B conf
Enhanced gradient-based motion vector coprocessor.
FPL
Guillermo Botella Juan, Antonio García Ríos, Uwe Meyer-Bäse, Manuel Rodríguez, María C. Molina, Luís Parrilla Roure
2009 J jnl
Frequent-Pattern-Guided Multilevel Decomposition of Behavioral Specifications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
María C. Molina, Rafael Ruiz-Sautua, Pedro Garcia-Repetto, Román Hermida
2009 J jnl
Performance-driven scheduling of behavioural specifications.
Integr.
María C. Molina, Rafael Ruiz-Sautua, Pedro Garcia-Repetto, José M. Mendías
2009 J jnl
Subword Switching Activity Minimization to Optimize Dynamic Power Consumption.
IEEE Des. Test Comput.
María C. Molina, Rafael Ruiz-Sautua, Alberto A. Del Barrio, Jose Manuel Mendias
2008 C conf
Applying speculation techniques to implement functional units.
ICCD
Alberto A. Del Barrio, María C. Molina, Jose Manuel Mendias, Esther Andres Perez, Román Hermida, Francisco Tirado
2008 C conf
Exploiting Internal Operation Patterns during the High-Level Synthesis of Time-Constrained Circuits.
DSD
Pedro Garcia-Repetto, María C. Molina, Rafael Ruiz-Sautua, Guillermo Botella Juan
2008 C conf
Restricted Chaining and Fragmentation Techniques in Power Aware High Level Synthesis.
DSD
Alberto A. Del Barrio, María C. Molina, Jose Manuel Mendias, Esther Andres Perez, Román Hermida
2007 A conf
Area optimization of multi-cycle operators in high-level synthesis.
DATE
María C. Molina, Rafael Ruiz-Sautua, Jose Manuel Mendias, Román Hermida
2007 J jnl
Behavioural Transformation to Improve Circuit Performance in High-Level Synthesis
CoRR
Rafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida
2007 J jnl
Exploiting Bit-Level Delay Calculations to Soften Read-After-Write Dependences in Behavioral Synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Rafael Ruiz-Sautua, María C. Molina, Jose Manuel Mendias
2006 J jnl
Bitwise scheduling to balance the computational cost of behavioral specifications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
María C. Molina, Rafael Ruiz-Sautua, Jose Manuel Mendias, Román Hermida
2006 A conf
Pre-synthesis optimization of multiplications to improve circuit performance.
DATE
Rafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida
2005 — conf
Arrival time aware scheduling to minimize clock cycle length.
ASP-DAC
Rafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida
2005 A conf
Behavioural Transformation to Improve Circuit Performance in High-Level Synthesis.
DATE
Rafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida
2005 A conf
Performance-driven read-after-write dependencies softening in high-level synthesis.
ICCAD
Rafael Ruiz-Sautua, María C. Molina, Jose Manuel Mendias, Román Hermida
2004 A conf
Behavioural Bitwise Scheduling Based on Computational Effort Balancing.
DATE
María C. Molina, Rafael Ruiz-Sautua, José M. Mendías, Román Hermida
2004 — conf
Behavioural Scheduling to Balance the Bit-Level Computational Effort.
ISVLSI
María C. Molina, Rafael Ruiz-Sautua, José M. Mendías, Román Hermida
2003 J jnl
Allocation of multiple precision behaviors for maximal bit level reuse of hardware resources.
J. Syst. Archit.
María C. Molina, José M. Mendías, Román Hermida
2003 — conf
Bit-Level Allocation for Low Power in Behavioural High-Level Synthesis.
PATMOS
María C. Molina, Rafael Ruiz-Sautua, José M. Mendías, Román Hermida
2003 A conf
High-Level Allocation to Minimize Internal Hardware Wastage.
DATE
María C. Molina, José M. Mendías, Román Hermida
2002 C conf
Bit-Level Allocation of Multiple-Precision Specifications.
DSD
María C. Molina, José M. Mendías, Román Hermida
2002 A conf
Bit-level scheduling of heterogeneous behavioural specifications.
ICCAD
María C. Molina, José M. Mendías, Román Hermida
2002 C conf
Efficient Verification of Scheduling, Allocation and Binding in High-Level Synthesis.
DSD
José M. Mendías, Román Hermida, María C. Molina, Olga Peñalba
2002 A* conf
High-level synthesis of multiple-precision circuitsindependent of data-objects length.
DAC
María C. Molina, José M. Mendías, Román Hermida
2002 A conf
Multiple-Precision Circuits Allocation Independent of Data-Objects Length.
DATE
María C. Molina, José M. Mendías, Román Hermida
2000 — conf
Execution Condition Analysis in High Level Synthesis: A Unified Approach.
ISSS
Olga Peñalba, José M. Mendías, María C. Molina