Mary Jane Irwin

370 papers A* 39A 63B 14C 20Misc 42Journal 97Unranked 93

Year	Rank	Type	Title / Venue / Authors
2016	J	`jnl`	21st Century Computer Architecture. CoRR Mark D. Hill, Sarita V. Adve, Luis Ceze, Mary Jane Irwin, David R. Kaeli, Margaret Martonosi, Josep Torrellas, Thomas F. Wenisch, David A. Wood, Katherine A. Yelick
2016	C	`conf`	Designs of emerging memory based non-volatile TCAM for Internet-of-Things (IoT) and big-data processing: A 5T2R universal cell. ISCAS Meng-Fan Chang, Ching-Hao Chuang, Yen-Ning Chiang, Shyh-Shyuan Sheu, Chia-Chen Kuo, Hsiang-Yun Cheng, John Sampson, Mary Jane Irwin
2016	A*	`conf`	LAP: Loop-Block Aware Inclusion Properties for Energy-Efficient Asymmetric Last Level Caches. ISCA Hsiang-Yun Cheng, Jishen Zhao, Jack Sampson, Mary Jane Irwin, Aamer Jaleel, Yu Lu, Yuan Xie
2016	J	`jnl`	Steven P. Levitan (1950-2016). IEEE Des. Test Mary Jane Irwin, Soha Hassoun
2015	J	`jnl`	Adaptive Burst-Writes (ABW): Memory Requests Scheduling to Reduce Write-Induced Interference. ACM Trans. Design Autom. Electr. Syst. Hsiang-Yun Cheng, Mary Jane Irwin, Yuan Xie
2015	A*	`conf`	Core vs. uncore: the heart of darkness. DAC Hsiang-Yun Cheng, Jia Zhan, Jishen Zhao, Yuan Xie, Jack Sampson, Mary Jane Irwin
2015	J	`jnl`	EECache: A Comprehensive Study on the Architectural Design for Energy-Efficient Last-Level Caches in Chip Multiprocessors. ACM Trans. Archit. Code Optim. Hsiang-Yun Cheng, Matt Poremba, Narges Shahidi, Ivan Stalev, Mary Jane Irwin, Mahmut T. Kandemir, Jack Sampson, Yuan Xie
2015	A	`conf`	Platform-aware dynamic configuration support for efficient text processing on heterogeneous system. DATE Mi Sun Park, Omesh Tickoo, Vijaykrishnan Narayanan, Mary Jane Irwin, Ravi Iyer
2015	—	`conf`	TaPEr: tackling power emergencies in the dark silicon era by exploiting resource scalability. Conf. Computing Frontiers Hui Zhao, Mahmut T. Kandemir, Mary Jane Irwin
2014	A	`conf`	EECache: exploiting design choices in energy-efficient last-level caches for chip multiprocessors. ISLPED Hsiang-Yun Cheng, Matthew Poremba, Narges Shahidi, Ivan Stalev, Mary Jane Irwin, Mahmut T. Kandemir, Jack Sampson, Yuan Xie
2013	J	`jnl`	Design of energy-efficient circuits and systems using tunnel field effect transistors. IET Circuits Devices Syst. Ravindhiran Mukundrajan, Matthew Cotter, Sungmin Bae, Vinay Saripalli, Mary Jane Irwin, Suman Datta, Vijaykrishnan Narayanan
2013	B	`conf`	Reshaping cache misses to improve row-buffer locality in multicore systems. PACT Wei Ding, Jun Liu, Mahmut T. Kandemir, Mary Jane Irwin
2012	A*	`conf`	A hybrid NoC design for cache coherence optimization for chip multiprocessors. DAC Hui Zhao, Ohyoung Jang, Wei Ding, Yuanrui Zhang, Mahmut T. Kandemir, Mary Jane Irwin
2012	A	`conf`	An FPGA-based accelerator for cortical object classification. DATE Mi Sun Park, Srinidhi Kestur, Jagdish Sabarad, Vijaykrishnan Narayanan, Mary Jane Irwin
2012	A*	`conf`	Courteous cache sharing: being nice to others in capacity management. DAC Akbar Sharifi, Shekhar Srikantaiah, Mahmut T. Kandemir, Mary Jane Irwin
2012	B	`conf`	REEact: a customizable virtual execution manager for multicore platforms. VEE Wei Wang, Tanima Dey, Ryan W. Moore, Mahmut Aktasoglu, Bruce R. Childers, Jack W. Davidson, Mary Jane Irwin, Mahmut T. Kandemir, Mary Lou Soffa
2012	—	`conf`	Ultra Low Power Circuit Design Using Tunnel FETs. ISVLSI Ravindhiran Mukundrajan, Matthew Cotter, Vinay Saripalli, Mary Jane Irwin, Suman Datta, Vijaykrishnan Narayanan
2011	A	`conf`	Exploring heterogeneous NoC design space. ICCAD Hui Zhao, Mahmut T. Kandemir, Wei Ding, Mary Jane Irwin
2011	—	`conf`	Exploring performance-power tradeoffs in providing reliability for NoC-based MPSoCs. ISQED Hui Zhao, Mahmut T. Kandemir, Mary Jane Irwin
2011	A*	`conf`	MorphCache: A Reconfigurable Adaptive Multi-level Cache hierarchy. HPCA Shekhar Srikantaiah, Emre Kultursay, Tao Zhang, Mahmut T. Kandemir, Mary Jane Irwin, Yuan Xie
2011	J	`jnl`	Optimizing sensor movement planning for energy efficiency. ACM Trans. Sens. Networks Guiling Wang, Mary Jane Irwin, Haoying Fu, Piotr Berman, Wensheng Zhang, Tom La Porta
2010	A*	`conf`	Cache topology aware computation mapping for multicores. PLDI Mahmut T. Kandemir, Taylan Yemliha, Sai Prashanth Muralidhara, Shekhar Srikantaiah, Mary Jane Irwin, Yuanrui Zhang
2010	B	`conf`	Compiler directed network-on-chip reliability enhancement for chip multiprocessors. LCTES Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin, Sri Hari Krishna Narayanan
2010	—	`conf`	Dynamic core partitioning for energy efficiency. IPDPS Workshops Yang Ding, Mahmut T. Kandemir, Mary Jane Irwin, Padma Raghavan
2010	J	`jnl`	On the Effects of Process Variation in Network-on-Chip Architectures. IEEE Trans. Dependable Secur. Comput. Chrysostomos Nicopoulos, Suresh Srinivasan, Aditya Yanamandra, Dongkook Park, Vijaykrishnan Narayanan, Chita R. Das, Mary Jane Irwin
2010	J	`jnl`	On-chip memory space partitioning for chip multiprocessors using polyhedral algebra. IET Comput. Digit. Tech. Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin
2010	—	`conf`	Optimizing power and performance for reliable on-chip networks. ASP-DAC Aditya Yanamandra, Soumya Eachempati, Niranjan Soundararajan, Vijaykrishnan Narayanan, Mary Jane Irwin, Ramakrishnan Krishnan
2010	A*	`conf`	Shared caches in multicores: the good, the bad, and the ugly. ISCA Mary Jane Irwin
2010	—	`conf`	T-NUCA - a novel approach to non-uniform access latency cache architectures for 3D CMPs. IPDPS Workshops Konrad Malkowski, Padma Raghavan, Mahmut T. Kandemir, Mary Jane Irwin
2010	J	`jnl`	Technology scaling redirects main memories: technical perspective. Commun. ACM Mary Jane Irwin
2010	J	`jnl`	Total Power Optimization for Combinational Logic Using Genetic Algorithms. J. Signal Process. Syst. Wei-Lun Hung, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2009	—	`conf`	Adapting Application Mapping to Systematic Within-Die Process Variations on Chip Multiprocessors. HiPEAC Yang Ding, Mahmut T. Kandemir, Mary Jane Irwin, Padma Raghavan
2009	J	`jnl`	Adapting application execution in CMPs using helper threads. J. Parallel Distributed Comput. Yang Ding, Mahmut T. Kandemir, Padma Raghavan, Mary Jane Irwin
2009	—	`conf`	Arithmetic unit design using 180nm TSV-based 3D stacking technology. 3DIC Jin Ouyang, Guangyu Sun, Yibo Chen, Lian Duan, Tao Zhang, Yuan Xie, Mary Jane Irwin
2009	J	`jnl`	Compiler-assisted soft error detection under performance and energy constraints in embedded systems. ACM Trans. Embed. Comput. Syst. Jie S. Hu, Feihui Li, Vijay Degalahal, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2009	—	`conf`	In-Network Caching for Chip Multiprocessors. HiPEAC Aditya Yanamandra, Mary Jane Irwin, Vijaykrishnan Narayanan, Mahmut T. Kandemir, Sri Hari Krishna Narayanan
2009	J	`jnl`	Modeling Soft Errors at the Device and Logic Levels for Combinational Circuits. IEEE Trans. Dependable Secur. Comput. Rajaraman Ramanarayanan, Vijay Degalahal, Krishnan Ramakrishnan, Jungsub Kim, Vijaykrishnan Narayanan, Yuan Xie, Mary Jane Irwin, Kenan Unlu
2009	—	`conf`	Power and area reduction using carbon nanotube bundle interconnect in global clock tree distribution network. NANOARCH Yuan Xie, Soumya Eachempati, Aditya Yanamandra, Vijaykrishnan Narayanan, Mary Jane Irwin
2009	A*	`ed.`	Proceedings of the 14th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2009, Washington, DC, USA, March 7-11, 2009 ASPLOS Mary Lou Soffa, Mary Jane Irwin
2009	J	`jnl`	Process-Variation-Aware Adaptive Cache Architecture and Management. IEEE Trans. Computers Madhu Mutyam, Feng Wang, Krishnan Ramakrishnan, Vijaykrishnan Narayanan, Mahmut T. Kandemir, Yuan Xie, Mary Jane Irwin
2009	J	`jnl`	Using Data Compression for Increasing Memory System Utilization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin
2008	A	`conf`	A helper thread based EDP reduction scheme for adapting application execution in CMPs. IPDPS Yang Ding, Mahmut T. Kandemir, Padma Raghavan, Mary Jane Irwin
2008	—	`conf`	A low-power phase change memory based hybrid cache architecture. ACM Great Lakes Symposium on VLSI Prasanth Mangalagiri, Karthik Sarpatwari, Aditya Yanamandra, Vijaykrishnan Narayanan, Yuan Xie, Mary Jane Irwin, Osama Awadel Karim
2008	A	`conf`	A novel migration-based NUCA design for chip multiprocessors. SC Mahmut T. Kandemir, Feihui Li, Mary Jane Irwin, Seung Woo Son
2008	A*	`conf`	Adaptive set pinning: managing shared caches in chip multiprocessors. ASPLOS Shekhar Srikantaiah, Mahmut T. Kandemir, Mary Jane Irwin
2008	A	`conf`	Analysis and solutions to issue queue process variation. DSN Niranjan Soundararajan, Aditya Yanamandra, Chrysostomos Nicopoulos, Narayanan Vijaykrishnan, Anand Sivasubramaniam, Mary Jane Irwin
2008	J	`jnl`	Design Space Exploration for 3-D Cache. IEEE Trans. Very Large Scale Integr. Syst. Yuh-Fang Tsai, Feng Wang, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin
2008	A	`conf`	Evaluating the role of scratchpad memories in chip multiprocessors for sparse matrix computations. IPDPS Aditya Yanamandra, Bryan Cover, Padma Raghavan, Mary Jane Irwin, Mahmut T. Kandemir
2008	—	`conf`	Hierarchical Soft Error Estimation Tool (HSEET). ISQED Krishnan Ramakrishnan, R. Rajaraman, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin, Kenan Unlu
2008	A*	`conf`	Implementation and evaluation of a migration-based NUCA design for chip multiprocessors. SIGMETRICS Feihui Li, Mahmut T. Kandemir, Mary Jane Irwin
2008	A	`conf`	Integrated code and data placement in two-dimensional mesh based chip multiprocessors. ICCAD Taylan Yemliha, Shekhar Srikantaiah, Mahmut T. Kandemir, Mustafa Karaköy, Mary Jane Irwin
2008	A	`conf`	Managing power, performance and reliability trade-offs. IPDPS Padma Raghavan, Mahmut T. Kandemir, Mary Jane Irwin, Konrad Malkowski
2008	C	`conf`	Ring data location prediction scheme for Non-Uniform Cache Architectures. ICCD Sayaka Akioka, Feihui Li, Konrad Malkowski, Padma Raghavan, Mahmut T. Kandemir, Mary Jane Irwin
2008	J	`jnl`	Toward Increasing FPGA Lifetime. IEEE Trans. Dependable Secur. Comput. Suresh Srinivasan, Krishnan Ramakrishnan, Prasanth Mangalagiri, Yuan Xie, Vijaykrishnan Narayanan, Mary Jane Irwin, Karthik Sarpatwari
2007	Misc	`conf`	Architecting Microprocessor Components in 3D Design Space. VLSI Design Balaji Vaidyanathan, Wei-Lun Hung, Feng Wang, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin
2007	J	`jnl`	Evolving the ACM journal distribution program. Commun. ACM Ronald F. Boisvert, Mary Jane Irwin, Holly E. Rushmeier
2007	Misc	`conf`	Impact of NBTI on FPGAs. VLSI Design Krishnan Ramakrishnan, Sivaprakasam Suresh, Narayanan Vijaykrishnan, Mary Jane Irwin
2007	—	`conf`	Investigating Simple Low Latency Reliable Multiported Register Files. ISVLSI Andrew J. Ricketts, Madhu Mutyam, Narayanan Vijaykrishnan, Mary Jane Irwin
2007	J	`jnl`	Leakage-Aware Interconnect for On-Chip Network CoRR Yuh-Fang Tsai, Vijaykrishnan Narayanan, Yuan Xie, Mary Jane Irwin
2007	A	`conf`	Link Shutdown Opportunities During Collective Communications in 3-D Torus Nets. IPDPS S. Conner, Sayaka Akioka, Mary Jane Irwin, Padma Raghavan
2007	A	`conf`	Load Miss Prediction - Exploiting Power Performance Trade-offs. IPDPS Konrad Malkowski, Greg M. Link, Padma Raghavan, Mary Jane Irwin
2007	A	`conf`	Memory Optimizations For Fast Power-Aware Sparse Computations. IPDPS Konrad Malkowski, Padma Raghavan, Mary Jane Irwin
2007	J	`jnl`	On-chip bus thermal analysis and optimisation. IET Comput. Digit. Tech. Feng Wang, Michael DeBole, Xiaoxia Wu, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin
2007	J	`jnl`	Optimising power efficiency in trace cache fetch unit. IET Comput. Digit. Tech. Jie S. Hu, Narayanan Vijaykrishnan, Mary Jane Irwin, Mahmut T. Kandemir
2007	A	`conf`	Phase-aware adaptive hardware selection for power-efficient scientific computations. ISLPED Konrad Malkowski, Padma Raghavan, Mahmut T. Kandemir, Mary Jane Irwin
2007	J	`jnl`	Reducing non-deterministic loads in low-power caches via early cache set resolution. Microprocess. Microsystems Soontae Kim, Narayanan Vijaykrishnan, Mary Jane Irwin
2007	J	`jnl`	Reliability-aware Co-synthesis for Embedded Systems. J. VLSI Signal Process. Yuan Xie, Lin Li, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2007	B	`conf`	Ring Prediction for Non-Uniform Cache Architectures. PACT Sayaka Akioka, Feihui Li, Mahmut T. Kandemir, Padma Raghavan, Mary Jane Irwin
2007	J	`jnl`	Thermal-Aware Task Allocation and Scheduling for Embedded Systems CoRR Wei-Lun Hung, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2007	—	`conf`	Variation Analysis of CAM Cells. ISQED Amol Mupid, Madhu Mutyam, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin
2007	—	`conf`	Variation Impact on SER of Combinational Circuits. ISQED Krishnan Ramakrishnan, R. Rajaraman, Sivaprakasam Suresh, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin
2006	—	`conf`	A Parallel Architecture for Hardware Face Detection. ISVLSI Theo Theocharides, Narayanan Vijaykrishnan, Mary Jane Irwin
2006	A	`conf`	Activity clustering for leakage management in SPMs. DATE Mahmut T. Kandemir, Guangyu Chen, Feihui Li, Mary Jane Irwin, Ibrahim Kolcu
2006	J	`jnl`	An efficient architecture for motion estimation and compensation in the transform domain. IEEE Trans. Circuits Syst. Video Technol. Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne H. Wolf
2006	J	`jnl`	Block-based frequency scalable technique for efficient hierarchical coding. IEEE Trans. Signal Process. Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin, Rajarathnam Chandramouli
2006	Misc	`conf`	Characterizing the Performance and Energy Attributes of Scientific Simulations. International Conference on Computational Science (1) Sayaka Akioka, Konrad Malkowski, Padma Raghavan, Mary Jane Irwin, Lois C. McInnes, Boyana Norris
2006	B	`conf`	Compiler-directed thermal management for VLIW functional units. LCTES Madhu Mutyam, Feihui Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2006	A	`conf`	Conjugate gradient sparse solvers: performance-power characteristics. IPDPS Konrad Malkowski, Ingyu Lee, Padma Raghavan, Mary Jane Irwin
2006	A	`conf`	Enhancing L2 organization for CMPs with a center cell. IPDPS Chun Liu, Anand Sivasubramaniam, Mahmut T. Kandemir, Mary Jane Irwin
2006	—	`conf`	Interconnect and Thermal-aware Floorplanning for 3D Microprocessors. ISQED Wei-Lun Hung, Greg M. Link, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin
2006	J	`jnl`	Inverse discrete cosine transform architecture exploiting sparseness and symmetry properties. IEEE Trans. Circuits Syst. Video Technol. Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin
2006	—	`conf`	Multi-Level On-Chip Memory Hierarchy Design for Embedded Chip Multiprocessors. ICPADS (1) Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin, Suleyman Tosun
2006	—	`conf`	Object duplication for improving reliability. ASP-DAC Guilin Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2006	A	`conf`	On improving performance and energy profiles of sparse scientific applications. IPDPS Konrad Malkowski, Ingyu Lee, Padma Raghavan, Mary Jane Irwin
2006	A	`conf`	On-chip bus thermal analysis and optimization. DATE Feng Wang, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin
2006	J	`jnl`	Plagiarism on the rise. Commun. ACM Ronald F. Boisvert, Mary Jane Irwin
2006	A	`conf`	Poster reception - Energy/performance modeling for collective communication in 3-D torus cluster networks. SC S. Conner, Greg M. Link, S. Tobita, Mary Jane Irwin, Padma Raghavan
2006	A	`conf`	Poster reception - Toward a power efficient computer architecture for Barnes-Hut N-body simulations. SC Konrad Malkowski, Padma Raghavan, Mary Jane Irwin
2006	A	`conf`	Priority scheduling in digital microfluidics-based biochips. DATE Andrew J. Ricketts, Kevin M. Irick, Narayanan Vijaykrishnan, Mary Jane Irwin
2006	B	`ed.`	Proceedings of the 2006 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'06), Ottawa, Ontario, Canada, June 14-16, 2006 LCTES Mary Jane Irwin, Koen De Bosschere
2006	A*	`conf`	Reducing NoC energy consumption through compiler-directed channel voltage scaling. PLDI Guangyu Chen, Feihui Li, Mahmut T. Kandemir, Mary Jane Irwin
2006	J	`jnl`	Reducing code size through address register assignment. ACM Trans. Embed. Comput. Syst. Guilin Chen, Mahmut T. Kandemir, Mary Jane Irwin, J. Ramanujam
2006	J	`jnl`	Reducing dynamic and leakage energy in VLIW architectures. ACM Trans. Embed. Comput. Syst. Wei Zhang, Yuh-Fang Tsai, David Duarte, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2006	Misc	`conf`	SEAT-LA: A Soft Error Analysis Tool for Combinational Logic. VLSI Design R. Rajaraman, Jungsub Kim, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin
2005	J	`jnl`	A Holistic Approach to Designing Energy-Efficient Cluster Interconnects. IEEE Trans. Computers Eun Jung Kim, Greg M. Link, Ki Hwan Yum, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Chita R. Das
2005	Misc	`conf`	A Nanosensor Array-Based VLSI Gas Discriminator. VLSI Design Kevin M. Irick, Wei Xu, Narayanan Vijaykrishnan, Mary Jane Irwin
2005	A	`conf`	Adaptive Software for Scientific Computing: Co-Managing Quality-Performance-Power Tradeoffs. IPDPS Padma Raghavan, Mary Jane Irwin, Lois C. McInnes, Boyana Norris
2005	J	`jnl`	An integer linear programming-based tool for wireless sensor networks. J. Parallel Distributed Comput. Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2005	J	`jnl`	Analysis of Error Recovery Schemes for Networks on Chips. IEEE Des. Test Comput. Srinivasan Murali, Theo Theocharides, Narayanan Vijaykrishnan, Mary Jane Irwin, Luca Benini, Giovanni De Micheli
2005	J	`jnl`	Analyzing data reuse for cache reconfiguration. ACM Trans. Embed. Comput. Syst. Jie S. Hu, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2005	A	`conf`	BB-GC: Basic-Block Level Garbage Collection. DATE Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin
2005	A	`conf`	Compiler-Directed Instruction Duplication for Soft Error Detection. DATE Jie S. Hu, Feihui Li, Vijay Degalahal, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2005	J	`jnl`	Compiler-directed high-level energy estimation and optimization. ACM Trans. Embed. Comput. Syst. Ismail Kadayif, Mahmut T. Kandemir, Guilin Chen, Narayanan Vijaykrishnan, Mary Jane Irwin, Anand Sivasubramaniam
2005	Misc	`conf`	Compiler-directed proactive power management for networks. CASES Feihui Li, Guangyu Chen, Mahmut T. Kandemir, Mary Jane Irwin
2005	—	`conf`	Compiler-directed selective data protection against soft errors. ASP-DAC G. Chen, Mahmut T. Kandemir, Mary Jane Irwin, Gokhan Memik
2005	J	`jnl`	Compiler-guided leakage optimization for banked scratch-pad memories. IEEE Trans. Very Large Scale Integr. Syst. Mahmut T. Kandemir, Mary Jane Irwin, Guangyu Chen, Ibrahim Kolcu
2005	—	`conf`	Customized on-chip memories for embedded chip multiprocessors. ASP-DAC Ozcan Ozturk, Mahmut T. Kandemir, G. Chen, Mary Jane Irwin, Mustafa Karaköy
2005	—	`conf`	Designing reliable circuit in the presence of soft errors. ASP-DAC Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin
2005	J	`jnl`	Editorial. ACM J. Emerg. Technol. Comput. Syst. Mary Jane Irwin, Narayanan Vijaykrishnan
2005	A	`conf`	Exploiting Barriers to Optimize Power Consumption of CMPs. IPDPS Chun Liu, Anand Sivasubramaniam, Mahmut T. Kandemir, Mary Jane Irwin
2005	B	`conf`	Exploiting frequent field values in java objects for reducing heap memory requirements. VEE Guangyu Chen, Mahmut T. Kandemir, Mary Jane Irwin
2005	A*	`conf`	Exploring technology alternatives for nano-scale FPGA interconnects. DAC Aman Gayasen, Narayanan Vijaykrishnan, Mary Jane Irwin
2005	—	`conf`	High Performance Array Processor for Video Decoding. ISVLSI Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin
2005	Misc	`conf`	Implementing LDPC Decoding on Network-on-Chip. VLSI Design Theo Theocharides, Greg M. Link, Narayanan Vijaykrishnan, Mary Jane Irwin
2005	Misc	`conf`	Increasing on-chip memory space utilization for embedded chip multiprocessors through data compression. CODES+ISSS Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin
2005	Misc	`conf`	Influence of Leakage Reduction Techniques on Delay/Leakage Uncertainty. VLSI Design Yuh-Fang Tsai, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin
2005	A	`conf`	Leakage-Aware Interconnect for On-Chip Network. DATE Yuh-Fang Tsai, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin
2005	J	`jnl`	Networks on Chip (NoC): Interconnects of Next Generation Systems on Chip. Adv. Comput. Theocharis Theocharides, Greg M. Link, Narayanan Vijaykrishnan, Mary Jane Irwin
2005	—	`conf`	On-Chip Memory Management for Embedded MpSoC Architectures Based on Data Compression. SoCC Özcan Özturk, Mahmut T. Kandemir, Mary Jane Irwin, Suleyman Tosun
2005	A	`conf`	Optimizing sensor movement planning for energy efficiency. ISLPED Guiling Wang, Mary Jane Irwin, Piotr Berman, Haoying Fu, Thomas F. La Porta
2005	J	`jnl`	Soft errors issues in low-power caches. IEEE Trans. Very Large Scale Integr. Syst. Vijay Degalahal, Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2005	J	`jnl`	Symmetric encryption in reconfigurable and custom hardware. Int. J. Embed. Syst. Eric J. Swankoski, Narayanan Vijaykrishnan, Richard R. Brooks, Mahmut T. Kandemir, Mary Jane Irwin
2005	—	`conf`	Thermal-Aware Floorplanning Using Genetic Algorithms. ISQED Wei-Lun Hung, Yuan Xie, Narayanan Vijaykrishnan, Charles Addo-Quaye, Theo Theocharides, Mary Jane Irwin
2005	A	`conf`	Thermal-Aware Task Allocation and Scheduling for Embedded Systems. DATE Wei-Lun Hung, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2005	C	`conf`	Three-Dimensional Cache Design Exploration Using 3DCacti. ICCD Yuh-Fang Tsai, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin
2005	—	`conf`	Using data compression in an MPSoC architecture for improving performance. ACM Great Lakes Symposium on VLSI Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin
2004	A	`conf`	A Crosstalk Aware Interconnect with Variable Cycle Transmission. DATE Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2004	B	`conf`	A Dual-V FPL Aman Gayasen, K. Lee, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Tim Tuan
2004	A	`conf`	A Parallel Architecture for Secure FPGA Symmetric Encryption. IPDPS Eric J. Swankoski, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2004	J	`jnl`	A compiler-based approach for dynamically managing scratch-pad memories in embedded systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Mahmut T. Kandemir, J. Ramanujam, Mary Jane Irwin, Narayanan Vijaykrishnan, Ismail Kadayif, Amisha Parikh
2004	—	`conf`	A generic reconfigurable neural network architecture as a network on chip. SoCC Theocharis Theocharides, Greg M. Link, Narayanan Vijaykrishnan, Mary Jane Irwin, Vamsi Srikantam
2004	Misc	`conf`	An Architecture for Motion Estimation in the Transform Domain. VLSI Design Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne H. Wolf
2004	Misc	`conf`	Analyzing heap error behavior in embedded JVM environments. CODES+ISSS Guilin Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Anand Sivasubramaniam, Mary Jane Irwin
2004	A	`conf`	Analyzing software influences on substrate noise: an ADC perspective. ICCAD Frank Ghenassia, Narayanan Vijaykrishnan, Mary Jane Irwin
2004	A	`conf`	Banked scratch-pad memory management for reducing leakage energy consumption. ICCAD Mahmut T. Kandemir, Mary Jane Irwin, Guilin Chen, Ibrahim Kolcu
2004	J	`jnl`	Characterization and modeling of run-time techniques for leakage power reduction. IEEE Trans. Very Large Scale Integr. Syst. Yuh-Fang Tsai, D. E. Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin
2004	—	`conf`	ChipPower: an architecture-level leakage simulator. SoCC Yuh-Fang Tsai, Ananth Hegde Ankadi, Narayanan Vijaykrishnan, Mary Jane Irwin, Theocharis Theocharides
2004	B	`conf`	Code protection for resource-constrained embedded devices. LCTES Hendra Saputra, Guangyu Chen, Richard R. Brooks, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2004	A*	`conf`	Data compression for improving SPM behavior. DAC Ozcan Ozturk, Mahmut T. Kandemir, I. Demirkiran, Guangyu Chen, Mary Jane Irwin
2004	—	`conf`	Design of a nanosensor array architecture. ACM Great Lakes Symposium on VLSI Wei Xu, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin
2004	Misc	`conf`	Designing Leakage Aware Multipliers. VLSI Design M. DeRenzo, Mary Jane Irwin, Narayanan Vijaykrishnan
2004	—	`conf`	Efficient VLSI implementation of inverse discrete cosine transform [image coding applications]. ICASSP (5) Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin
2004	Misc	`conf`	Embedded Hardware Face Detection. VLSI Design Theo Theocharides, Greg M. Link, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne H. Wolf
2004	—	`conf`	Evaluating Alternative Implementations for LDPC Decoder Check Node Function. ISVLSI Theo Theocharides, Greg M. Link, Eric J. Swankoski, Narayanan Vijaykrishnan, Mary Jane Irwin, Herman Schmit
2004	A*	`conf`	Exploring Wakeup-Free Instruction Scheduling. HPCA Jie S. Hu, Narayanan Vijaykrishnan, Mary Jane Irwin
2004	—	`conf`	Exploring the Possibility of Operating in the Compressed Domain. Euro-Par Victor De La Luz, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin
2004	—	`conf`	Fault Tolerant Algorithms for Network-On-Chip Interconnect. ISVLSI Matthew Pirretti, Greg M. Link, Richard R. Brooks, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2004	C	`conf`	Field level analysis for heap space optimization in embedded java environments. ISMM Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2004	A	`conf`	Improving soft-error tolerance of FPGA configuration bits. ICCAD Suresh Srinivasan, Aman Gayasen, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Yuan Xie, Mary Jane Irwin
2004	J	`jnl`	Instruction Scheduling for Low Power. J. VLSI Signal Process. Amisha Parikh, Soontae Kim, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2004	J	`jnl`	Optimizing Leakage Energy Consumption in Cache Bitlines. Des. Autom. Embed. Syst. Soontae Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2004	—	`conf`	Power-efficient implementation of turbo decoder in SDR system. SoCC Byung-Tae Kang, Narayanan Vijaykrishnan, Mary Jane Irwin, Theocharis Theocharides
2004	Misc	`ed.`	Proceedings of the 2004 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2004, Washington DC, USA, September 22 - 25, 2004 CASES Mary Jane Irwin, Wei Zhao, Luciano Lavagno, Scott A. Mahlke
2004	—	`ch.`	Reducing Energy Consumption in Chip Multiprocessors Using Workload Variations. Ultra Low-Power Electronics and Design Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Ibrahim Kolcu
2004	J	`jnl`	Reducing instruction cache energy consumption using a compiler-based strategy. ACM Trans. Archit. Code Optim. Wei Zhang, Jie S. Hu, Vijay Degalahal, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2004	A	`conf`	Reducing leakage energy in FPGAs using region-constrained placement. FPGA Aman Gayasen, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Tim Tuan
2004	—	`conf`	Reliability-Aware Co-Synthesis for Embedded Systems. ASAP Yuan Xie, Lin Li, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2004	A	`conf`	Scheduling Reusable Instructions for Power Reduction. DATE Jie S. Hu, Narayanan Vijaykrishnan, Soontae Kim, Mahmut T. Kandemir, Mary Jane Irwin
2004	A	`conf`	Soft error and energy consumption interactions: a data cache perspective. ISLPED Lin Li, Vijay Degalahal, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2004	J	`jnl`	Studying Energy Trade Offs in Offloading Computation/Compilation in Java-Enabled Mobile Devices. IEEE Trans. Parallel Distributed Syst. Guangyu Chen, Byung-Tae Kang, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Rajarathnam Chandramouli
2004	—	`conf`	The Effect of Threshold Voltages on the Soft Error Rate. ISQED Vijay Degalahal, Rajaraman Ramanarayanan, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin
2004	C	`conf`	Thermal-Aware IP Virtualization and Placement for Networks-on-Chip Architecture. ICCD Wei-Lun Hung, Charles Addo-Quaye, Theo Theocharides, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin
2004	—	`conf`	Tuning data replication for improving behavior of MPSoC applications. ACM Great Lakes Symposium on VLSI Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin, Ibrahim Kolcu
2004	—	`conf`	Using Data Compression to Increase Energy Savings in Multi-bank Memories. Euro-Par Mahmut T. Kandemir, Ozcan Ozturk, Mary Jane Irwin, Ibrahim Kolcu
2003	A	`conf`	Adapative Error Protection for Energy Efficiency. ICCAD Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2003	B	`conf`	Adapting instruction level parallelism for optimizing leakage in VLIW architectures. LCTES Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2003	B	`conf`	Address Register Assignment for Reducing Code Size. CC Mahmut T. Kandemir, Mary Jane Irwin, Guilin Chen, J. Ramanujam
2003	Misc	`conf`	Analyzing Soft Errors in Leakage Optimized SRAM Design. VLSI Design Vijay Degalahal, Narayanan Vijaykrishnan, Mary Jane Irwin
2003	C	`conf`	CCC: Crossbar Connected Caches for Reducing Energy Consumption of On-Chip Multiprocessors. DSD Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Ismail Kadayif
2003	A	`conf`	Compiler Support for Reducing Leakage Energy Consumption. DATE Wei Zhang, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Vivek De
2003	A	`conf`	Computation and transmission energy modeling through profiling for MPEG4 video transmission. ICME Amol Bhatkar, Rajarathnam Chandramouli, Narayanan Vijaykrishnan, Mary Jane Irwin
2003	—	`conf`	Effect of Power Optimizations on Soft Error Rate. VLSI-SoC (Selected Papers) Vijay Degalahal, Rajaraman Ramanarayanan, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin
2003	A	`conf`	Energy and Performance Considerations in Work Partitioning for Mobile Spatial Queries. IPDPS Sudhanva Gurumurthi, Ning An, Anand Sivasubramaniam, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2003	A	`conf`	Energy optimization techniques in cluster interconnects. ISLPED Eun Jung Kim, Ki Hwan Yum, Greg M. Link, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Mazin S. Yousif, Chita R. Das
2003	A	`conf`	Energy-Aware Compilation and Execution in Java-Enabled Mobile Devices. IPDPS Guilin Chen, Byung-Tae Kang, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Rajarathnam Chandramouli
2003	A	`conf`	Estimating influence of data layout optimizations on SDRAM energy consumption. ISLPED Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Erik Brockmeyer, Francky Catthoor, Mary Jane Irwin
2003	J	`jnl`	Evaluating Integrated Hardware-Software Optimizations Using a Unified Energy Estimation Framework. IEEE Trans. Computers Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Hyun Suk Kim, Wu Ye, David Duarte
2003	Misc	`conf`	Exploiting bank locality in multi-bank memories. CASES Guilin Chen, Mahmut T. Kandemir, Hendra Saputra, Mary Jane Irwin
2003	A	`conf`	Exploiting program hotspots and code sequentiality for instruction cache leakage management. ISLPED Jie S. Hu, A. Nadgir, Narayanan Vijaykrishnan, Mary Jane Irwin, Mahmut T. Kandemir
2003	A	`conf`	Heap compression for memory-constrained Java environments. OOPSLA Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Bernd Mathiske, Mario Wolczko
2003	A*	`conf`	Implications of technology scaling on leakage reduction techniques. DAC Yuh-Fang Tsai, David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin
2003	B	`conf`	Interplay of energy and performance for disk arrays running transaction processing workloads. ISPASS Sudhanva Gurumurthi, Jianyong Zhang, Anand Sivasubramaniam, Mahmut T. Kandemir, Hubertus Franke, Narayanan Vijaykrishnan, Mary Jane Irwin
2003	J	`jnl`	Leakage Current: Moore's Law Meets Static Power. Computer Nam Sung Kim, Todd M. Austin, David T. Blaauw, Trevor N. Mudge, Krisztián Flautner, Jie S. Hu, Mary Jane Irwin, Mahmut T. Kandemir, Narayanan Vijaykrishnan
2003	J	`jnl`	Managing Leakage Energy in Cache Hierarchies. J. Instr. Level Parallelism Lin Li, Ismail Kadayif, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Anand Sivasubramaniam
2003	A	`conf`	Masking the Energy Behavior of DES Encryption. DATE Hendra Saputra, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Richard R. Brooks, Soontae Kim, Wei Zhang
2003	A	`conf`	On load latency in low-power caches. ISLPED Soontae Kim, Narayanan Vijaykrishnan, Mary Jane Irwin, Lizy Kurian John
2003	J	`jnl`	Partitioned instruction cache architecture for energy efficiency. ACM Trans. Embed. Comput. Syst. Soontae Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin
2003	Misc	`conf`	Performance, energy, and reliability tradeoffs in replicating hot cache lines. CASES Wei Zhang, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin
2003	J	`jnl`	Power-Aware Designers at Odds with Power Grid Designers? IEEE Des. Test Comput. Mary Jane Irwin
2003	C	`conf`	Reducing dTLB Energy Through Dynamic Resizing. ICCD Victor Delaluz, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin, Narayanan Vijaykrishnan
2003	Misc	`conf`	Tracking object life cycle for leakage energy optimization. CODES+ISSS Guangyu Chen, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Mario Wolczko
2003	—	`conf`	Using Dynamic Branch Behavior for Power-Efficient Instruction Fetch. ISVLSI Jie S. Hu, Narayanan Vijaykrishnan, Mary Jane Irwin, Mahmut T. Kandemir
2003	Misc	`conf`	VL-CDRAM: variable line sized cached DRAMs. CODES+ISSS Ananth Hegde, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2002	A	`conf`	A Complete Phase-Locked Loop Power Consumption Model. DATE David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin
2002	J	`jnl`	A clock power model to evaluate impact of architectural and technology optimizations. IEEE Trans. Very Large Scale Integr. Syst. D. E. Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin
2002	—	`conf`	Adaptive Garbage Collection for Battery-Operated Environments. Java Virtual Machine Research and Technology Symposium Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Mario Wolczko
2002	—	`conf`	Compiler-Directed Array Interleaving for Reducing Energy in Multi-Bank Memories. ASP-DAC/VLSI Design Victor Delaluz, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Anand Sivasubramaniam, Ibrahim Kolcu
2002	—	`conf`	Compiler-directed cache polymorphism. LCTES-SCOPES Jie S. Hu, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Hendra Saputra, Wei Zhang
2002	A*	`conf`	Compiler-directed instruction cache leakage optimization. MICRO Wei Zhang, Jie S. Hu, Vijay Degalahal, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2002	A	`conf`	Designing Energy-Efficient Software. IPDPS Anand Sivasubramaniam, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2002	A	`conf`	EAC: A Compiler Framework for High-Level Energy Estimation and Optimization. DATE Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Anand Sivasubramaniam
2002	—	`conf`	Energy savings through compression in embedded Java environments. CODES Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne H. Wolf
2002	—	`conf`	Energy-conscious compilation based on voltage scaling. LCTES-SCOPES Hendra Saputra, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Jie S. Hu, Chung-Hsing Hsu, Ulrich Kremer
2002	J	`jnl`	Energy-performance trade-offs for spatial access methods on memory-resident data. VLDB J. Ning An, Sudhanva Gurumurthi, Anand Sivasubramaniam, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2002	—	`conf`	Evaluating Run-Time Techniques for Leakage Power Reduction. ASP-DAC/VLSI Design David Duarte, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mary Jane Irwin
2002	—	`conf`	Hardware-Software Co-Adaptation for Data-Intensive Embedded Applications. ISVLSI Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2002	C	`conf`	Impact of Scaling on the Effectiveness of Dynamic Power Reduction Schemes. ICCD David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin, Hyun Suk Kim, Grant McFarland
2002	—	`conf`	Impact of Technology Scaling in the Clock System Power. ISVLSI David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin
2002	—	`conf`	Leakage Energy Management in Cache Hierarchies. IEEE PACT Lin Li, Ismail Kadayif, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Anand Sivasubramaniam
2002	Misc	`conf`	Power efficient adaptive M-QAM design using adaptive pipelined analog-to-digital converter. ICASSP Byung-Tae Kang, Vijaykrishnan Narayanan, Mary Jane Irwin, Rajarathnam Chandramouli
2002	A	`conf`	Power-Efficient Trace Caches. DATE Jie S. Hu, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2002	A	`ed.`	Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002, Monterey, California, USA, August 12-14, 2002 ISLPED Vivek De, Mary Jane Irwin, Ingrid Verbauwhede, Christian Piguet
2002	A*	`conf`	Scheduler-based DRAM energy management. DAC Victor Delaluz, Anand Sivasubramaniam, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2002	A*	`conf`	Tuning Garbage Collection in an Embedded Java Environment. HPCA Guangyu Chen, R. Shetty, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Mario Wolczko
2002	J	`jnl`	Tuning garbage collection for reducing memory system energy in an embedded java environment. ACM Trans. Embed. Comput. Syst. Guangyu Chen, R. Shetty, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Mario Wolczko
2002	A*	`conf`	Using Complete Machine Simulation for Software Power Estimation: The SoftWatt Approach. HPCA Sudhanva Gurumurthi, Anand Sivasubramaniam, Mary Jane Irwin, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Tao Li, Lizy Kurian John
2002	J	`jnl`	Using Memory Compression for Energy Reduction in an Embedded Java System. J. Circuits Syst. Comput. Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne H. Wolf
2001	C	`conf`	A Framework for Energy Estimation of VLIW Architecture. ICCD Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2001	A*	`conf`	Analyzing energy behavior of spatial access methods for memory-resident data. VLDB Ning An, Anand Sivasubramaniam, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Sudhanva Gurumurthi
2001	J	`jnl`	Architecture-level power estimation and design experiments. ACM Trans. Design Autom. Electr. Syst. Rita Yu Chen, Mary Jane Irwin, Raminder Singh Bajwa
2001	A*	`conf`	DRAM Energy Management Using Software and Hardware Directed Power Mode Control. HPCA Victor Delaluz, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Anand Sivasubramaniam, Mary Jane Irwin
2001	J	`jnl`	Design considerations for databus charge recovery. IEEE Trans. Very Large Scale Integr. Syst. Benjamin Bishop, V. Lyuboslavsky, Narayanan Vijaykrishnan, Mary Jane Irwin
2001	A*	`conf`	Dynamic Management of Scratch-Pad Memory Space. DAC Mahmut T. Kandemir, J. Ramanujam, Mary Jane Irwin, Narayanan Vijaykrishnan, Ismail Kadayif, Amisha Parikh
2001	—	`conf`	Energy Behavior of Java Applications from the Memory Perspective. Java Virtual Machine Research and Technology Symposium Narayanan Vijaykrishnan, Mahmut T. Kandemir, Soontae Kim, Samarjeet Singh Tomar, Anand Sivasubramaniam, Mary Jane Irwin
2001	Misc	`conf`	Energy-efficient instruction cache using page-based placement. CASES Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2001	A*	`conf`	Exploiting VLIW schedule slacks for dynamic and leakage energy reduction. MICRO Wei Zhang, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, David Duarte, Yuh-Fang Tsai
2001	Misc	`conf`	Formulation and Validation of an Energy Dissipation Model for the Clock Generation Circuitry and Distribution Networks. VLSI Design David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin, Mahmut T. Kandemir
2001	J	`jnl`	Hardware and Software Techniques for Controlling DRAM Power Modes. IEEE Trans. Computers Victor Delaluz, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Anand Sivasubramaniam, Mary Jane Irwin
2001	A	`conf`	Influence of Array Allocation Mechanisms on Memory System Energy. IPDPS R. Athavale, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2001	J	`jnl`	Influence of compiler optimizations on system power. IEEE Trans. Very Large Scale Integr. Syst. Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Wu Ye
2001	J	`jnl`	Investigating Memory System Energy Behavior Using Software and Hardware Optimizations. VLSI Design G. Esakkimuthu, Hyun Suk Kim, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2001	—	`conf`	Morphable Cache Architectures: Potential Benefits. LCTES/OM Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, J. Ramanujam
2001	—	`conf`	Morphable Cache Architectures: Potential Benefits. OM@PLDI Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Jagannathan Ramanujam
2001	A	`conf`	Power-aware partitioned cache architectures. ISLPED Soontae Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin, E. Geethanjali
2001	A	`ed.`	Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001, Huntington Beach, California, USA, 2001 ISLPED Enrico Macii, Vivek De, Mary Jane Irwin
2001	—	`conf`	SoC Design Skills: Collaboration Builds a Stronger SoC Design Team. MSE Pradeep K. Khosla, Herman Schmit, Mary Jane Irwin, Narayanan Vijaykrishnan, Tom Cain, Steven P. Levitan, Dave Landis
2001	C	`conf`	Use of Local Memory for Efficient Java Execution. ICCD Samarjeet Singh Tomar, Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2001	—	`conf`	vEC: virtual energy counters. PASTE Ismail Kadayif, T. Chinoda, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Anand Sivasubramaniam
2000	—	`conf`	A Holistic Approach to System Level Energy Optimization. PATMOS Mary Jane Irwin, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Anand Sivasubramaniam
2000	—	`conf`	A comparative study of power efficient SRAM designs. ACM Great Lakes Symposium on VLSI Jeyran Hezavei, Narayanan Vijaykrishnan, Mary Jane Irwin
2000	J	`jnl`	Editorial. ACM Trans. Design Autom. Electr. Syst. Mary Jane Irwin
2000	Misc	`conf`	Energy-Aware Instruction Scheduling. HiPC Amisha Parikh, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2000	A*	`conf`	Energy-driven integrated hardware-software optimizations using SimplePower. ISCA Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Hyun Suk Kim, Wu Ye
2000	Misc	`conf`	Energy-oriented compiler optimizations for partitioned memory architectures. CASES Victor Delaluz, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2000	—	`conf`	Experimental Evaluation of Energy Behavior of Iteration Space Tiling. LCPC Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Hyun Suk Kim
2000	A	`conf`	Hardware/Software Co-design for Real-Time Physical Modeling. IEEE International Conference on Multimedia and Expo (III) Benjamin Bishop, Thomas P. Kelliher, Mary Jane Irwin
2000	A*	`conf`	Influence of compiler optimizations on system power. DAC Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Wu Ye
2000	A	`conf`	Memory system energy (poster session): influence of hardware-software optimizations. ISLPED G. Esakkimuthu, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2000	—	`conf`	SPARTA: Simulation of Physics on a Real-Time Architecture. ACM Great Lakes Symposium on VLSI Benjamin Bishop, Thomas P. Kelliher, Mary Jane Irwin
2000	A*	`conf`	The design and use of simplepower: a cycle-accurate energy estimation tool. DAC Wu Ye, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2000	J	`jnl`	The design of the MGAP-2: a micro-grained massively parallel array. IEEE Trans. Very Large Scale Integr. Syst. Eric Gayles, Thomas P. Kelliher, Robert Michael Owens, Mary Jane Irwin
2000	B	`conf`	Towards Energy-Aware Iteration Space Tiling. LCTES Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Hyun Suk Kim
1999	J	`jnl`	A Fast and Simple Steiner Routing Heuristic. Discret. Appl. Math. Manjit Borah, Robert Michael Owens, Mary Jane Irwin
1999	J	`jnl`	Aggressive Dynamic Execution of Decoded Traces. J. VLSI Signal Process. Benjamin Bishop, Thomas P. Kelliher, Robert Michael Owens, Mary Jane Irwin
1999	A	`conf`	Databus charge recovery: practical considerations. ISLPED Benjamin Bishop, Mary Jane Irwin
1999	A*	`ed.`	Proceedings of the 36th Conference on Design Automation, New Orleans, LA, USA, June 21-25, 1999. DAC Mary Jane Irwin
1999	—	`conf`	The Design of a Register Renaming Unit. Great Lakes Symposium on VLSI Benjamin Bishop, Thomas P. Kelliher, Mary Jane Irwin
1998	J	`jnl`	A Parallel ASIC Architecture for Efficient Fractal Image Coding. J. VLSI Signal Process. Kevin P. Acken, Mary Jane Irwin, Robert Michael Owens
1998	—	`conf`	Aggressive Dynamic Execution of Multimedia Kernel Traces. IPPS/SPDP Benjamin Bishop, Robert Michael Owens, Mary Jane Irwin
1998	J	`jnl`	Editorial Message. J. VLSI Signal Process. Mary Jane Irwin, Sun-Yuan Kung, Earl E. Swartzlander Jr.
1998	Misc	`conf`	Number representations for reducing switched capacitance in subband coding. ICASSP John R. Sacha, Mary Jane Irwin
1998	A	`conf`	The logarithmic number system for strength reduction in adaptive filtering. ISLPED John R. Sacha, Mary Jane Irwin
1998	A*	`conf`	Validation of an Architectural Level Power Analysis Technique. DAC Rita Yu Chen, Robert Michael Owens, Mary Jane Irwin, Raminder Singh Bajwa
1997	—	`conf`	A Clocked, Static Circuit Technique for Building Efficient High Frequency Pipelines. Great Lakes Symposium on VLSI Eric Gayles, Kevin P. Acken, Robert Michael Owens, Mary Jane Irwin
1997	Misc	`conf`	A Simulation Methodology for Software Energy Evaluation. VLSI Design Huzefa Mehta, Robert Michael Owens, Mary Jane Irwin
1997	J	`jnl`	A fast algorithm for minimizing the Elmore delay to identified critical sinks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Manjit Borah, Robert Michael Owens, Mary Jane Irwin
1997	A	`conf`	An extended addressing mode for low power. ISLPED Atul Kalambur, Mary Jane Irwin
1997	Misc	`conf`	Mixed-autonomy local interconnect for reconfigurable SIMD arrays. HiPC Raminder Singh Bajwa, Robert Michael Owens, Mary Jane Irwin
1997	J	`jnl`	Motion Analysis on the Micro Grained Array Processor. Real Time Imaging Heung-Nam Kim, Mary Jane Irwin, Robert Michael Owens
1997	J	`jnl`	Power-Area Trade-Offs in Divided Word Line Memory Arrays. J. Circuits Syst. Comput. Meng-Fan Chang, Mary Jane Irwin, Robert Michael Owens
1997	A	`conf`	Techniques for low energy software. ISLPED Huzefa Mehta, Robert Michael Owens, Mary Jane Irwin, Rita Yu Chen, Debashree Ghosh
1997	—	`conf`	The MGAP Family of Processor Arrays. Great Lakes Symposium on VLSI Kevin P. Acken, Eric Gayles, Thomas P. Kelliher, Robert Michael Owens, Mary Jane Irwin
1996	—	`conf`	An Architectural Design For Parallel Fractal Compression. ASAP Kevin P. Acken, Heung-Nam Kim, Mary Jane Irwin, Robert Michael Owens
1996	J	`jnl`	An optimal time multiplication free algorithm for edge detection on a mesh. J. VLSI Signal Process. Manjit Borah, Chetana Nagendra, Mohan Vishwanath, Robert Michael Owens, Mary Jane Irwin
1996	—	`conf`	Architectural Optimizations For A Floating Point Multiply-Accumulate Unit In A Graphics Pipeline. ASAP Kevin P. Acken, Mary Jane Irwin, Robert Michael Owens, Amulya K. Garga
1996	Misc	`conf`	Design tradeoffs in CMOS FIR filters. ICASSP Chetana Nagendra, Mary Jane Irwin
1996	Misc	`conf`	Design tradeoffs in high speed multipliers and FIR filters. VLSI Design Chetana Nagendra, Robert Michael Owens, Mary Jane Irwin
1996	A*	`conf`	Energy Characterization based on Clustering. DAC Huzefa Mehta, Robert Michael Owens, Mary Jane Irwin
1996	Misc	`conf`	Instruction level power profiling. ICASSP Huzefa Mehta, Robert Michael Owens, Mary Jane Irwin
1996	A	`conf`	Power comparisons for barrel shifters. ISLPED Kevin P. Acken, Mary Jane Irwin, Robert Michael Owens
1996	—	`conf`	Recent Developments in Performance Driven Steiner Routing: An Overview. Great Lakes Symposium on VLSI Manjit Borah, Robert Michael Owens, Mary Jane Irwin
1996	—	`conf`	Some Issues in Gray Code Addressing. Great Lakes Symposium on VLSI Huzefa Mehta, Robert Michael Owens, Mary Jane Irwin
1996	J	`jnl`	Transistor sizing for low power CMOS circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Manjit Borah, Robert Michael Owens, Mary Jane Irwin
1995	—	`conf`	A simulation methodology for evaluating parallel computers. SPDP Paul Keltcher, Robert Michael Owens, Mary Jane Irwin
1995	A*	`conf`	Accurate Estimation of Combinational Circuit Activity. DAC Huzefa Mehta, Manjit Borah, Robert Michael Owens, Mary Jane Irwin
1995	J	`jnl`	Digit pipelined arithmetic on fine-grain array processors. J. VLSI Signal Process. Chetana Nagendra, Robert Michael Owens, Mary Jane Irwin
1995	—	`conf`	Fast algorithm for performance-oriented Steiner routing. Great Lakes Symposium on VLSI Manjit Borah, Robert Michael Owens, Mary Jane Irwin
1995	—	`conf`	High-throughput and low-power DSP using clocked-CMOS circuitry. ISLPD Manjit Borah, Robert Michael Owens, Mary Jane Irwin
1995	Misc	`conf`	Minimizing power consumption of static CMOS circuits by transistor sizing and input reordering. VLSI Design Manjit Borah, Mary Jane Irwin, Robert Michael Owens
1995	—	`conf`	Motion Estimation Algorithms on Fine Grain Array Processor. ASAP Heung-Nam Kim, Mary Jane Irwin, Robert Michael Owens
1995	C	`conf`	Reducing the number of counters needed for integer multiplication. IEEE Symposium on Computer Arithmetic Robert Michael Owens, Raminder Singh Bajwa, Mary Jane Irwin
1995	—	`conf`	The MGAP's programming environment and the *C++ language. ASAP Raminder Singh Bajwa, Robert Michael Owens, Mary Jane Irwin
1995	Misc	`conf`	The MGAP-2: an advanced, massively parallel VLSI signal processor. ICASSP Thomas P. Kelliher, Eric Gayles, Robert Michael Owens, Mary Jane Irwin
1995	—	`conf`	Transistor sizing for minimizing power consumption of CMOS circuits under delay constraint. ISLPD Manjit Borah, Robert Michael Owens, Mary Jane Irwin
1995	—	`conf`	Unifying carry-sum and signed-digital number representations for low power. ISLPD Chetana Nagendra, Robert Michael Owens, Mary Jane Irwin
1994	—	`conf`	A SIMD solution to the sequence comparison problem on the MGAP. ASAP Manjit Borah, Raminder Singh Bajwa, Sridhar Hannenhalli, Mary Jane Irwin
1994	J	`jnl`	An edge-based heuristic for Steiner routing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Manjit Borah, Robert Michael Owens, Mary Jane Irwin
1994	J	`jnl`	Area Time Trade-Offs in Micro-Grain VLSI Array Architectures. IEEE Trans. Computers Raminder Singh Bajwa, Robert Michael Owens, Mary Jane Irwin
1994	—	`conf`	Digit pipelined discrete wavelet transform. ICASSP (2) Chetana Nagendra, Mary Jane Irwin, Robert Michael Owens
1994	—	`conf`	Dynamic Space Warping Algorithms on Fine-Graln Array Processors. IPPS Heung-Nam Kim, Mary Jane Irwin, Robert Michael Owens, Chen-Mi Wu
1994	—	`conf`	FPGA-based synthesis of FSMs through decomposition. Great Lakes Symposium on VLSI Wen-Lin Yang, Robert Michael Owens, Mary Jane Irwin
1994	J	`jnl`	Logic synthesis for field-programmable gate arrays. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. TingTing Hwang, Robert Michael Owens, Mary Jane Irwin, Kuo-Hua Wang
1994	J	`jnl`	Polynomial Time Testability of Circuits Generated by Input Decomposition. IEEE Trans. Computers Gueesang Lee, Mary Jane Irwin, Robert Michael Owens
1994	J	`jnl`	Power-delay characteristics of CMOS adders. IEEE Trans. Very Large Scale Integr. Syst. Chetana Nagendra, Robert Michael Owens, Mary Jane Irwin
1994	—	`conf`	Rapid prototyping with programmable control paths. ASAP Raminder Singh Bajwa, Chetana N. Keltcher, Paul Keltcher, Mary Jane Irwin
1994	—	`conf`	The MGAP: A High Performance, User Programmable, Multifunctional Architecture for DS. HICSS (1) Manjit Borah, Chetana Nagendra, Robert Michael Owens, Mary Jane Irwin
1993	C	`ed.`	11th Symposium on Computer Arithmetic, 29 June - 2 July 1993, Windsor, Canada, Proceedings. IEEE Symposium on Computer Arithmetic Earl E. Swartzlander Jr., Mary Jane Irwin, Graham A. Jullien
1993	Misc	`conf`	A Massively Parallel, Micro-Grained VLSI Architecture. VLSI Design Raminder Singh Bajwa, Robert Michael Owens, Mary Jane Irwin
1993	—	`conf`	A new blocked IIR algorithm. ICASSP (3) Chen-Mi Wu, Mohan Vishwanath, Robert Michael Owens, Mary Jane Irwin
1993	—	`conf`	A new optimization driven clustering algorithm for large circuits. EURO-DAC Cheng-Liang Ding, Ching-Yen Ho, Mary Jane Irwin
1993	—	`conf`	A systolic VLSI architecture for multi-dimensional transforms. ICASSP (1) Thomas P. Kelliher, Mary Jane Irwin
1993	—	`conf`	Digit systolic algorithms for fine-grain architectures. ASAP Chetana Nagendra, Robert Michael Owens, Mary Jane Irwin
1993	—	`conf`	Edge detection using fine-grained parallelism in VLSI. ICASSP (1) Chetana Nagendra, Manjit Borah, Mohan Vishwanath, Robert Michael Owens, Mary Jane Irwin
1993	—	`conf`	Image Processing with the MGAP: A Cost Effective Solution. IPPS Raminder Singh Bajwa, Robert Michael Owens, Mary Jane Irwin
1993	—	`conf`	Multi-way FSM decomposition based on interconnect complexity. EURO-DAC Wen-Lin Yang, Robert Michael Owens, Mary Jane Irwin
1993	J	`jnl`	The design and implementation of the Arithmetic Cube II, a VLSI signal processing system. IEEE Trans. Very Large Scale Integr. Syst. Robert Michael Owens, Thomas P. Kelliher, Mary Jane Irwin, Mohan Vishwanath, Raminder Singh Bajwa, Wen-Lin Yang
1992	Misc	`conf`	A micro-grained VLSI signal processor. ICASSP Mary Jane Irwin, Robert Michael Owens
1992	—	`conf`	Discrete wavelet transforms in VLSI. ASAP Mohan Vishwanath, Robert Michael Owens, Mary Jane Irwin
1992	Misc	`conf`	ECube: An Efficient Architecture for Analyzing Time-Varying Spectra. VLSI Design Mohan Vishwanath, Robert Michael Owens, Mary Jane Irwin
1992	J	`jnl`	ELM-A Fast Addition Algorithm Discovered by a Program. IEEE Trans. Computers Thomas P. Kelliher, Robert Michael Owens, Mary Jane Irwin, TingTing Hwang
1992	J	`jnl`	Efficiently computing communication complexity for multilevel logic synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. TingTing Hwang, Robert Michael Owens, Mary Jane Irwin
1992	A*	`conf`	Experiments with a Performance Driven Module Generator. DAC Soohong Kim, Robert Michael Owens, Mary Jane Irwin
1992	—	`conf`	Implementing a family of high performance, micrograined architectures. ASAP Robert Michael Owens, Mary Jane Irwin, Thomas P. Kelliher, Mohan Vishwanath, Raminder Singh Bajwa
1992	J	`jnl`	Intermediate-level vision tasks on a memory array architecture. Mach. Vis. Appl. Poras T. Balsara, Mary Jane Irwin
1992	—	`conf`	PERFLEX: a performance driven module generator. EURO-DAC Soohong Kim, Robert Michael Owens, Mary Jane Irwin
1991	J	`jnl`	A Two-Dimensional, Distributed Logic Architecture. IEEE Trans. Computers Mary Jane Irwin, Robert Michael Owens
1991	J	`jnl`	Digit Serial Multipliers. J. Parallel Distributed Comput. Poras T. Balsara, Robert Michael Owens, Mary Jane Irwin
1991	J	`jnl`	Image processing on a memory array architecture. J. VLSI Signal Process. Poras T. Balsara, Mary Jane Irwin
1991	—	`conf`	The Arithmetic Cube: error analysis and simulation. ASAP Mohan Vishwanath, Robert Michael Owens, Mary Jane Irwin
1991	Misc	`conf`	The arithmetic cube II: a second generation VLSI DSP processor. ICASSP Mary Jane Irwin, Robert Michael Owens, Thomas P. Kelliher, Kin-Ki Leung, Mohan Vishwanath
1990	J	`jnl`	A case for digit serial VLSI signal processors. J. VLSI Signal Process. Mary Jane Irwin, Robert Michael Owens
1990	Misc	`conf`	A two-dimensional, distributed logic processor for machine vision. ICASSP Mary Jane Irwin, Robert Michael Owens
1990	C	`conf`	An integrated, multi-level synthesis system. RSP Barry M. Pangrle, Pao-Po Hou, Robert Michael Owens, Mary Jane Irwin
1990	J	`jnl`	Being Stingy with Multipliers. IEEE Trans. Computers Robert Michael Owens, Mary Jane Irwin
1990	Misc	`conf`	Distortion processing in image matching problems. ICASSP Chen-Mi Wu, Robert Michael Owens, Mary Jane Irwin
1990	J	`jnl`	Exploiting communication complexity for multilevel logic synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. TingTing Hwang, Robert Michael Owens, Mary Jane Irwin
1990	C	`conf`	Logic synthesis for programmable logic devices. ICCD TingTing Hwang, Robert Michael Owens, Mary Jane Irwin
1990	—	`conf`	Mapping high-dimension wavefront computations to silicon. ASAP Chen-Mie Wu, Robert Michael Owens, Mary Jane Irwin
1990	C	`conf`	Test generation in circuits constructed by input decomposition. ICCD Gueesang Lee, Mary Jane Irwin, Robert Michael Owens
1989	A*	`conf`	A Comparison of Four Two-dimensional Gate Matrix Layout Tools. DAC Mary Jane Irwin, Robert Michael Owens
1989	—	`conf`	Distributed Fault Diagnosis in the Butterfly Parallel Processor. ICPP (1) Tsang-Ling Sheu, Woei Lin, Chita R. Das, Mary Jane Irwin
1989	Misc	`conf`	Implementing algorithms for convolution on arrays of adders. ICASSP Robert Michael Owens, Mary Jane Irwin
1989	A*	`conf`	Multi-Level Logic Synthesis Using Communication Complexity. DAC TingTing Hwang, Robert Michael Owens, Mary Jane Irwin
1988	C	`conf`	A comparison of two digit serial VLSI adders. ICCD Mary Jane Irwin, Robert Michael Owens
1988	J	`jnl`	A digit pipelined dynamic time warp processor [word recognition]. IEEE Trans. Acoust. Speech Signal Process. Mary Jane Irwin
1988	A*	`conf`	DECOMPOSER: A Synthesizer for Systolic Systems. DAC Pao-Po Hou, Robert Michael Owens, Mary Jane Irwin
1988	Misc	`conf`	Multidimensional algorithms for VLSI processors. ICASSP Robert Michael Owens, Mary Jane Irwin
1988	J	`jnl`	Special Issue on Parallelism in Computer Arithmetic. J. Parallel Distributed Comput. Mary Jane Irwin
1987	C	`ed.`	8th IEEE Symposium on Computer Arithmetic, ARITH 1987, Como, Italy, May 18-21, 1987 IEEE Symposium on Computer Arithmetic Mary Jane Irwin, Renato Stefanelli
1987	A*	`conf`	An Overview of the Penn State Design System. DAC Robert Michael Owens, Mary Jane Irwin
1987	J	`jnl`	Digit pipelined processors. J. Supercomput. Mary Jane Irwin, Robert Michael Owens
1987	J	`jnl`	Digit-Pipelined Arithmetic as Illustrated By the Paste-Up System: A Tutorial. Computer Mary Jane Irwin, Robert Michael Owens
1987	J	`jnl`	Fast Methods for Switch-Level Verification of MOS Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Douglas S. Reeves, Mary Jane Irwin
1987	A*	`conf`	Mesh Arrays and LOGICIAN: A Tool for Their Efficient Generation. DAC Jared A. Beekman, Robert Michael Owens, Mary Jane Irwin
1987	J	`jnl`	The Arithmetic Cube. IEEE Trans. Computers Robert Michael Owens, Mary Jane Irwin
1986	J	`jnl`	A System for Designing, Simulating, and Testing High Performance VLSI Signal Processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Robert Michael Owens, Mary Jane Irwin
1986	Misc	`conf`	Design and implementation of real time video processor. ICASSP Shishpal Rawat, Poras T. Balsara, Mary Jane Irwin, Tom Mackowiak
1986	J	`jnl`	Regular Area-Time Efficient Carry-Lookahead Adders. J. Parallel Distributed Comput. Tin-Fook Ngai, Mary Jane Irwin, Shishpal Rawat
1986	J	`jnl`	Secretary/Treasurer's Report. SIGARCH Comput. Archit. News Mary Jane Irwin
1985	C	`conf`	Regular, area-time efficient carry-lookahead adders. IEEE Symposium on Computer Arithmetic Tin-Fook Ngai, Mary Jane Irwin
1983	J	`jnl`	Fully Digit On-Line Networks. IEEE Trans. Computers Mary Jane Irwin, Robert Michael Owens
1983	C	`conf`	Numerical limitations on the design of digit online networks. IEEE Symposium on Computer Arithmetic Robert Michael Owens, Mary Jane Irwin
1982	B	`conf`	A digit online arithmetic simulator. ICPP Bryan Gerard Mackay, Mary Jane Irwin
1981	C	`conf`	A rational arithmetic processor. IEEE Symposium on Computer Arithmetic Mary Jane Irwin, Dwight R. Smith
1980	A*	`conf`	Online Pipeline Systems for Recursive Numeric Computations. ISCA Mary Jane Irwin, Don Heller
1980	Misc	`conf`	Reduction of broadband noise in speech by spectral weighting. ICASSP Mary Jane Irwin
1979	A*	`conf`	On-Line Algorithms for the Design of Pipeline Architectures. ISCA Robert Michael Owens, Mary Jane Irwin
1978	A*	`conf`	A Pipelined Processing Unit for On-Line Division. ISCA Mary Jane Irwin
1978	—	`conf`	Reconfigurable Pipeline Systems. ACM Annual Conference (1) Mary Jane Irwin
1977	—	`—`	An Arithmetic Unit for on-Line Computation Mary Jane Irwin