Martine D. F. Schlag

32 papers A* 2A 8B 1C 3Misc 1Journal 16Unranked 1

Year	Rank	Type	Title / Venue / Authors
2003	A	`conf`	Parallel placement for field-programmable gate arrays. FPGA Pak K. Chan, Martine D. F. Schlag
2002	A	`ed.`	Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2002, Monterey, CA, USA, February 24-26, 2002 FPGA Martine D. F. Schlag, Steve Trimberger
2001	A	`ed.`	Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2001, Monterey, CA, USA, February 11-13, 2001 FPGA Scott Hauck, Martine D. F. Schlag, Russell Tessier
2000	J	`jnl`	Distributed-memory parallel routing for field-programmable gatearrays. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Pak K. Chan, Martine D. F. Schlag, Carl Ebeling, Larry McMurchie
2000	A	`conf`	New parallelization and convergence results for NC: a negotiation-based FPGA router. FPGA Pak K. Chan, Martine D. F. Schlag
1999	J	`jnl`	Multilevel spectral hypergraph partitioning with arbitrary vertex sizes. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jason Y. Zien, Martine D. F. Schlag, Pak K. Chan
1997	Misc	`conf`	Acceleration of an FPGA router. FCCM Pak K. Chan, Martine D. F. Schlag
1997	A	`conf`	Hybrid spectral/iterative partitioning. ICCAD Jason Y. Zien, Pak K. Chan, Martine D. F. Schlag
1996	J	`jnl`	Detection of Multiple Faults in Two-Dimensional ILAs. IEEE Trans. Computers Martine D. F. Schlag, F. Joel Ferguson
1996	A	`conf`	Multi-level spectral hypergraph partitioning with arbitrary vertex sizes. ICCAD Jason Y. Zien, Martine D. F. Schlag, Pak K. Chan
1996	J	`jnl`	Spectral-based multiway FPGA partitioning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Pak K. Chan, Martine D. F. Schlag, Jason Y. Zien
1995	A	`conf`	Spectral-Based Multi-Way FPGA Partitioning. FPGA Pak K. Chan, Martine D. F. Schlag, Jason Y. Zien
1994	J	`jnl`	Routability-driven technology mapping for lookup table-based FPGA's. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Martine D. F. Schlag, Jackson Kong, Pak K. Chan
1994	J	`jnl`	Spectral K-way ratio-cut partitioning and clustering. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Pak K. Chan, Martine D. F. Schlag, Jason Y. Zien
1993	J	`jnl`	Empirical evaluation of multilevel logic minimization tools for a lookup-table-based field-programmable gate array technology. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Martine D. F. Schlag, Pak K. Chan, Jackson Kong
1993	A*	`conf`	On Routability Prediction for Field-Programmable Gate Arrays. DAC Pak K. Chan, Martine D. F. Schlag, Jason Y. Zien
1993	J	`jnl`	Single-Layer Cylindrical Compaction. Algorithmica Richard Anderson, Simon Kahan, Martine D. F. Schlag
1993	A*	`conf`	Spectral DAC Pak K. Chan, Martine D. F. Schlag, Jason Y. Zien
1992	J	`jnl`	Delay Optimization of Carry-Skip Adders and Block Carry-Lookahead Adders Using Multidimensional Dynamic Programming. IEEE Trans. Computers Pak K. Chan, Martine D. F. Schlag, Clark D. Thomborson, Vojin G. Oklobdzija
1992	C	`conf`	Routability-Driven Techology Mapping for LookUp-Table-Based FPGAs. ICCD Martine D. F. Schlag, Jackson Kong, Pak K. Chan
1991	C	`conf`	Delay optimization of carry-skip adders and block carry-lookahead adders. IEEE Symposium on Computer Arithmetic Pak K. Chan, Martine D. F. Schlag, Clark D. Thomborson, Vojin G. Oklobdzija
1990	J	`jnl`	Analysis and Design of CMOS Manchester Adders with Variable Carry-Skip. IEEE Trans. Computers Pak K. Chan, Martine D. F. Schlag
1989	B	`conf`	An WG Richard Anderson, Simon Kahan, Martine D. F. Schlag
1989	A	`conf`	An O(n log n) algorithm for 1-D tile compaction. ICCAD Richard Anderson, Simon Kahan, Martine D. F. Schlag
1989	C	`conf`	Analysis and design of CMOS Manchester adders with variable carry-skip. IEEE Symposium on Computer Arithmetic Pak K. Chan, Martine D. F. Schlag
1989	J	`jnl`	Bounds on signal delay in RC mesh networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Pak K. Chan, Martine D. F. Schlag
1987	J	`jnl`	Rectilinear Shortest Paths and Minimum Spanning Trees in the Presence of Rectilinear Obstacles. IEEE Trans. Computers Ying-Fung Wu, Peter Widmayer, Martine D. F. Schlag, C. K. Wong
1987	—	`conf`	The planar topology of functional programs. FPCA Martine D. F. Schlag
1986	J	`jnl`	On some union and intersection problems for polygons with fixed orientations. Computing Peter Widmayer, Ying-Fung Wu, Martine D. F. Schlag, Chak-Kuen Wong
1985	J	`jnl`	A Method for Improving Cascode-Switch Macro Wirability. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Martine D. F. Schlag, Ellen J. Yoffa, Peter S. Hauge, Chak-Kuen Wong
1984	J	`jnl`	Maximizing pin alignment by pin permutations. Integr. Martine D. F. Schlag, Lin S. Woo, Chak-Kuen Wong
1983	J	`jnl`	An algorithm for optimal two-dimensional compaction of VLSI layouts. Integr. Martine D. F. Schlag, Yuh-Zen Liao, C. K. Wong