Martin Saint-Laurent

12 papers A 2C 2Journal 2Unranked 5
YearRankTypeTitle / Venue / Authors
2015 J jnl
A 28 nm DSP Powered by an On-Chip LDO for High-Performance and Energy-Efficient Mobile Applications.
IEEE J. Solid State Circuits
Martin Saint-Laurent, Paul Bassett, Ken Lin, Baker Mohammad, Yuhe Wang, Xufeng Chen, Maen Alradaideh, Tom Wernimont, Kartik Ayyar, Dan Bui, Dwight Galbi, Allan Lester, Marzio Pedrali-Noy, Willie Anderson
2015 C conf
Power-aware multi-voltage custom memory models for enhancing RTL and low power verification.
ICCD
Vijay Kiran Kalyanam, Martin Saint-Laurent, Jacob A. Abraham
2015 — conf
Transistor-interconnect mobile system-on-chip co-design method for holistic battery energy minimization.
VLSIC
N. N. Mojumder, Seung Chul Song, K. Rim, J. Xu, Joseph Wang, J. Zhu, Milena Vratonjic, K. Lin, Martin Saint-Laurent, Paul Bassett, Geoffrey Yeap
2014 — conf
10.1 A 28nm DSP powered by an on-chip LDO for high-performance and energy-efficient mobile applications.
ISSCC
Martin Saint-Laurent, Paul Bassett, Ken Lin, Yuhe Wang, Son Le, Xufeng Chen, Maen Alradaideh, Tom Wernimont, Kartik Ayyar, Dan Bui, Dwight Galbi, Allan Lester, Willie Anderson
2012 — conf
Energy efficient design techniques for a digital signal processor.
ICICDT
Paul Bassett, Martin Saint-Laurent
2010 A conf
A low-power clock gating cell optimized for low-voltage operation in a 45-nm technology.
ISLPED
Martin Saint-Laurent, Animesh Datta
2008 — conf
Cache Design for Low Power and High Yield.
ISQED
Baker Mohammad, Martin Saint-Laurent, Paul Bassett, Jacob A. Abraham
2007 A conf
A 65-nm pulsed latch with a single clocked transistor.
ISLPED
Martin Saint-Laurent, Baker Mohammad, Paul Bassett
2007 J jnl
A Model for Interlevel Coupling Noise in Multilevel Interconnect Structures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Martin Saint-Laurent
2005 — —
Modeling and Analysis of High-Frequency Microprocessor Clocking Networks.
Martin Saint-Laurent
2002 — conf
Optimal Sequencing Energy Allocation for CMOS Integrated Systems.
ISQED
Martin Saint-Laurent, Vojin G. Oklobdzija, Simon S. Singh, Madhavan Swaminathan
2001 C conf
On The Micro-architectural Impact of Clock Distribution Using Multiple PLLs.
ICCD
Martin Saint-Laurent, Madhavan Swaminathan, James D. Meindl