Martin Omaña - RankMe

75 papers A 7B 2C 12Misc 2Journal 29Unranked 22

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	Novel Physical Unclonable Function Implementation for Microcontrollers and Field Programmable Gate Arrays. IEEE Access Marco Grossi, Martin Omaña, Cecilia Metra, Andrea Acquaviva
2025	C	`conf`	On-Line Test of Fully Integrated Voltage Regulators for High Performance Microprocessors of Autonomous Systems. IOLTS Martin Omaña, A. Menghi, A. Stefani, E. Vicini, Cecilia Metra, G. Froio, S. Petrucci
2025	J	`jnl`	Risks of Silent Data Corruption Due to the Combined Effects of Latent Faults and Aging Phenomena Affecting FinFET-Based ICs. IEEE Access Martin Omaña, Yashwanthi Venigalla, Matteo Naldi, Cecilia Metra
2024	—	`conf`	A PCI Express Based Data Acquisition System for the Monitoring of Code Traces of RISC-V Microprocessors. ICSRS Marco Grossi, Simone Manoni, Emanuele Parisi, Martin Omaña, Cecilia Metra, Fabrizio Alfonsi, Alessandro Gabrielli, Andrea Acquaviva
2024	C	`conf`	Reliability of AI in Predicting the State of Health of Li-Ion Batteries IOLTS Sara Cretí, Martin Omaña, Cecilia Metra, Gianni Borelli
2024	C	`conf`	Silent Data Corruption and Reliability Risks due to Faults Affecting High Performance Microprocessors' Caches. IOLTS Martin Omaña, A. Manfredi, Cecilia Metra, R. Locatelli, M. Chiavacci, S. Petrucci
2023	—	`conf`	RISC-V-Based Platforms for HPC: Analyzing Non-functional Properties for Future HPC and Big-Data Clusters. SAMOS William Fornaciari, Federico Reghenzani, Federico Terraneo, Davide Baroffio, Cecilia Metra, Martin Omaña, Josie E. Rodriguez Condia, Matteo Sonza Reorda, Robert Birke, Iacopo Colonnelli, Gianluca Mittone, Marco Aldinucci, Gabriele Mencagli, Francesco Iannone, Filippo Palombi, Giuseppe Zummo, Daniele Cesarini, Federico Tesser
2022	—	`conf`	Impact of Soft Errors on High Performance Autoencoders for Cyberattack Detection. LATS Fabrizio Finelli, Martin Omaña, Cecilia Metra
2022	J	`jnl`	Low-Cost Strategy to Detect Faults Affecting Scrubbers in SRAM-Based FPGAs. Microprocess. Microsystems Marco Grossi, Meryem Bouras, Martin Omaña, Hassan Berbia
2022	C	`conf`	Novel BTI Robust Ring-Oscillator-Based Physically Unclonable Function. IOLTS Marco Grossi, Martin Omaña, Daniele Rossi, Biagio Marzulli, Cecilia Metra
2022	J	`jnl`	Reliability Risks Due to Faults Affecting Selectors of ReRAMs and Possible Solutions. IEEE Trans. Emerg. Top. Comput. Martin Omaña, Sejuti Bardhan, Cecilia Metra
2021	J	`jnl`	Investigation of the Impact of BTI Aging Phenomenon on Analog Amplifiers. J. Electron. Test. Marco Grossi, Martin Omaña
2019	J	`jnl`	Fault-Tolerant Inverters for Reliable Photovoltaic Systems. IEEE Trans. Very Large Scale Integr. Syst. Martin Omaña, Alessandro Fiore, Marco Mongitore, Cecilia Metra
2019	J	`jnl`	Impact of Bias Temperature Instability (BTI) Aging Phenomenon on Clock Deskew Buffers. J. Electron. Test. Marco Grossi, Martin Omaña
2019	J	`jnl`	Low-Cost Strategy for Bus Propagation Delay Reduction. J. Electron. Test. Martin Omaña, S. Govindaraj, Cecilia Metra
2019	J	`jnl`	Sensors and Embedded Systems in Agriculture and Food Analysis. J. Sensors Marco Grossi, Annachiara Berardinelli, Edward Sazonov, Wesley Beccaro, Martin Omaña
2018	J	`jnl`	Low-Cost Strategy to Mitigate the Impact of Aging on Latches' Robustness. IEEE Trans. Emerg. Top. Comput. Martin Omaña, TusharaSandeep Edara, Cecilia Metra
2017	J	`jnl`	New Approaches for Power Binning of High Performance Microprocessors. IEEE Trans. Computers Martin Omaña, Marco Padovani, Kreshnik Veliu, Cecilia Metra, Juergen Alt, Rajesh Galivanche
2017	J	`jnl`	Scalable Approach for Power Droop Reduction During Scan-Based Logic BIST. IEEE Trans. Very Large Scale Integr. Syst. Martin Omaña, Daniele Rossi, Filippo Fuzzi, Cecilia Metra, Chandra Tirumurti, Rajesh Galivanche
2016	A	`conf`	Inverters' self-checking monitors for reliable photovoltaic systems. DATE Martin Omaña, A. Fiore, Cecilia Metra
2016	J	`jnl`	Low-Cost and High-Reduction Approaches for Power Droop during Launch-On-Shift Scan-Based Logic BIST. IEEE Trans. Computers Martin Omaña, Daniele Rossi, Edda Beniamino, Cecilia Metra, Chandrasekharan Tirumurti, Rajesh Galivanche
2015	J	`jnl`	Impact of Bias Temperature Instability on Soft Error Susceptibility. IEEE Trans. Very Large Scale Integr. Syst. Daniele Rossi, Martin Omaña, Cecilia Metra, Alessandro Paccagnella
2015	—	`conf`	Intermittent and Transient Fault Diagnosis on Sparse Code Signatures. ATS Michael A. Kochte, Atefe Dalirsani, Andrea Bernabei, Martin Omaña, Cecilia Metra, Hans-Joachim Wunderlich
2015	J	`jnl`	Low-Cost On-Chip Clock Jitter Measurement Scheme. IEEE Trans. Very Large Scale Integr. Syst. Martin Omaña, Daniele Rossi, Daniele Giaffreda, Cecilia Metra, T. M. Mak, Asifur Rahman, Simon Tam
2015	J	`jnl`	Modeling and Detection of Hotspot in Shaded Photovoltaic Cells. IEEE Trans. Very Large Scale Integr. Syst. Daniele Rossi, Martin Omaña, Daniele Giaffreda, Cecilia Metra
2014	J	`jnl`	Clock Faults Induced Min and Max Delay Violations. J. Electron. Test. Daniele Rossi, Martin Omaña, José Manuel Cazeaux, Cecilia Metra, T. M. Mak
2014	—	`conf`	Power droop reduction during Launch-On-Shift scan-based logic BIST. DFT Martin Omaña, Daniele Rossi, Edda Beniamino, Cecilia Metra, Chandra Tirumurti, Rajesh Galivanche
2013	J	`jnl`	Faults Affecting Energy-Harvesting Circuits of Self-Powered Wireless Sensors and Their Possible Concurrent Detection. IEEE Trans. Very Large Scale Integr. Syst. Martin Omaña, Daniele Rossi, Daniele Giaffreda, Roberto Specchia, Cecilia Metra, Marcin Marzencki, Bozena Kaminska
2013	J	`jnl`	Low Cost Concurrent Error Detection Strategy for the Control Logic of High Performance Microprocessors and Its Application to the Instruction Decoder. J. Electron. Test. Daniele Rossi, Martin Omaña, G. Garrammone, Cecilia Metra, Abhijit Jas, Rajesh Galivanche
2013	J	`jnl`	Low Cost NBTI Degradation Detection and Masking Approaches. IEEE Trans. Computers Martin Omaña, Daniele Rossi, Nicolò Bosio, Cecilia Metra
2013	B	`conf`	Novel approach to reduce power droop during scan-based logic BIST. ETS Martin Omaña, Daniele Rossi, Filippo Fuzzi, Cecilia Metra, Chandra Tirumurti, R. Galivache
2012	—	`conf`	Faults affecting the control blocks of PV arrays and techniques for their concurrent detection. DFT Martin Omaña, Daniele Rossi, G. Collepalumbo, Cecilia Metra, Fabrizio Lombardi
2012	—	`conf`	High-reliability fault tolerant digital systems in nanometric technologies: Characterization and design methodologies. DFT Cristiana Bolchini, Antonio Miele, Chiara Sandionigi, Marco Ottavi, Salvatore Pontarelli, Adelio Salsano, Cecilia Metra, Martin Omaña, Daniele Rossi, Matteo Sonza Reorda, Luca Sterpone, Massimo Violante, Simone Gerardin, Marta Bagatin, Alessandro Paccagnella
2012	J	`jnl`	New Design for Testability Approach for Clock Fault Testing. IEEE Trans. Computers Cecilia Metra, Martin Omaña, T. M. Mak, Simon Tam
2011	—	`conf`	Impact of Aging Phenomena on Soft Error Susceptibility. DFT Daniele Rossi, Martin Omaña, Cecilia Metra, Alessandro Paccagnella
2011	J	`jnl`	Low-Cost Dynamic Compensation Scheme for Local Clocks of Next Generation High Performance Microprocessors. IEEE Trans. Very Large Scale Integr. Syst. Martin Omaña, Cecilia Metra, T. M. Mak, Simon Tam
2011	—	`conf`	Model for Thermal Behavior of Shaded Photovoltaic Cells under Hot-Spot Condition. DFT Daniele Giaffreda, Martin Omaña, Daniele Rossi, Cecilia Metra
2010	J	`jnl`	High-Performance Robust Latches. IEEE Trans. Computers Martin Omaña, Daniele Rossi, Cecilia Metra
2010	—	`conf`	Low cost and low intrusive approach to test on-line the scheduler of high performance microprocessors. Conf. Computing Frontiers Daniele Rossi, Martin Omaña, Gianluca Berghella, Cecilia Metra, Abhijit Jas, Chandra Tirumurti, Rajesh Galivanche
2010	—	`conf`	Novel low-cost aging sensor. Conf. Computing Frontiers Martin Omaña, Daniele Rossi, Nicolò Bosio, Cecilia Metra
2010	—	`conf`	On-die Ring Oscillator Based Measurement Scheme for Process Parameter Variations and Clock Jitter. DFT Martin Omaña, Daniele Giaffreda, Cecilia Metra, T. M. Mak, Simon Tam, Asifur Rahman
2010	—	`conf`	Secure communication protocol for wireless sensor networks. EWDTS Daniele Rossi, Martin Omaña, Daniele Giaffreda, Cecilia Metra
2010	—	`conf`	Transient Fault and Soft Error On-die Monitoring Scheme. DFT Daniele Rossi, Martin Omaña, Cecilia Metra
2009	J	`jnl`	Accurate Linear Model for SET Critical Charge Estimation. IEEE Trans. Very Large Scale Integr. Syst. Daniele Rossi, José Manuel Cazeaux, Martin Omaña, Cecilia Metra, Abhijit Chatterjee
2009	—	`conf`	Concurrent Detection of Faults Affecting Energy Harvesting Circuits of Self-Powered Wearable Sensors. DFT Martin Omaña, Marcin Marzencki, Roberto Specchia, Cecilia Metra, Bozena Kaminska
2009	—	`conf`	Novel High Speed Robust Latch. DFT Martin Omaña, Daniele Rossi, Cecilia Metra
2008	J	`jnl`	Checkers' No-Harm Alarms and Design Approaches to Tolerate Them. J. Electron. Test. Daniele Rossi, Martin Omaña, Cecilia Metra
2008	B	`conf`	Function-Inherent Code Checking: A New Low Cost On-Line Testing Approach for High Performance Microprocessor Control Logic. ETS Cecilia Metra, Daniele Rossi, Martin Omaña, Abhijit Jas, Rajesh Galivanche
2008	—	`conf`	Novel On-Chip Clock Jitter Measurement Scheme for High Performance Microprocessors. DFT Cecilia Metra, Martin Omaña, T. M. Mak, Asifur Rahman, Simon Tam
2007	J	`jnl`	Latch Susceptibility to Transient Faults and New Hardening Approach. IEEE Trans. Computers Martin Omaña, Daniele Rossi, Cecilia Metra
2007	Misc	`conf`	Novel Approach to Clock Fault Testing for High Performance Microprocessors. VTS Cecilia Metra, Martin Omaña, T. M. Mak, Simon Tam
2007	A	`conf`	Novel compensation scheme for local clocks of high performance microprocessors. ITC Cecilia Metra, Martin Omaña, T. M. Mak, Simon Tam
2006	C	`conf`	Can Clock Faults be Detected Through Functional Test? DDECS Cecilia Metra, Daniele Rossi, Martin Omaña, José Manuel Cazeaux, T. M. Mak
2006	C	`conf`	Checker No-Harm Alarm Robustness. IOLTS Daniele Rossi, Martin Omaña, Cecilia Metra, Andrea Pagni
2006	A	`conf`	Low-cost and highly reliable detector for transient and crosstalk faults affecting FPGA interconnects. DATE Martin Omaña, José Manuel Cazeaux, Daniele Rossi, Cecilia Metra
2006	C	`conf`	Path (Min) Delay Faults and Their Impact on Self-Checking Circuits' Operation. IOLTS Cecilia Metra, Martin Omaña, Daniele Rossi, José Manuel Cazeaux, T. M. Mak
2005	—	`—`	Advanced techniques for concurrent fault detection. Martin Omaña
2005	Misc	`conf`	Low Cost Scheme for On-Line Clock Skew Compensation. VTS Martin Omaña, Daniele Rossi, Cecilia Metra
2005	J	`jnl`	Low Cost and High Speed Embedded Two-Rail Code Checker. IEEE Trans. Computers Martin Omaña, Daniele Rossi, Cecilia Metra
2005	—	`conf`	Multiple Transient Faults in Logic: An Issue for Next Generation ICs. DFT Daniele Rossi, Martin Omaña, Fabio Toma, Cecilia Metra
2005	J	`jnl`	Novel on-chip circuit for jitter testing in high-speed PLLs. IEEE Trans. Instrum. Meas. José Manuel Cazeaux, Martin Omaña, Cecilia Metra
2005	C	`conf`	On Transistor Level Gate Sizing for Increased Robustness to Transient Faults. IOLTS José Manuel Cazeaux, Daniele Rossi, Martin Omaña, Cecilia Metra, Abhijit Chatterjee
2005	C	`conf`	On the Selection of Unidirectional Error Detecting Codes for Self-Checking Circuits' Area Overhead and Performance Optimization. IOLTS Martin Omaña, O. Losco, Cecilia Metra, Andrea Pagni
2005	—	`conf`	The Other Side of the Timing Equation: a Result of Clock Faults. DFT Cecilia Metra, Martin Omaña, Daniele Rossi, José Manuel Cazeaux, T. M. Mak
2004	A	`conf`	Are Our Design for Testability Features Fault Secure? DATE Cecilia Metra, T. M. Mak, Martin Omaña
2004	—	`conf`	Fast and Low-Cost Clock Deskew Buffer. DFT Martin Omaña, Daniele Rossi, Cecilia Metra
2004	—	`conf`	Fault secureness need for next generation high performance microprocessor design for testability structures. Conf. Computing Frontiers Cecilia Metra, T. M. Mak, Martin Omaña
2004	C	`conf`	Hardware Reconfiguration Scheme for High Availability Systems. IOLTS Cecilia Metra, A. Ferrari, Martin Omaña, Andrea Pagni
2004	C	`conf`	Low-Area On-Chip Circuit for Jitter Measurement in a Phase-Locked Loop. IOLTS José Manuel Cazeaux, Martin Omaña, Cecilia Metra
2004	J	`jnl`	Model for Transient Fault Susceptibility of Combinational Circuits. J. Electron. Test. Martin Omaña, Daniele Rossi, Cecilia Metra
2004	A	`conf`	Risks Associated with Faults within Test Pattern Compactors and Their Implications on Testing. ITC Cecilia Metra, T. M. Mak, Martin Omaña
2003	C	`conf`	A Model for Transient Fault Propagation in Combinatorial Logic. IOLTS Martin Omaña, Giacinto Papasso, Daniele Rossi, Cecilia Metra
2003	—	`conf`	Automatic Modification of Sequential Circuits for Self-Checking Implementation. DFT Cecilia Metra, Stefano Di Francescantonio, Martin Omaña
2003	A	`conf`	High Speed and Highly Testable Parallel Two-Rail Code Checker. DATE Martin Omaña, Daniele Rossi, Cecilia Metra
2003	A	`conf`	Novel Transient Fault Hardened Static Latch. ITC Martin Omaña, Daniele Rossi, Cecilia Metra