Martin L. Schmatz

33 papers A* 1A 1C 2Misc 1Journal 14Unranked 14
YearRankTypeTitle / Venue / Authors
2024 C conf
Designing (Not Only) Lunar Space Data Centers.
IGARSS
Agata M. Wijata, Alicja Musial, Dawid Lazaj, Michal Gumiela, Mateusz Przeliorz, Jonas Weiss, Patricia Sagmeister, Thomas Morf, Martin L. Schmatz, Nicolas Longépé, Pierre-Philippe Mathieu, Jakub Nalepa
2023 C conf
Benchmarking Space-Based Data Center Architectures.
IGARSS
Michal Gumiela, Alicja Musial, Agata M. Wijata, Dawid Lazaj, Jonas Weiss, Patricia Sagmeister, Thomas Morf, Martin L. Schmatz, Jakub Nalepa
2016 — conf
Dynamic Block Sizing for Data Stream Processing Systems.
IC2E Workshops
Robert Birke, Evangelia Kalyvianaki, Walter Binder, Martin L. Schmatz, Lydia Y. Chen
2016 J jnl
Implementation of Low-Power 6-8 b 30-90 GS/s Time-Interleaved ADCs With Optimized Input Bandwidth in 32 nm CMOS.
IEEE J. Solid State Circuits
Lukas Kull, Jan Plíva, Thomas Toifl, Martin L. Schmatz, Pier Andrea Francese, Christian Menolfi, Matthias Braendli, Marcel A. Kossel, Thomas Morf, Toke Meyer Andersen, Yusuf Leblebici
2016 — conf
Profiling Memory Vulnerability of Big-Data Applications.
DSN Workshops
Navaneeth Rameshan, Robert Birke, Leandro Navarro, Vladimir Vlassov, Bhuvan Urgaonkar, George Kesidis, Martin L. Schmatz, Lydia Y. Chen
2015 A conf
RStore: A Direct-Access DRAM-based Data Store.
ICDCS
Animesh Trivedi, Patrick Stuedi, Bernard Metzler, Clemens Lutz, Martin L. Schmatz, Thomas R. Gross
2015 A* conf
When Virtual Meets Physical at the Edge: A Field Study on Datacenters' Virtual Traffic.
SIGMETRICS
Robert Birke, Mathias Björkqvist, Cyriel Minkenberg, Martin L. Schmatz, Lydia Y. Chen
2014 — conf
22.1 A 90GS/s 8b 667mW 64× interleaved SAR ADC in 32nm digital SOI CMOS.
ISSCC
Lukas Kull, Thomas Toifl, Martin L. Schmatz, Pier Andrea Francese, Christian Menolfi, Matthias Braendli, Marcel A. Kossel, Thomas Morf, Toke Meyer Andersen, Yusuf Leblebici
2014 — conf
A 110 mW 6 bit 36 GS/s interleaved SAR ADC for 100 GBE occupying 0.048 mm
A-SSCC
Lukas Kull, Jan Plíva, Thomas Toifl, Martin L. Schmatz, Pier Andrea Francese, Christian Menolfi, Matthias Braendli, Marcel A. Kossel, Thomas Morf, Toke Meyer Andersen, Yusuf Leblebici
2014 Misc conf
Scalable, efficient ASICS for the square kilometre array: From A/D conversion to central correlation.
ICASSP
Martin L. Schmatz, Rik Jongerius, Gero Dittmann, Andreea Anghel, Ton Engbersen, Jan van Lunteren, Peter Buchmann
2013 J jnl
A 3.1 mW 8b 1.2 GS/s Single-Channel Asynchronous SAR ADC With Alternate Comparators for Enhanced Speed in 32 nm Digital SOI CMOS.
IEEE J. Solid State Circuits
Lukas Kull, Thomas Toifl, Martin L. Schmatz, Pier Andrea Francese, Christian Menolfi, Matthias Braendli, Marcel A. Kossel, Thomas Morf, Toke Meyer Andersen, Yusuf Leblebici
2013 — conf
A 3.1mW 8b 1.2GS/s single-channel asynchronous SAR ADC with alternate comparators for enhanced speed in 32nm digital SOI CMOS.
ISSCC
Lukas Kull, Thomas Toifl, Martin L. Schmatz, Pier Andrea Francese, Christian Menolfi, Matthias Braendli, Marcel A. Kossel, Thomas Morf, Toke Meyer Andersen, Yusuf Leblebici
2010 J jnl
A 4.5 mW/Gb/s 6.4 Gb/s 22+1-Lane Source Synchronous Receiver Core With Optional Cleanup PLL in 65 nm CMOS.
IEEE J. Solid State Circuits
Robert Reutemann, Michael Ruegg, Fran Keyser, John Bergkvist, Daniel Dreps, Thomas Toifl, Martin L. Schmatz
2010 — conf
A 4.5mW/Gb/s 6.4Gb/s 22+1-lane source-synchronous link rx core with optional cleanup PLL in 65nm CMOS.
ISSCC
Robert Reutemann, Michael Ruegg, Fran Keyser, John Bergkvist, Daniel Dreps, Thomas Toifl, Martin L. Schmatz
2009 J jnl
A 1.25-5 GHz Clock Generator With High-Bandwidth Supply-Rejection Using a Regulated-Replica Regulator in 45-nm CMOS.
IEEE J. Solid State Circuits
Thomas Toifl, Christian Menolfi, Peter Buchmann, Marcel A. Kossel, Thomas Morf, Martin L. Schmatz
2009 J jnl
A 5.75 to 44 Gb/s Quarter Rate CDR With Data Rate Selection in 90 nm Bulk CMOS.
IEEE J. Solid State Circuits
Lucio Rodoni, George von Büren, Alex Huber, Martin L. Schmatz, Heinz Jäckel
2009 J jnl
LC PLL With 1.2-Octave Locking Range Based on Mutual-Inductance Switching in 45-nm SOI CMOS.
IEEE J. Solid State Circuits
Marcel A. Kossel, Thomas Morf, Jonas R. M. Weiss, Peter Buchmann, Christian Menolfi, Thomas Toifl, Martin L. Schmatz
2008 — conf
5.75 to 44Gb/s quarter rate CDR with data rate selection in 90nm bulk CMOS.
ESSCIRC
George von Büren, Lucio Rodoni, Heinz Jäckel, Roland Brun, Daniel Holzer, Alex Huber, Martin L. Schmatz
2008 J jnl
A T-Coil-Enhanced 8.5 Gb/s High-Swing SST Transmitter in 65 nm Bulk CMOS With ≪ -16 dB Return Loss Over 10 GHz Bandwidth.
IEEE J. Solid State Circuits
Marcel A. Kossel, Christian Menolfi, Jonas R. M. Weiss, Peter Buchmann, George von Büren, Lucio Rodoni, Thomas Morf, Thomas Toifl, Martin L. Schmatz
2008 — conf
A T-Coil-Enhanced 8.5Gb/s High-Swing source-Series-Terminated Transmitter in 65nm Bulk CMOS.
ISSCC
Marcel A. Kossel, Christian Menolfi, Jonas R. M. Weiss, Peter Buchmann, George von Büren, Lucio Rodoni, Thomas Morf, Thomas Toifl, Martin L. Schmatz
2007 — conf
A 16Gb/s Source-Series Terminated Transmitter in 65nm CMOS SOI.
ISSCC
Christian Menolfi, Thomas Toifl, Peter Buchmann, Marcel A. Kossel, Thomas Morf, Jonas R. M. Weiss, Martin L. Schmatz
2007 — conf
A 72mW 0.03mm2 Inductorless 40Gb/s CDR in 65nm SOI CMOS.
ISSCC
Thomas Toifl, Christian Menolfi, Peter Buchmann, Christoph Hagleitner, Marcel A. Kossel, Thomas Morf, Jonas R. M. Weiss, Martin L. Schmatz
2006 J jnl
A 22-gb/s PAM-4 receiver in 90-nm CMOS SOI technology.
IEEE J. Solid State Circuits
Thomas Toifl, Christian Menolfi, Michael Ruegg, Robert Reutemann, Peter Buchmann, Marcel A. Kossel, Thomas Morf, Jonas R. M. Weiss, Martin L. Schmatz
2006 J jnl
A 25-Gb/s CDR in 90-nm CMOS for High-Density Interconnects.
IEEE J. Solid State Circuits
Christian Kromer, Gion Sialm, Christian Menolfi, Martin L. Schmatz, Frank Ellinger, Heinz Jäckel
2006 — conf
A 25Gb/s CDR in 90nm CMOS for High-Density Interconnects.
ISSCC
Christian Kromer, Gion Sialm, Christian Menolfi, Martin L. Schmatz, Frank Ellinger, Heinz Jäckel
2006 — conf
A Combined Dynamic and Static Frequency Divider for a 40GHz PLL in 80nm CMOS.
ISSCC
George von Büren, Christian Kromer, Frank Ellinger, Alex Huber, Martin L. Schmatz, Heinz Jäckel
2006 — conf
A DC-to-44-GHz 19dB Gain Amplifier in 90nm CMOS Using Capacitive Bandwidth Enhancement.
ISSCC
Jonas R. M. Weiss, Marcel A. Kossel, Christian Menolfi, Thomas Morf, Martin L. Schmatz, Thomas Toifl, Heinz Jäckel
2006 J jnl
Low-Complexity Adaptive Equalization for High-Speed Chip-to-Chip Communication Paths by Zero-Forcing of Jitter Components.
IEEE Trans. Commun.
Thomas Toifl, Martin L. Schmatz, Christian Menolfi
2005 J jnl
A 0.94-ps-RMS-jitter 0.016-mm
IEEE J. Solid State Circuits
Thomas Toifl, Christian Menolfi, Peter Buchmann, Marcel A. Kossel, Thomas Morf, Robert Reutemann, Michael Ruegg, Martin L. Schmatz, Jonas R. M. Weiss
2005 J jnl
A 100-mW 4×10 Gb/s transceiver in 80-nm CMOS for high-density optical interconnects.
IEEE J. Solid State Circuits
Christian Kromer, Gion Sialm, Christoph Berger, Thomas Morf, Martin L. Schmatz, Frank Ellinger, Daniel Erni, Gian-Luca Bona, Heinz Jäckel
2004 J jnl
A low-power 20-GHz 52-dBΩ transimpedance amplifier in 80-nm CMOS.
IEEE J. Solid State Circuits
Christian Kromer, Gion Sialm, Thomas Morf, Martin L. Schmatz, Frank Ellinger, Daniel Erni, Heinz Jäckel
2004 — conf
BiCMOS Variable Gain LNA at C-Band with Ultra Low Power Consumption for WLAN.
ICT
Frank Ellinger, Corrado Carta, Lucio Rodoni, George von Büren, David Barras, Martin L. Schmatz, Heinz Jäckel
2004 J jnl
Jitter Measurements of High-Speed Serial Links.
IEEE Des. Test Comput.
Marcel A. Kossel, Martin L. Schmatz